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1/*2 * xircom_cb: A driver for the (tulip-like) Xircom Cardbus ethernet cards3 *4 * This software is (C) by the respective authors, and licensed under the GPL5 * License.6 *7 * Written by Arjan van de Ven for Red Hat, Inc.8 * Based on work by Jeff Garzik, Doug Ledford and Donald Becker9 *10 * This software may be used and distributed according to the terms11 * of the GNU General Public License, incorporated herein by reference.12 *13 *14 * $Id: xircom_cb.c,v 1.33 2001/03/19 14:02:07 arjanv Exp $15 */16 17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt18 19#include <linux/module.h>20#include <linux/kernel.h>21#include <linux/string.h>22#include <linux/errno.h>23#include <linux/ioport.h>24#include <linux/slab.h>25#include <linux/interrupt.h>26#include <linux/pci.h>27#include <linux/netdevice.h>28#include <linux/etherdevice.h>29#include <linux/skbuff.h>30#include <linux/delay.h>31#include <linux/bitops.h>32 33#include <linux/uaccess.h>34#include <asm/io.h>35#ifdef CONFIG_NET_POLL_CONTROLLER36#include <asm/irq.h>37#endif38 39MODULE_DESCRIPTION("Xircom Cardbus ethernet driver");40MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>");41MODULE_LICENSE("GPL");42 43#define xw32(reg, val) iowrite32(val, ioaddr + (reg))44#define xr32(reg) ioread32(ioaddr + (reg))45#define xr8(reg) ioread8(ioaddr + (reg))46 47/* IO registers on the card, offsets */48#define CSR0 0x0049#define CSR1 0x0850#define CSR2 0x1051#define CSR3 0x1852#define CSR4 0x2053#define CSR5 0x2854#define CSR6 0x3055#define CSR7 0x3856#define CSR8 0x4057#define CSR9 0x4858#define CSR10 0x5059#define CSR11 0x5860#define CSR12 0x6061#define CSR13 0x6862#define CSR14 0x7063#define CSR15 0x7864#define CSR16 0x8065 66/* PCI registers */67#define PCI_POWERMGMT 0x4068 69/* Offsets of the buffers within the descriptor pages, in bytes */70 71#define NUMDESCRIPTORS 472 73static int bufferoffsets[NUMDESCRIPTORS] = {128,2048,4096,6144};74 75 76struct xircom_private {77 /* Send and receive buffers, kernel-addressable and dma addressable forms */78 79 __le32 *rx_buffer;80 __le32 *tx_buffer;81 82 dma_addr_t rx_dma_handle;83 dma_addr_t tx_dma_handle;84 85 struct sk_buff *tx_skb[4];86 87 void __iomem *ioaddr;88 int open;89 90 /* transmit_used is the rotating counter that indicates which transmit91 descriptor has to be used next */92 int transmit_used;93 94 /* Spinlock to serialize register operations.95 It must be helt while manipulating the following registers:96 CSR0, CSR6, CSR7, CSR9, CSR10, CSR1597 */98 spinlock_t lock;99 100 struct pci_dev *pdev;101 struct net_device *dev;102};103 104 105/* Function prototypes */106static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id);107static void xircom_remove(struct pci_dev *pdev);108static irqreturn_t xircom_interrupt(int irq, void *dev_instance);109static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,110 struct net_device *dev);111static int xircom_open(struct net_device *dev);112static int xircom_close(struct net_device *dev);113static void xircom_up(struct xircom_private *card);114#ifdef CONFIG_NET_POLL_CONTROLLER115static void xircom_poll_controller(struct net_device *dev);116#endif117 118static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset);119static void investigate_write_descriptor(struct net_device *dev, struct xircom_private *card, int descnr, unsigned int bufferoffset);120static void read_mac_address(struct xircom_private *card);121static void transceiver_voodoo(struct xircom_private *card);122static void initialize_card(struct xircom_private *card);123static void trigger_transmit(struct xircom_private *card);124static void trigger_receive(struct xircom_private *card);125static void setup_descriptors(struct xircom_private *card);126static void remove_descriptors(struct xircom_private *card);127static int link_status_changed(struct xircom_private *card);128static void activate_receiver(struct xircom_private *card);129static void deactivate_receiver(struct xircom_private *card);130static void activate_transmitter(struct xircom_private *card);131static void deactivate_transmitter(struct xircom_private *card);132static void enable_transmit_interrupt(struct xircom_private *card);133static void enable_receive_interrupt(struct xircom_private *card);134static void enable_link_interrupt(struct xircom_private *card);135static void disable_all_interrupts(struct xircom_private *card);136static int link_status(struct xircom_private *card);137 138 139 140static const struct pci_device_id xircom_pci_table[] = {141 { PCI_VDEVICE(XIRCOM, 0x0003), },142 {0,},143};144MODULE_DEVICE_TABLE(pci, xircom_pci_table);145 146static struct pci_driver xircom_ops = {147 .name = "xircom_cb",148 .id_table = xircom_pci_table,149 .probe = xircom_probe,150 .remove = xircom_remove,151};152 153 154#if defined DEBUG && DEBUG > 1155static void print_binary(unsigned int number)156{157 int i,i2;158 char buffer[64];159 memset(buffer,0,64);160 i2=0;161 for (i=31;i>=0;i--) {162 if (number & (1<<i))163 buffer[i2++]='1';164 else165 buffer[i2++]='0';166 if ((i&3)==0)167 buffer[i2++]=' ';168 }169 pr_debug("%s\n",buffer);170}171#endif172 173static const struct net_device_ops netdev_ops = {174 .ndo_open = xircom_open,175 .ndo_stop = xircom_close,176 .ndo_start_xmit = xircom_start_xmit,177 .ndo_set_mac_address = eth_mac_addr,178 .ndo_validate_addr = eth_validate_addr,179#ifdef CONFIG_NET_POLL_CONTROLLER180 .ndo_poll_controller = xircom_poll_controller,181#endif182};183 184/* xircom_probe is the code that gets called on device insertion.185 it sets up the hardware and registers the device to the networklayer.186 187 TODO: Send 1 or 2 "dummy" packets here as the card seems to discard the188 first two packets that get send, and pump hates that.189 190 */191static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id)192{193 struct device *d = &pdev->dev;194 struct net_device *dev = NULL;195 struct xircom_private *private;196 unsigned long flags;197 unsigned short tmp16;198 int rc;199 200 /* First do the PCI initialisation */201 202 rc = pci_enable_device(pdev);203 if (rc < 0)204 goto out;205 206 /* disable all powermanagement */207 pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000);208 209 pci_set_master(pdev); /* Why isn't this done by pci_enable_device ?*/210 211 /* clear PCI status, if any */212 pci_read_config_word (pdev,PCI_STATUS, &tmp16);213 pci_write_config_word (pdev, PCI_STATUS,tmp16);214 215 rc = pci_request_regions(pdev, "xircom_cb");216 if (rc < 0) {217 pr_err("%s: failed to allocate io-region\n", __func__);218 goto err_disable;219 }220 221 rc = -ENOMEM;222 /*223 Before changing the hardware, allocate the memory.224 This way, we can fail gracefully if not enough memory225 is available.226 */227 dev = alloc_etherdev(sizeof(struct xircom_private));228 if (!dev)229 goto err_release;230 231 private = netdev_priv(dev);232 233 /* Allocate the send/receive buffers */234 private->rx_buffer = dma_alloc_coherent(d, 8192,235 &private->rx_dma_handle,236 GFP_KERNEL);237 if (private->rx_buffer == NULL)238 goto rx_buf_fail;239 240 private->tx_buffer = dma_alloc_coherent(d, 8192,241 &private->tx_dma_handle,242 GFP_KERNEL);243 if (private->tx_buffer == NULL)244 goto tx_buf_fail;245 246 SET_NETDEV_DEV(dev, &pdev->dev);247 248 249 private->dev = dev;250 private->pdev = pdev;251 252 /* IO range. */253 private->ioaddr = pci_iomap(pdev, 0, 0);254 if (!private->ioaddr)255 goto reg_fail;256 257 spin_lock_init(&private->lock);258 259 initialize_card(private);260 read_mac_address(private);261 setup_descriptors(private);262 263 dev->netdev_ops = &netdev_ops;264 pci_set_drvdata(pdev, dev);265 266 rc = register_netdev(dev);267 if (rc < 0) {268 pr_err("%s: netdevice registration failed\n", __func__);269 goto err_unmap;270 }271 272 netdev_info(dev, "Xircom cardbus revision %i at irq %i\n",273 pdev->revision, pdev->irq);274 /* start the transmitter to get a heartbeat */275 /* TODO: send 2 dummy packets here */276 transceiver_voodoo(private);277 278 spin_lock_irqsave(&private->lock,flags);279 activate_transmitter(private);280 activate_receiver(private);281 spin_unlock_irqrestore(&private->lock,flags);282 283 trigger_receive(private);284out:285 return rc;286 287err_unmap:288 pci_iounmap(pdev, private->ioaddr);289reg_fail:290 dma_free_coherent(d, 8192, private->tx_buffer, private->tx_dma_handle);291tx_buf_fail:292 dma_free_coherent(d, 8192, private->rx_buffer, private->rx_dma_handle);293rx_buf_fail:294 free_netdev(dev);295err_release:296 pci_release_regions(pdev);297err_disable:298 pci_disable_device(pdev);299 goto out;300}301 302 303/*304 xircom_remove is called on module-unload or on device-eject.305 it unregisters the irq, io-region and network device.306 Interrupts and such are already stopped in the "ifconfig ethX down"307 code.308 */309static void xircom_remove(struct pci_dev *pdev)310{311 struct net_device *dev = pci_get_drvdata(pdev);312 struct xircom_private *card = netdev_priv(dev);313 struct device *d = &pdev->dev;314 315 unregister_netdev(dev);316 pci_iounmap(pdev, card->ioaddr);317 dma_free_coherent(d, 8192, card->tx_buffer, card->tx_dma_handle);318 dma_free_coherent(d, 8192, card->rx_buffer, card->rx_dma_handle);319 free_netdev(dev);320 pci_release_regions(pdev);321 pci_disable_device(pdev);322}323 324static irqreturn_t xircom_interrupt(int irq, void *dev_instance)325{326 struct net_device *dev = (struct net_device *) dev_instance;327 struct xircom_private *card = netdev_priv(dev);328 void __iomem *ioaddr = card->ioaddr;329 unsigned int status;330 int i;331 332 spin_lock(&card->lock);333 status = xr32(CSR5);334 335#if defined DEBUG && DEBUG > 1336 print_binary(status);337 pr_debug("tx status 0x%08x 0x%08x\n",338 card->tx_buffer[0], card->tx_buffer[4]);339 pr_debug("rx status 0x%08x 0x%08x\n",340 card->rx_buffer[0], card->rx_buffer[4]);341#endif342 /* Handle shared irq and hotplug */343 if (status == 0 || status == 0xffffffff) {344 spin_unlock(&card->lock);345 return IRQ_NONE;346 }347 348 if (link_status_changed(card)) {349 int newlink;350 netdev_dbg(dev, "Link status has changed\n");351 newlink = link_status(card);352 netdev_info(dev, "Link is %d mbit\n", newlink);353 if (newlink)354 netif_carrier_on(dev);355 else356 netif_carrier_off(dev);357 358 }359 360 /* Clear all remaining interrupts */361 status |= 0xffffffff; /* FIXME: make this clear only the362 real existing bits */363 xw32(CSR5, status);364 365 366 for (i=0;i<NUMDESCRIPTORS;i++)367 investigate_write_descriptor(dev,card,i,bufferoffsets[i]);368 for (i=0;i<NUMDESCRIPTORS;i++)369 investigate_read_descriptor(dev,card,i,bufferoffsets[i]);370 371 spin_unlock(&card->lock);372 return IRQ_HANDLED;373}374 375static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,376 struct net_device *dev)377{378 struct xircom_private *card;379 unsigned long flags;380 int nextdescriptor;381 int desc;382 383 card = netdev_priv(dev);384 spin_lock_irqsave(&card->lock,flags);385 386 /* First see if we can free some descriptors */387 for (desc=0;desc<NUMDESCRIPTORS;desc++)388 investigate_write_descriptor(dev,card,desc,bufferoffsets[desc]);389 390 391 nextdescriptor = (card->transmit_used +1) % (NUMDESCRIPTORS);392 desc = card->transmit_used;393 394 /* only send the packet if the descriptor is free */395 if (card->tx_buffer[4*desc]==0) {396 /* Copy the packet data; zero the memory first as the card397 sometimes sends more than you ask it to. */398 399 memset(&card->tx_buffer[bufferoffsets[desc]/4],0,1536);400 skb_copy_from_linear_data(skb,401 &(card->tx_buffer[bufferoffsets[desc] / 4]),402 skb->len);403 /* FIXME: The specification tells us that the length we send HAS to be a multiple of404 4 bytes. */405 406 card->tx_buffer[4*desc+1] = cpu_to_le32(skb->len);407 if (desc == NUMDESCRIPTORS - 1) /* bit 25: last descriptor of the ring */408 card->tx_buffer[4*desc+1] |= cpu_to_le32(1<<25); 409 410 card->tx_buffer[4*desc+1] |= cpu_to_le32(0xF0000000);411 /* 0xF0... means want interrupts*/412 card->tx_skb[desc] = skb;413 414 wmb();415 /* This gives the descriptor to the card */416 card->tx_buffer[4*desc] = cpu_to_le32(0x80000000);417 trigger_transmit(card);418 if (card->tx_buffer[nextdescriptor*4] & cpu_to_le32(0x8000000)) {419 /* next descriptor is occupied... */420 netif_stop_queue(dev);421 }422 card->transmit_used = nextdescriptor;423 spin_unlock_irqrestore(&card->lock,flags);424 return NETDEV_TX_OK;425 }426 427 /* Uh oh... no free descriptor... drop the packet */428 netif_stop_queue(dev);429 spin_unlock_irqrestore(&card->lock,flags);430 trigger_transmit(card);431 432 return NETDEV_TX_BUSY;433}434 435 436 437 438static int xircom_open(struct net_device *dev)439{440 struct xircom_private *xp = netdev_priv(dev);441 const int irq = xp->pdev->irq;442 int retval;443 444 netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", irq);445 retval = request_irq(irq, xircom_interrupt, IRQF_SHARED, dev->name, dev);446 if (retval)447 return retval;448 449 xircom_up(xp);450 xp->open = 1;451 452 return 0;453}454 455static int xircom_close(struct net_device *dev)456{457 struct xircom_private *card;458 unsigned long flags;459 460 card = netdev_priv(dev);461 netif_stop_queue(dev); /* we don't want new packets */462 463 464 spin_lock_irqsave(&card->lock,flags);465 466 disable_all_interrupts(card);467#if 0468 /* We can enable this again once we send dummy packets on ifconfig ethX up */469 deactivate_receiver(card);470 deactivate_transmitter(card);471#endif472 remove_descriptors(card);473 474 spin_unlock_irqrestore(&card->lock,flags);475 476 card->open = 0;477 free_irq(card->pdev->irq, dev);478 479 return 0;480 481}482 483 484#ifdef CONFIG_NET_POLL_CONTROLLER485static void xircom_poll_controller(struct net_device *dev)486{487 struct xircom_private *xp = netdev_priv(dev);488 const int irq = xp->pdev->irq;489 490 disable_irq(irq);491 xircom_interrupt(irq, dev);492 enable_irq(irq);493}494#endif495 496 497static void initialize_card(struct xircom_private *card)498{499 void __iomem *ioaddr = card->ioaddr;500 unsigned long flags;501 u32 val;502 503 spin_lock_irqsave(&card->lock, flags);504 505 /* First: reset the card */506 val = xr32(CSR0);507 val |= 0x01; /* Software reset */508 xw32(CSR0, val);509 510 udelay(100); /* give the card some time to reset */511 512 val = xr32(CSR0);513 val &= ~0x01; /* disable Software reset */514 xw32(CSR0, val);515 516 517 val = 0; /* Value 0x00 is a safe and conservative value518 for the PCI configuration settings */519 xw32(CSR0, val);520 521 522 disable_all_interrupts(card);523 deactivate_receiver(card);524 deactivate_transmitter(card);525 526 spin_unlock_irqrestore(&card->lock, flags);527}528 529/*530trigger_transmit causes the card to check for frames to be transmitted.531This is accomplished by writing to the CSR1 port. The documentation532claims that the act of writing is sufficient and that the value is533ignored; I chose zero.534*/535static void trigger_transmit(struct xircom_private *card)536{537 void __iomem *ioaddr = card->ioaddr;538 539 xw32(CSR1, 0);540}541 542/*543trigger_receive causes the card to check for empty frames in the544descriptor list in which packets can be received.545This is accomplished by writing to the CSR2 port. The documentation546claims that the act of writing is sufficient and that the value is547ignored; I chose zero.548*/549static void trigger_receive(struct xircom_private *card)550{551 void __iomem *ioaddr = card->ioaddr;552 553 xw32(CSR2, 0);554}555 556/*557setup_descriptors initializes the send and receive buffers to be valid558descriptors and programs the addresses into the card.559*/560static void setup_descriptors(struct xircom_private *card)561{562 void __iomem *ioaddr = card->ioaddr;563 u32 address;564 int i;565 566 BUG_ON(card->rx_buffer == NULL);567 BUG_ON(card->tx_buffer == NULL);568 569 /* Receive descriptors */570 memset(card->rx_buffer, 0, 128); /* clear the descriptors */571 for (i=0;i<NUMDESCRIPTORS;i++ ) {572 573 /* Rx Descr0: It's empty, let the card own it, no errors -> 0x80000000 */574 card->rx_buffer[i*4 + 0] = cpu_to_le32(0x80000000);575 /* Rx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */576 card->rx_buffer[i*4 + 1] = cpu_to_le32(1536);577 if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */578 card->rx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25);579 580 /* Rx Descr2: address of the buffer581 we store the buffer at the 2nd half of the page */582 583 address = card->rx_dma_handle;584 card->rx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]);585 /* Rx Desc3: address of 2nd buffer -> 0 */586 card->rx_buffer[i*4 + 3] = 0;587 }588 589 wmb();590 /* Write the receive descriptor ring address to the card */591 address = card->rx_dma_handle;592 xw32(CSR3, address); /* Receive descr list address */593 594 595 /* transmit descriptors */596 memset(card->tx_buffer, 0, 128); /* clear the descriptors */597 598 for (i=0;i<NUMDESCRIPTORS;i++ ) {599 /* Tx Descr0: Empty, we own it, no errors -> 0x00000000 */600 card->tx_buffer[i*4 + 0] = 0x00000000;601 /* Tx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */602 card->tx_buffer[i*4 + 1] = cpu_to_le32(1536);603 if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */604 card->tx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25);605 606 /* Tx Descr2: address of the buffer607 we store the buffer at the 2nd half of the page */608 address = card->tx_dma_handle;609 card->tx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]);610 /* Tx Desc3: address of 2nd buffer -> 0 */611 card->tx_buffer[i*4 + 3] = 0;612 }613 614 wmb();615 /* wite the transmit descriptor ring to the card */616 address = card->tx_dma_handle;617 xw32(CSR4, address); /* xmit descr list address */618}619 620/*621remove_descriptors informs the card the descriptors are no longer622valid by setting the address in the card to 0x00.623*/624static void remove_descriptors(struct xircom_private *card)625{626 void __iomem *ioaddr = card->ioaddr;627 unsigned int val;628 629 val = 0;630 xw32(CSR3, val); /* Receive descriptor address */631 xw32(CSR4, val); /* Send descriptor address */632}633 634/*635link_status_changed returns 1 if the card has indicated that636the link status has changed. The new link status has to be read from CSR12.637 638This function also clears the status-bit.639*/640static int link_status_changed(struct xircom_private *card)641{642 void __iomem *ioaddr = card->ioaddr;643 unsigned int val;644 645 val = xr32(CSR5); /* Status register */646 if (!(val & (1 << 27))) /* no change */647 return 0;648 649 /* clear the event by writing a 1 to the bit in the650 status register. */651 val = (1 << 27);652 xw32(CSR5, val);653 654 return 1;655}656 657 658/*659transmit_active returns 1 if the transmitter on the card is660in a non-stopped state.661*/662static int transmit_active(struct xircom_private *card)663{664 void __iomem *ioaddr = card->ioaddr;665 666 if (!(xr32(CSR5) & (7 << 20))) /* transmitter disabled */667 return 0;668 669 return 1;670}671 672/*673receive_active returns 1 if the receiver on the card is674in a non-stopped state.675*/676static int receive_active(struct xircom_private *card)677{678 void __iomem *ioaddr = card->ioaddr;679 680 if (!(xr32(CSR5) & (7 << 17))) /* receiver disabled */681 return 0;682 683 return 1;684}685 686/*687activate_receiver enables the receiver on the card.688Before being allowed to active the receiver, the receiver689must be completely de-activated. To achieve this,690this code actually disables the receiver first; then it waits for the691receiver to become inactive, then it activates the receiver and then692it waits for the receiver to be active.693 694must be called with the lock held and interrupts disabled.695*/696static void activate_receiver(struct xircom_private *card)697{698 void __iomem *ioaddr = card->ioaddr;699 unsigned int val;700 int counter;701 702 val = xr32(CSR6); /* Operation mode */703 704 /* If the "active" bit is set and the receiver is already705 active, no need to do the expensive thing */706 if ((val&2) && (receive_active(card)))707 return;708 709 710 val = val & ~2; /* disable the receiver */711 xw32(CSR6, val);712 713 counter = 10;714 while (counter > 0) {715 if (!receive_active(card))716 break;717 /* wait a while */718 udelay(50);719 counter--;720 if (counter <= 0)721 netdev_err(card->dev, "Receiver failed to deactivate\n");722 }723 724 /* enable the receiver */725 val = xr32(CSR6); /* Operation mode */726 val = val | 2; /* enable the receiver */727 xw32(CSR6, val);728 729 /* now wait for the card to activate again */730 counter = 10;731 while (counter > 0) {732 if (receive_active(card))733 break;734 /* wait a while */735 udelay(50);736 counter--;737 if (counter <= 0)738 netdev_err(card->dev,739 "Receiver failed to re-activate\n");740 }741}742 743/*744deactivate_receiver disables the receiver on the card.745To achieve this this code disables the receiver first;746then it waits for the receiver to become inactive.747 748must be called with the lock held and interrupts disabled.749*/750static void deactivate_receiver(struct xircom_private *card)751{752 void __iomem *ioaddr = card->ioaddr;753 unsigned int val;754 int counter;755 756 val = xr32(CSR6); /* Operation mode */757 val = val & ~2; /* disable the receiver */758 xw32(CSR6, val);759 760 counter = 10;761 while (counter > 0) {762 if (!receive_active(card))763 break;764 /* wait a while */765 udelay(50);766 counter--;767 if (counter <= 0)768 netdev_err(card->dev, "Receiver failed to deactivate\n");769 }770}771 772 773/*774activate_transmitter enables the transmitter on the card.775Before being allowed to active the transmitter, the transmitter776must be completely de-activated. To achieve this,777this code actually disables the transmitter first; then it waits for the778transmitter to become inactive, then it activates the transmitter and then779it waits for the transmitter to be active again.780 781must be called with the lock held and interrupts disabled.782*/783static void activate_transmitter(struct xircom_private *card)784{785 void __iomem *ioaddr = card->ioaddr;786 unsigned int val;787 int counter;788 789 val = xr32(CSR6); /* Operation mode */790 791 /* If the "active" bit is set and the receiver is already792 active, no need to do the expensive thing */793 if ((val&(1<<13)) && (transmit_active(card)))794 return;795 796 val = val & ~(1 << 13); /* disable the transmitter */797 xw32(CSR6, val);798 799 counter = 10;800 while (counter > 0) {801 if (!transmit_active(card))802 break;803 /* wait a while */804 udelay(50);805 counter--;806 if (counter <= 0)807 netdev_err(card->dev,808 "Transmitter failed to deactivate\n");809 }810 811 /* enable the transmitter */812 val = xr32(CSR6); /* Operation mode */813 val = val | (1 << 13); /* enable the transmitter */814 xw32(CSR6, val);815 816 /* now wait for the card to activate again */817 counter = 10;818 while (counter > 0) {819 if (transmit_active(card))820 break;821 /* wait a while */822 udelay(50);823 counter--;824 if (counter <= 0)825 netdev_err(card->dev,826 "Transmitter failed to re-activate\n");827 }828}829 830/*831deactivate_transmitter disables the transmitter on the card.832To achieve this this code disables the transmitter first;833then it waits for the transmitter to become inactive.834 835must be called with the lock held and interrupts disabled.836*/837static void deactivate_transmitter(struct xircom_private *card)838{839 void __iomem *ioaddr = card->ioaddr;840 unsigned int val;841 int counter;842 843 val = xr32(CSR6); /* Operation mode */844 val = val & ~2; /* disable the transmitter */845 xw32(CSR6, val);846 847 counter = 20;848 while (counter > 0) {849 if (!transmit_active(card))850 break;851 /* wait a while */852 udelay(50);853 counter--;854 if (counter <= 0)855 netdev_err(card->dev,856 "Transmitter failed to deactivate\n");857 }858}859 860 861/*862enable_transmit_interrupt enables the transmit interrupt863 864must be called with the lock held and interrupts disabled.865*/866static void enable_transmit_interrupt(struct xircom_private *card)867{868 void __iomem *ioaddr = card->ioaddr;869 unsigned int val;870 871 val = xr32(CSR7); /* Interrupt enable register */872 val |= 1; /* enable the transmit interrupt */873 xw32(CSR7, val);874}875 876 877/*878enable_receive_interrupt enables the receive interrupt879 880must be called with the lock held and interrupts disabled.881*/882static void enable_receive_interrupt(struct xircom_private *card)883{884 void __iomem *ioaddr = card->ioaddr;885 unsigned int val;886 887 val = xr32(CSR7); /* Interrupt enable register */888 val = val | (1 << 6); /* enable the receive interrupt */889 xw32(CSR7, val);890}891 892/*893enable_link_interrupt enables the link status change interrupt894 895must be called with the lock held and interrupts disabled.896*/897static void enable_link_interrupt(struct xircom_private *card)898{899 void __iomem *ioaddr = card->ioaddr;900 unsigned int val;901 902 val = xr32(CSR7); /* Interrupt enable register */903 val = val | (1 << 27); /* enable the link status chage interrupt */904 xw32(CSR7, val);905}906 907 908 909/*910disable_all_interrupts disables all interrupts911 912must be called with the lock held and interrupts disabled.913*/914static void disable_all_interrupts(struct xircom_private *card)915{916 void __iomem *ioaddr = card->ioaddr;917 918 xw32(CSR7, 0);919}920 921/*922enable_common_interrupts enables several weird interrupts923 924must be called with the lock held and interrupts disabled.925*/926static void enable_common_interrupts(struct xircom_private *card)927{928 void __iomem *ioaddr = card->ioaddr;929 unsigned int val;930 931 val = xr32(CSR7); /* Interrupt enable register */932 val |= (1<<16); /* Normal Interrupt Summary */933 val |= (1<<15); /* Abnormal Interrupt Summary */934 val |= (1<<13); /* Fatal bus error */935 val |= (1<<8); /* Receive Process Stopped */936 val |= (1<<7); /* Receive Buffer Unavailable */937 val |= (1<<5); /* Transmit Underflow */938 val |= (1<<2); /* Transmit Buffer Unavailable */939 val |= (1<<1); /* Transmit Process Stopped */940 xw32(CSR7, val);941}942 943/*944enable_promisc starts promisc mode945 946must be called with the lock held and interrupts disabled.947*/948static int enable_promisc(struct xircom_private *card)949{950 void __iomem *ioaddr = card->ioaddr;951 unsigned int val;952 953 val = xr32(CSR6);954 val = val | (1 << 6);955 xw32(CSR6, val);956 957 return 1;958}959 960 961 962 963/*964link_status() checks the links status and will return 0 for no link, 10 for 10mbit link and 100 for.. guess what.965 966Must be called in locked state with interrupts disabled967*/968static int link_status(struct xircom_private *card)969{970 void __iomem *ioaddr = card->ioaddr;971 u8 val;972 973 val = xr8(CSR12);974 975 /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */976 if (!(val & (1 << 2)))977 return 10;978 /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */979 if (!(val & (1 << 1)))980 return 100;981 982 /* If we get here -> no link at all */983 984 return 0;985}986 987 988 989 990 991/*992 read_mac_address() reads the MAC address from the NIC and stores it in the "dev" structure.993 994 This function will take the spinlock itself and can, as a result, not be called with the lock helt.995 */996static void read_mac_address(struct xircom_private *card)997{998 void __iomem *ioaddr = card->ioaddr;999 unsigned long flags;1000 u8 link;1001 int i;1002 1003 spin_lock_irqsave(&card->lock, flags);1004 1005 xw32(CSR9, 1 << 12); /* enable boot rom access */1006 for (i = 0x100; i < 0x1f7; i += link + 2) {1007 u8 tuple, data_id, data_count;1008 1009 xw32(CSR10, i);1010 tuple = xr32(CSR9);1011 xw32(CSR10, i + 1);1012 link = xr32(CSR9);1013 xw32(CSR10, i + 2);1014 data_id = xr32(CSR9);1015 xw32(CSR10, i + 3);1016 data_count = xr32(CSR9);1017 if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) {1018 u8 addr[ETH_ALEN];1019 int j;1020 1021 for (j = 0; j < 6; j++) {1022 xw32(CSR10, i + j + 4);1023 addr[j] = xr32(CSR9) & 0xff;1024 }1025 eth_hw_addr_set(card->dev, addr);1026 break;1027 } else if (link == 0) {1028 break;1029 }1030 }1031 spin_unlock_irqrestore(&card->lock, flags);1032 pr_debug(" %pM\n", card->dev->dev_addr);1033}1034 1035 1036/*1037 transceiver_voodoo() enables the external UTP plug thingy.1038 it's called voodoo as I stole this code and cannot cross-reference1039 it with the specification.1040 */1041static void transceiver_voodoo(struct xircom_private *card)1042{1043 void __iomem *ioaddr = card->ioaddr;1044 unsigned long flags;1045 1046 /* disable all powermanagement */1047 pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000);1048 1049 setup_descriptors(card);1050 1051 spin_lock_irqsave(&card->lock, flags);1052 1053 xw32(CSR15, 0x0008);1054 udelay(25);1055 xw32(CSR15, 0xa8050000);1056 udelay(25);1057 xw32(CSR15, 0xa00f0000);1058 udelay(25);1059 1060 spin_unlock_irqrestore(&card->lock, flags);1061 1062 netif_start_queue(card->dev);1063}1064 1065 1066static void xircom_up(struct xircom_private *card)1067{1068 unsigned long flags;1069 int i;1070 1071 /* disable all powermanagement */1072 pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000);1073 1074 setup_descriptors(card);1075 1076 spin_lock_irqsave(&card->lock, flags);1077 1078 1079 enable_link_interrupt(card);1080 enable_transmit_interrupt(card);1081 enable_receive_interrupt(card);1082 enable_common_interrupts(card);1083 enable_promisc(card);1084 1085 /* The card can have received packets already, read them away now */1086 for (i=0;i<NUMDESCRIPTORS;i++)1087 investigate_read_descriptor(card->dev,card,i,bufferoffsets[i]);1088 1089 1090 spin_unlock_irqrestore(&card->lock, flags);1091 trigger_receive(card);1092 trigger_transmit(card);1093 netif_start_queue(card->dev);1094}1095 1096/* Bufferoffset is in BYTES */1097static void1098investigate_read_descriptor(struct net_device *dev, struct xircom_private *card,1099 int descnr, unsigned int bufferoffset)1100{1101 int status;1102 1103 status = le32_to_cpu(card->rx_buffer[4*descnr]);1104 1105 if (status > 0) { /* packet received */1106 1107 /* TODO: discard error packets */1108 1109 short pkt_len = ((status >> 16) & 0x7ff) - 4;1110 /* minus 4, we don't want the CRC */1111 struct sk_buff *skb;1112 1113 if (pkt_len > 1518) {1114 netdev_err(dev, "Packet length %i is bogus\n", pkt_len);1115 pkt_len = 1518;1116 }1117 1118 skb = netdev_alloc_skb(dev, pkt_len + 2);1119 if (skb == NULL) {1120 dev->stats.rx_dropped++;1121 goto out;1122 }1123 skb_reserve(skb, 2);1124 skb_copy_to_linear_data(skb,1125 &card->rx_buffer[bufferoffset / 4],1126 pkt_len);1127 skb_put(skb, pkt_len);1128 skb->protocol = eth_type_trans(skb, dev);1129 netif_rx(skb);1130 dev->stats.rx_packets++;1131 dev->stats.rx_bytes += pkt_len;1132 1133out:1134 /* give the buffer back to the card */1135 card->rx_buffer[4*descnr] = cpu_to_le32(0x80000000);1136 trigger_receive(card);1137 }1138}1139 1140 1141/* Bufferoffset is in BYTES */1142static void1143investigate_write_descriptor(struct net_device *dev,1144 struct xircom_private *card,1145 int descnr, unsigned int bufferoffset)1146{1147 int status;1148 1149 status = le32_to_cpu(card->tx_buffer[4*descnr]);1150#if 01151 if (status & 0x8000) { /* Major error */1152 pr_err("Major transmit error status %x\n", status);1153 card->tx_buffer[4*descnr] = 0;1154 netif_wake_queue (dev);1155 }1156#endif1157 if (status > 0) { /* bit 31 is 0 when done */1158 if (card->tx_skb[descnr]!=NULL) {1159 dev->stats.tx_bytes += card->tx_skb[descnr]->len;1160 dev_kfree_skb_irq(card->tx_skb[descnr]);1161 }1162 card->tx_skb[descnr] = NULL;1163 /* Bit 8 in the status field is 1 if there was a collision */1164 if (status & (1 << 8))1165 dev->stats.collisions++;1166 card->tx_buffer[4*descnr] = 0; /* descriptor is free again */1167 netif_wake_queue (dev);1168 dev->stats.tx_packets++;1169 }1170}1171 1172module_pci_driver(xircom_ops);1173