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1/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */2/* Copyright 2013-2016 Freescale Semiconductor Inc.3 * Copyright 2016 NXP4 * Copyright 2020 NXP5 */6#ifndef _FSL_DPNI_CMD_H7#define _FSL_DPNI_CMD_H8 9#include "dpni.h"10 11/* DPNI Version */12#define DPNI_VER_MAJOR 713#define DPNI_VER_MINOR 014#define DPNI_CMD_BASE_VERSION 115#define DPNI_CMD_2ND_VERSION 216#define DPNI_CMD_3RD_VERSION 317#define DPNI_CMD_ID_OFFSET 418 19#define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)20#define DPNI_CMD_V2(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_2ND_VERSION)21#define DPNI_CMD_V3(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_3RD_VERSION)22 23#define DPNI_CMDID_OPEN DPNI_CMD(0x801)24#define DPNI_CMDID_CLOSE DPNI_CMD(0x800)25#define DPNI_CMDID_CREATE DPNI_CMD(0x901)26#define DPNI_CMDID_DESTROY DPNI_CMD(0x900)27#define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01)28 29#define DPNI_CMDID_ENABLE DPNI_CMD(0x002)30#define DPNI_CMDID_DISABLE DPNI_CMD(0x003)31#define DPNI_CMDID_GET_ATTR DPNI_CMD(0x004)32#define DPNI_CMDID_RESET DPNI_CMD(0x005)33#define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006)34 35#define DPNI_CMDID_SET_IRQ DPNI_CMD(0x010)36#define DPNI_CMDID_GET_IRQ DPNI_CMD(0x011)37#define DPNI_CMDID_SET_IRQ_ENABLE DPNI_CMD(0x012)38#define DPNI_CMDID_GET_IRQ_ENABLE DPNI_CMD(0x013)39#define DPNI_CMDID_SET_IRQ_MASK DPNI_CMD(0x014)40#define DPNI_CMDID_GET_IRQ_MASK DPNI_CMD(0x015)41#define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016)42#define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017)43 44#define DPNI_CMDID_SET_POOLS DPNI_CMD_V3(0x200)45#define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B)46 47#define DPNI_CMDID_GET_QDID DPNI_CMD(0x210)48#define DPNI_CMDID_GET_TX_DATA_OFFSET DPNI_CMD(0x212)49#define DPNI_CMDID_GET_LINK_STATE DPNI_CMD(0x215)50#define DPNI_CMDID_SET_MAX_FRAME_LENGTH DPNI_CMD(0x216)51#define DPNI_CMDID_GET_MAX_FRAME_LENGTH DPNI_CMD(0x217)52#define DPNI_CMDID_SET_LINK_CFG DPNI_CMD(0x21A)53#define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD_V2(0x21B)54 55#define DPNI_CMDID_SET_MCAST_PROMISC DPNI_CMD(0x220)56#define DPNI_CMDID_GET_MCAST_PROMISC DPNI_CMD(0x221)57#define DPNI_CMDID_SET_UNICAST_PROMISC DPNI_CMD(0x222)58#define DPNI_CMDID_GET_UNICAST_PROMISC DPNI_CMD(0x223)59#define DPNI_CMDID_SET_PRIM_MAC DPNI_CMD(0x224)60#define DPNI_CMDID_GET_PRIM_MAC DPNI_CMD(0x225)61#define DPNI_CMDID_ADD_MAC_ADDR DPNI_CMD(0x226)62#define DPNI_CMDID_REMOVE_MAC_ADDR DPNI_CMD(0x227)63#define DPNI_CMDID_CLR_MAC_FILTERS DPNI_CMD(0x228)64 65#define DPNI_CMDID_SET_RX_TC_DIST DPNI_CMD(0x235)66 67#define DPNI_CMDID_ENABLE_VLAN_FILTER DPNI_CMD(0x230)68#define DPNI_CMDID_ADD_VLAN_ID DPNI_CMD_V2(0x231)69#define DPNI_CMDID_REMOVE_VLAN_ID DPNI_CMD(0x232)70 71#define DPNI_CMDID_SET_QOS_TBL DPNI_CMD(0x240)72#define DPNI_CMDID_ADD_QOS_ENT DPNI_CMD(0x241)73#define DPNI_CMDID_REMOVE_QOS_ENT DPNI_CMD(0x242)74#define DPNI_CMDID_CLR_QOS_TBL DPNI_CMD(0x243)75#define DPNI_CMDID_ADD_FS_ENT DPNI_CMD(0x244)76#define DPNI_CMDID_REMOVE_FS_ENT DPNI_CMD(0x245)77#define DPNI_CMDID_CLR_FS_ENT DPNI_CMD(0x246)78 79#define DPNI_CMDID_GET_STATISTICS DPNI_CMD(0x25D)80#define DPNI_CMDID_GET_QUEUE DPNI_CMD(0x25F)81#define DPNI_CMDID_SET_QUEUE DPNI_CMD(0x260)82#define DPNI_CMDID_GET_TAILDROP DPNI_CMD(0x261)83#define DPNI_CMDID_SET_TAILDROP DPNI_CMD(0x262)84 85#define DPNI_CMDID_GET_PORT_MAC_ADDR DPNI_CMD(0x263)86 87#define DPNI_CMDID_GET_BUFFER_LAYOUT DPNI_CMD(0x264)88#define DPNI_CMDID_SET_BUFFER_LAYOUT DPNI_CMD(0x265)89 90#define DPNI_CMDID_SET_TX_CONFIRMATION_MODE DPNI_CMD(0x266)91#define DPNI_CMDID_SET_CONGESTION_NOTIFICATION DPNI_CMD(0x267)92#define DPNI_CMDID_GET_CONGESTION_NOTIFICATION DPNI_CMD(0x268)93#define DPNI_CMDID_SET_EARLY_DROP DPNI_CMD(0x269)94#define DPNI_CMDID_GET_EARLY_DROP DPNI_CMD(0x26A)95#define DPNI_CMDID_GET_OFFLOAD DPNI_CMD(0x26B)96#define DPNI_CMDID_SET_OFFLOAD DPNI_CMD(0x26C)97 98#define DPNI_CMDID_SET_RX_FS_DIST DPNI_CMD(0x273)99#define DPNI_CMDID_SET_RX_HASH_DIST DPNI_CMD(0x274)100#define DPNI_CMDID_GET_LINK_CFG DPNI_CMD(0x278)101 102#define DPNI_CMDID_SET_SINGLE_STEP_CFG DPNI_CMD(0x279)103#define DPNI_CMDID_GET_SINGLE_STEP_CFG DPNI_CMD_V2(0x27a)104 105/* Macros for accessing command fields smaller than 1byte */106#define DPNI_MASK(field) \107 GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \108 DPNI_##field##_SHIFT)109 110#define dpni_set_field(var, field, val) \111 ((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))112#define dpni_get_field(var, field) \113 (((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)114 115struct dpni_cmd_open {116 __le32 dpni_id;117};118 119#define DPNI_BACKUP_POOL(val, order) (((val) & 0x1) << (order))120 121struct dpni_cmd_pool {122 __le16 dpbp_id;123 u8 priority_mask;124 u8 pad;125};126 127struct dpni_cmd_set_pools {128 u8 num_dpbp;129 u8 backup_pool_mask;130 u8 pad;131 u8 pool_options;132 struct dpni_cmd_pool pool[DPNI_MAX_DPBP];133 __le16 buffer_size[DPNI_MAX_DPBP];134};135 136/* The enable indication is always the least significant bit */137#define DPNI_ENABLE_SHIFT 0138#define DPNI_ENABLE_SIZE 1139 140struct dpni_rsp_is_enabled {141 u8 enabled;142};143 144struct dpni_rsp_get_irq {145 /* response word 0 */146 __le32 irq_val;147 __le32 pad;148 /* response word 1 */149 __le64 irq_addr;150 /* response word 2 */151 __le32 irq_num;152 __le32 type;153};154 155struct dpni_cmd_set_irq_enable {156 u8 enable;157 u8 pad[3];158 u8 irq_index;159};160 161struct dpni_cmd_get_irq_enable {162 __le32 pad;163 u8 irq_index;164};165 166struct dpni_rsp_get_irq_enable {167 u8 enabled;168};169 170struct dpni_cmd_set_irq_mask {171 __le32 mask;172 u8 irq_index;173};174 175struct dpni_cmd_get_irq_mask {176 __le32 pad;177 u8 irq_index;178};179 180struct dpni_rsp_get_irq_mask {181 __le32 mask;182};183 184struct dpni_cmd_get_irq_status {185 __le32 status;186 u8 irq_index;187};188 189struct dpni_rsp_get_irq_status {190 __le32 status;191};192 193struct dpni_cmd_clear_irq_status {194 __le32 status;195 u8 irq_index;196};197 198struct dpni_rsp_get_attr {199 /* response word 0 */200 __le32 options;201 u8 num_queues;202 u8 num_tcs;203 u8 mac_filter_entries;204 u8 pad0;205 /* response word 1 */206 u8 vlan_filter_entries;207 u8 pad1;208 u8 qos_entries;209 u8 pad2;210 __le16 fs_entries;211 __le16 pad3;212 /* response word 2 */213 u8 qos_key_size;214 u8 fs_key_size;215 __le16 wriop_version;216};217 218#define DPNI_ERROR_ACTION_SHIFT 0219#define DPNI_ERROR_ACTION_SIZE 4220#define DPNI_FRAME_ANN_SHIFT 4221#define DPNI_FRAME_ANN_SIZE 1222 223struct dpni_cmd_set_errors_behavior {224 __le32 errors;225 /* from least significant bit: error_action:4, set_frame_annotation:1 */226 u8 flags;227};228 229/* There are 3 separate commands for configuring Rx, Tx and Tx confirmation230 * buffer layouts, but they all share the same parameters.231 * If one of the functions changes, below structure needs to be split.232 */233 234#define DPNI_PASS_TS_SHIFT 0235#define DPNI_PASS_TS_SIZE 1236#define DPNI_PASS_PR_SHIFT 1237#define DPNI_PASS_PR_SIZE 1238#define DPNI_PASS_FS_SHIFT 2239#define DPNI_PASS_FS_SIZE 1240 241struct dpni_cmd_get_buffer_layout {242 u8 qtype;243};244 245struct dpni_rsp_get_buffer_layout {246 /* response word 0 */247 u8 pad0[6];248 /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */249 u8 flags;250 u8 pad1;251 /* response word 1 */252 __le16 private_data_size;253 __le16 data_align;254 __le16 head_room;255 __le16 tail_room;256};257 258struct dpni_cmd_set_buffer_layout {259 /* cmd word 0 */260 u8 qtype;261 u8 pad0[3];262 __le16 options;263 /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */264 u8 flags;265 u8 pad1;266 /* cmd word 1 */267 __le16 private_data_size;268 __le16 data_align;269 __le16 head_room;270 __le16 tail_room;271};272 273struct dpni_cmd_set_offload {274 u8 pad[3];275 u8 dpni_offload;276 __le32 config;277};278 279struct dpni_cmd_get_offload {280 u8 pad[3];281 u8 dpni_offload;282};283 284struct dpni_rsp_get_offload {285 __le32 pad;286 __le32 config;287};288 289struct dpni_cmd_get_qdid {290 u8 qtype;291};292 293struct dpni_rsp_get_qdid {294 __le16 qdid;295};296 297struct dpni_rsp_get_tx_data_offset {298 __le16 data_offset;299};300 301struct dpni_cmd_get_statistics {302 u8 page_number;303};304 305struct dpni_rsp_get_statistics {306 __le64 counter[DPNI_STATISTICS_CNT];307};308 309struct dpni_cmd_link_cfg {310 /* cmd word 0 */311 __le64 pad0;312 /* cmd word 1 */313 __le32 rate;314 __le32 pad1;315 /* cmd word 2 */316 __le64 options;317};318 319#define DPNI_LINK_STATE_SHIFT 0320#define DPNI_LINK_STATE_SIZE 1321 322struct dpni_rsp_get_link_state {323 /* response word 0 */324 __le32 pad0;325 /* from LSB: up:1 */326 u8 flags;327 u8 pad1[3];328 /* response word 1 */329 __le32 rate;330 __le32 pad2;331 /* response word 2 */332 __le64 options;333};334 335struct dpni_cmd_set_max_frame_length {336 __le16 max_frame_length;337};338 339struct dpni_rsp_get_max_frame_length {340 __le16 max_frame_length;341};342 343struct dpni_cmd_set_multicast_promisc {344 u8 enable;345};346 347struct dpni_rsp_get_multicast_promisc {348 u8 enabled;349};350 351struct dpni_cmd_set_unicast_promisc {352 u8 enable;353};354 355struct dpni_rsp_get_unicast_promisc {356 u8 enabled;357};358 359struct dpni_cmd_set_primary_mac_addr {360 __le16 pad;361 u8 mac_addr[6];362};363 364struct dpni_rsp_get_primary_mac_addr {365 __le16 pad;366 u8 mac_addr[6];367};368 369struct dpni_rsp_get_port_mac_addr {370 __le16 pad;371 u8 mac_addr[6];372};373 374struct dpni_cmd_add_mac_addr {375 __le16 pad;376 u8 mac_addr[6];377};378 379struct dpni_cmd_remove_mac_addr {380 __le16 pad;381 u8 mac_addr[6];382};383 384#define DPNI_UNICAST_FILTERS_SHIFT 0385#define DPNI_UNICAST_FILTERS_SIZE 1386#define DPNI_MULTICAST_FILTERS_SHIFT 1387#define DPNI_MULTICAST_FILTERS_SIZE 1388 389struct dpni_cmd_clear_mac_filters {390 /* from LSB: unicast:1, multicast:1 */391 u8 flags;392};393 394#define DPNI_DIST_MODE_SHIFT 0395#define DPNI_DIST_MODE_SIZE 4396#define DPNI_MISS_ACTION_SHIFT 4397#define DPNI_MISS_ACTION_SIZE 4398 399struct dpni_cmd_set_rx_tc_dist {400 /* cmd word 0 */401 __le16 dist_size;402 u8 tc_id;403 /* from LSB: dist_mode:4, miss_action:4 */404 u8 flags;405 __le16 pad0;406 __le16 default_flow_id;407 /* cmd word 1..5 */408 __le64 pad1[5];409 /* cmd word 6 */410 __le64 key_cfg_iova;411};412 413/* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at414 * key_cfg_iova)415 */416struct dpni_mask_cfg {417 u8 mask;418 u8 offset;419};420 421#define DPNI_EFH_TYPE_SHIFT 0422#define DPNI_EFH_TYPE_SIZE 4423#define DPNI_EXTRACT_TYPE_SHIFT 0424#define DPNI_EXTRACT_TYPE_SIZE 4425 426struct dpni_dist_extract {427 /* word 0 */428 u8 prot;429 /* EFH type stored in the 4 least significant bits */430 u8 efh_type;431 u8 size;432 u8 offset;433 __le32 field;434 /* word 1 */435 u8 hdr_index;436 u8 constant;437 u8 num_of_repeats;438 u8 num_of_byte_masks;439 /* Extraction type is stored in the 4 LSBs */440 u8 extract_type;441 u8 pad[3];442 /* word 2 */443 struct dpni_mask_cfg masks[4];444};445 446struct dpni_ext_set_rx_tc_dist {447 /* extension word 0 */448 u8 num_extracts;449 u8 pad[7];450 /* words 1..25 */451 struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];452};453 454struct dpni_cmd_get_queue {455 u8 qtype;456 u8 tc;457 u8 index;458};459 460#define DPNI_DEST_TYPE_SHIFT 0461#define DPNI_DEST_TYPE_SIZE 4462#define DPNI_STASH_CTRL_SHIFT 6463#define DPNI_STASH_CTRL_SIZE 1464#define DPNI_HOLD_ACTIVE_SHIFT 7465#define DPNI_HOLD_ACTIVE_SIZE 1466 467struct dpni_rsp_get_queue {468 /* response word 0 */469 __le64 pad0;470 /* response word 1 */471 __le32 dest_id;472 __le16 pad1;473 u8 dest_prio;474 /* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */475 u8 flags;476 /* response word 2 */477 __le64 flc;478 /* response word 3 */479 __le64 user_context;480 /* response word 4 */481 __le32 fqid;482 __le16 qdbin;483};484 485struct dpni_cmd_set_queue {486 /* cmd word 0 */487 u8 qtype;488 u8 tc;489 u8 index;490 u8 options;491 __le32 pad0;492 /* cmd word 1 */493 __le32 dest_id;494 __le16 pad1;495 u8 dest_prio;496 u8 flags;497 /* cmd word 2 */498 __le64 flc;499 /* cmd word 3 */500 __le64 user_context;501};502 503struct dpni_cmd_set_taildrop {504 /* cmd word 0 */505 u8 congestion_point;506 u8 qtype;507 u8 tc;508 u8 index;509 __le32 pad0;510 /* cmd word 1 */511 /* Only least significant bit is relevant */512 u8 enable;513 u8 pad1;514 u8 units;515 u8 pad2;516 __le32 threshold;517};518 519struct dpni_cmd_get_taildrop {520 u8 congestion_point;521 u8 qtype;522 u8 tc;523 u8 index;524};525 526struct dpni_rsp_get_taildrop {527 /* cmd word 0 */528 __le64 pad0;529 /* cmd word 1 */530 /* only least significant bit is relevant */531 u8 enable;532 u8 pad1;533 u8 units;534 u8 pad2;535 __le32 threshold;536};537 538struct dpni_rsp_get_api_version {539 __le16 major;540 __le16 minor;541};542 543#define DPNI_RX_FS_DIST_ENABLE_SHIFT 0544#define DPNI_RX_FS_DIST_ENABLE_SIZE 1545struct dpni_cmd_set_rx_fs_dist {546 __le16 dist_size;547 u8 enable;548 u8 tc;549 __le16 miss_flow_id;550 __le16 pad;551 __le64 key_cfg_iova;552};553 554#define DPNI_RX_HASH_DIST_ENABLE_SHIFT 0555#define DPNI_RX_HASH_DIST_ENABLE_SIZE 1556struct dpni_cmd_set_rx_hash_dist {557 __le16 dist_size;558 u8 enable;559 u8 tc;560 __le32 pad;561 __le64 key_cfg_iova;562};563 564struct dpni_cmd_add_fs_entry {565 /* cmd word 0 */566 __le16 options;567 u8 tc_id;568 u8 key_size;569 __le16 index;570 __le16 flow_id;571 /* cmd word 1 */572 __le64 key_iova;573 /* cmd word 2 */574 __le64 mask_iova;575 /* cmd word 3 */576 __le64 flc;577};578 579struct dpni_cmd_remove_fs_entry {580 /* cmd word 0 */581 __le16 pad0;582 u8 tc_id;583 u8 key_size;584 __le32 pad1;585 /* cmd word 1 */586 __le64 key_iova;587 /* cmd word 2 */588 __le64 mask_iova;589};590 591#define DPNI_DISCARD_ON_MISS_SHIFT 0592#define DPNI_DISCARD_ON_MISS_SIZE 1593 594struct dpni_cmd_set_qos_table {595 __le32 pad;596 u8 default_tc;597 /* only the LSB */598 u8 discard_on_miss;599 __le16 pad1[21];600 __le64 key_cfg_iova;601};602 603struct dpni_cmd_add_qos_entry {604 __le16 pad;605 u8 tc_id;606 u8 key_size;607 __le16 index;608 __le16 pad1;609 __le64 key_iova;610 __le64 mask_iova;611};612 613struct dpni_cmd_remove_qos_entry {614 u8 pad[3];615 u8 key_size;616 __le32 pad1;617 __le64 key_iova;618 __le64 mask_iova;619};620 621#define DPNI_DEST_TYPE_SHIFT 0622#define DPNI_DEST_TYPE_SIZE 4623#define DPNI_CONG_UNITS_SHIFT 4624#define DPNI_CONG_UNITS_SIZE 2625 626struct dpni_cmd_set_congestion_notification {627 /* cmd word 0 */628 u8 qtype;629 u8 tc;630 u8 pad[6];631 /* cmd word 1 */632 __le32 dest_id;633 __le16 notification_mode;634 u8 dest_priority;635 /* from LSB: dest_type: 4 units:2 */636 u8 type_units;637 /* cmd word 2 */638 __le64 message_iova;639 /* cmd word 3 */640 __le64 message_ctx;641 /* cmd word 4 */642 __le32 threshold_entry;643 __le32 threshold_exit;644};645 646#define DPNI_COUPLED_SHIFT 0647#define DPNI_COUPLED_SIZE 1648 649struct dpni_cmd_set_tx_shaping {650 __le16 tx_cr_max_burst_size;651 __le16 tx_er_max_burst_size;652 __le32 pad;653 __le32 tx_cr_rate_limit;654 __le32 tx_er_rate_limit;655 /* from LSB: coupled:1 */656 u8 coupled;657};658 659#define DPNI_PTP_ENABLE_SHIFT 0660#define DPNI_PTP_ENABLE_SIZE 1661#define DPNI_PTP_CH_UPDATE_SHIFT 1662#define DPNI_PTP_CH_UPDATE_SIZE 1663 664struct dpni_cmd_single_step_cfg {665 __le16 flags;666 __le16 offset;667 __le32 peer_delay;668 __le32 ptp_onestep_reg_base;669 __le32 pad0;670};671 672struct dpni_rsp_single_step_cfg {673 __le16 flags;674 __le16 offset;675 __le32 peer_delay;676 __le32 ptp_onestep_reg_base;677 __le32 pad0;678};679 680struct dpni_cmd_enable_vlan_filter {681 /* only the LSB */682 u8 en;683};684 685struct dpni_cmd_vlan_id {686 u8 flags;687 u8 tc_id;688 u8 flow_id;689 u8 pad;690 __le16 vlan_id;691};692 693#endif /* _FSL_DPNI_CMD_H */694