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1/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */2/* Copyright 2017-2019 NXP */3 4#include <linux/timer.h>5#include <linux/pci.h>6#include <linux/netdevice.h>7#include <linux/etherdevice.h>8#include <linux/dma-mapping.h>9#include <linux/skbuff.h>10#include <linux/ethtool.h>11#include <linux/if_vlan.h>12#include <linux/phylink.h>13#include <linux/dim.h>14#include <net/xdp.h>15 16#include "enetc_hw.h"17 18#define ENETC_MAC_MAXFRM_SIZE 960019#define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \20 (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))21 22#define ENETC_CBD_DATA_MEM_ALIGN 6423 24struct enetc_tx_swbd {25 union {26 struct sk_buff *skb;27 struct xdp_frame *xdp_frame;28 };29 dma_addr_t dma;30 struct page *page; /* valid only if is_xdp_tx */31 u16 page_offset; /* valid only if is_xdp_tx */32 u16 len;33 enum dma_data_direction dir;34 u8 is_dma_page:1;35 u8 check_wb:1;36 u8 do_twostep_tstamp:1;37 u8 is_eof:1;38 u8 is_xdp_tx:1;39 u8 is_xdp_redirect:1;40 u8 qbv_en:1;41};42 43#define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE44#define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */45#define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */46#define ENETC_RXB_DMA_SIZE \47 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)48#define ENETC_RXB_DMA_SIZE_XDP \49 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM)50 51struct enetc_rx_swbd {52 dma_addr_t dma;53 struct page *page;54 u16 page_offset;55 enum dma_data_direction dir;56 u16 len;57};58 59/* ENETC overhead: optional extension BD + 1 BD gap */60#define ENETC_TXBDS_NEEDED(val) ((val) + 2)61/* max # of chained Tx BDs is 15, including head and extension BD */62#define ENETC_MAX_SKB_FRAGS 1363#define ENETC_TXBDS_MAX_NEEDED ENETC_TXBDS_NEEDED(ENETC_MAX_SKB_FRAGS + 1)64 65struct enetc_ring_stats {66 unsigned int packets;67 unsigned int bytes;68 unsigned int rx_alloc_errs;69 unsigned int xdp_drops;70 unsigned int xdp_tx;71 unsigned int xdp_tx_drops;72 unsigned int xdp_redirect;73 unsigned int xdp_redirect_failures;74 unsigned int recycles;75 unsigned int recycle_failures;76 unsigned int win_drop;77};78 79struct enetc_xdp_data {80 struct xdp_rxq_info rxq;81 struct bpf_prog *prog;82 int xdp_tx_in_flight;83};84 85#define ENETC_RX_RING_DEFAULT_SIZE 204886#define ENETC_TX_RING_DEFAULT_SIZE 204887#define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2)88 89struct enetc_bdr_resource {90 /* Input arguments saved for teardown */91 struct device *dev; /* for DMA mapping */92 size_t bd_count;93 size_t bd_size;94 95 /* Resource proper */96 void *bd_base; /* points to Rx or Tx BD ring */97 dma_addr_t bd_dma_base;98 union {99 struct enetc_tx_swbd *tx_swbd;100 struct enetc_rx_swbd *rx_swbd;101 };102 char *tso_headers;103 dma_addr_t tso_headers_dma;104};105 106struct enetc_bdr {107 struct device *dev; /* for DMA mapping */108 struct net_device *ndev;109 void *bd_base; /* points to Rx or Tx BD ring */110 union {111 void __iomem *tpir;112 void __iomem *rcir;113 };114 u16 index;115 u16 prio;116 int bd_count; /* # of BDs */117 int next_to_use;118 int next_to_clean;119 union {120 struct enetc_tx_swbd *tx_swbd;121 struct enetc_rx_swbd *rx_swbd;122 };123 union {124 void __iomem *tcir; /* Tx */125 int next_to_alloc; /* Rx */126 };127 void __iomem *idr; /* Interrupt Detect Register pointer */128 129 int buffer_offset;130 struct enetc_xdp_data xdp;131 132 struct enetc_ring_stats stats;133 134 dma_addr_t bd_dma_base;135 u8 tsd_enable; /* Time specific departure */136 bool ext_en; /* enable h/w descriptor extensions */137 138 /* DMA buffer for TSO headers */139 char *tso_headers;140 dma_addr_t tso_headers_dma;141} ____cacheline_aligned_in_smp;142 143static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)144{145 if (unlikely(++*i == bdr->bd_count))146 *i = 0;147}148 149static inline int enetc_bd_unused(struct enetc_bdr *bdr)150{151 if (bdr->next_to_clean > bdr->next_to_use)152 return bdr->next_to_clean - bdr->next_to_use - 1;153 154 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;155}156 157static inline int enetc_swbd_unused(struct enetc_bdr *bdr)158{159 if (bdr->next_to_clean > bdr->next_to_alloc)160 return bdr->next_to_clean - bdr->next_to_alloc - 1;161 162 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1;163}164 165/* Control BD ring */166#define ENETC_CBDR_DEFAULT_SIZE 64167struct enetc_cbdr {168 void *bd_base; /* points to Rx or Tx BD ring */169 void __iomem *pir;170 void __iomem *cir;171 void __iomem *mr; /* mode register */172 173 int bd_count; /* # of BDs */174 int next_to_use;175 int next_to_clean;176 177 dma_addr_t bd_dma_base;178 struct device *dma_dev;179};180 181#define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))182 183static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)184{185 int hw_idx = i;186 187 if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK) && rx_ring->ext_en)188 hw_idx = 2 * i;189 190 return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]);191}192 193static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,194 union enetc_rx_bd **old_rxbd, int *old_index)195{196 union enetc_rx_bd *new_rxbd = *old_rxbd;197 int new_index = *old_index;198 199 new_rxbd++;200 201 if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK) && rx_ring->ext_en)202 new_rxbd++;203 204 if (unlikely(++new_index == rx_ring->bd_count)) {205 new_rxbd = rx_ring->bd_base;206 new_index = 0;207 }208 209 *old_rxbd = new_rxbd;210 *old_index = new_index;211}212 213static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd)214{215 return ++rxbd;216}217 218struct enetc_msg_swbd {219 void *vaddr;220 dma_addr_t dma;221 int size;222};223 224#define ENETC_REV1 0x1225enum enetc_errata {226 ENETC_ERR_VLAN_ISOL = BIT(0),227 ENETC_ERR_UCMCSWP = BIT(1),228};229 230#define ENETC_SI_F_PSFP BIT(0)231#define ENETC_SI_F_QBV BIT(1)232#define ENETC_SI_F_QBU BIT(2)233 234/* PCI IEP device data */235struct enetc_si {236 struct pci_dev *pdev;237 struct enetc_hw hw;238 enum enetc_errata errata;239 240 struct net_device *ndev; /* back ref. */241 242 struct enetc_cbdr cbd_ring;243 244 int num_rx_rings; /* how many rings are available in the SI */245 int num_tx_rings;246 int num_fs_entries;247 int num_rss; /* number of RSS buckets */248 unsigned short pad;249 int hw_features;250};251 252#define ENETC_SI_ALIGN 32253 254static inline void *enetc_si_priv(const struct enetc_si *si)255{256 return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);257}258 259static inline bool enetc_si_is_pf(struct enetc_si *si)260{261 return !!(si->hw.port);262}263 264static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)265{266 switch (pf_pdev->devfn) {267 case 0:268 return 0;269 case 1:270 return 1;271 case 2:272 return 2;273 case 6:274 return 3;275 default:276 return -1;277 }278}279 280#define ENETC_MAX_NUM_TXQS 8281#define ENETC_INT_NAME_MAX (IFNAMSIZ + 8)282 283struct enetc_int_vector {284 void __iomem *rbier;285 void __iomem *tbier_base;286 void __iomem *ricr1;287 unsigned long tx_rings_map;288 int count_tx_rings;289 u32 rx_ictt;290 u16 comp_cnt;291 bool rx_dim_en, rx_napi_work;292 struct napi_struct napi ____cacheline_aligned_in_smp;293 struct dim rx_dim ____cacheline_aligned_in_smp;294 char name[ENETC_INT_NAME_MAX];295 296 struct enetc_bdr rx_ring;297 struct enetc_bdr tx_ring[] __counted_by(count_tx_rings);298} ____cacheline_aligned_in_smp;299 300struct enetc_cls_rule {301 struct ethtool_rx_flow_spec fs;302 int used;303};304 305#define ENETC_MAX_BDR_INT 2 /* fixed to max # of available cpus */306struct psfp_cap {307 u32 max_streamid;308 u32 max_psfp_filter;309 u32 max_psfp_gate;310 u32 max_psfp_gatelist;311 u32 max_psfp_meter;312};313 314#define ENETC_F_TX_TSTAMP_MASK 0xff315enum enetc_active_offloads {316 /* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */317 ENETC_F_TX_TSTAMP = BIT(0),318 ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1),319 320 ENETC_F_RX_TSTAMP = BIT(8),321 ENETC_F_QBV = BIT(9),322 ENETC_F_QCI = BIT(10),323 ENETC_F_QBU = BIT(11),324};325 326enum enetc_flags_bit {327 ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0,328 ENETC_TX_DOWN,329};330 331/* interrupt coalescing modes */332enum enetc_ic_mode {333 /* one interrupt per frame */334 ENETC_IC_NONE = 0,335 /* activated when int coalescing time is set to a non-0 value */336 ENETC_IC_RX_MANUAL = BIT(0),337 ENETC_IC_TX_MANUAL = BIT(1),338 /* use dynamic interrupt moderation */339 ENETC_IC_RX_ADAPTIVE = BIT(2),340};341 342#define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)343#define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)344#define ENETC_TXIC_TIMETHR enetc_usecs_to_cycles(600)345 346struct enetc_ndev_priv {347 struct net_device *ndev;348 struct device *dev; /* dma-mapping device */349 struct enetc_si *si;350 351 int bdr_int_num; /* number of Rx/Tx ring interrupts */352 struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];353 u16 num_rx_rings, num_tx_rings;354 u16 rx_bd_count, tx_bd_count;355 356 u16 msg_enable;357 358 u8 preemptible_tcs;359 360 enum enetc_active_offloads active_offloads;361 362 u32 speed; /* store speed for compare update pspeed */363 364 struct enetc_bdr **xdp_tx_ring;365 struct enetc_bdr *tx_ring[16];366 struct enetc_bdr *rx_ring[16];367 const struct enetc_bdr_resource *tx_res;368 const struct enetc_bdr_resource *rx_res;369 370 struct enetc_cls_rule *cls_rules;371 372 struct psfp_cap psfp_cap;373 374 /* Minimum number of TX queues required by the network stack */375 unsigned int min_num_stack_tx_queues;376 377 struct phylink *phylink;378 int ic_mode;379 u32 tx_ictt;380 381 struct bpf_prog *xdp_prog;382 383 unsigned long flags;384 385 struct work_struct tx_onestep_tstamp;386 struct sk_buff_head tx_skbs;387 388 /* Serialize access to MAC Merge state between ethtool requests389 * and link state updates390 */391 struct mutex mm_lock;392};393 394/* Messaging */395 396/* VF-PF set primary MAC address message format */397struct enetc_msg_cmd_set_primary_mac {398 struct enetc_msg_cmd_header header;399 struct sockaddr mac;400};401 402#define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i]))403 404#define ENETC_CBDR_TIMEOUT 1000 /* usecs */405 406/* PTP driver exports */407extern int enetc_phc_index;408 409/* SI common */410u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg);411void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val);412int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);413void enetc_pci_remove(struct pci_dev *pdev);414int enetc_alloc_msix(struct enetc_ndev_priv *priv);415void enetc_free_msix(struct enetc_ndev_priv *priv);416void enetc_get_si_caps(struct enetc_si *si);417void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);418int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);419void enetc_free_si_resources(struct enetc_ndev_priv *priv);420int enetc_configure_si(struct enetc_ndev_priv *priv);421 422int enetc_open(struct net_device *ndev);423int enetc_close(struct net_device *ndev);424void enetc_start(struct net_device *ndev);425void enetc_stop(struct net_device *ndev);426netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);427struct net_device_stats *enetc_get_stats(struct net_device *ndev);428void enetc_set_features(struct net_device *ndev, netdev_features_t features);429int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);430int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data);431void enetc_reset_tc_mqprio(struct net_device *ndev);432int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf);433int enetc_xdp_xmit(struct net_device *ndev, int num_frames,434 struct xdp_frame **frames, u32 flags);435 436/* ethtool */437void enetc_set_ethtool_ops(struct net_device *ndev);438void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link);439void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv);440 441/* control buffer descriptor ring (CBDR) */442int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count,443 struct enetc_cbdr *cbdr);444void enetc_teardown_cbdr(struct enetc_cbdr *cbdr);445int enetc_set_mac_flt_entry(struct enetc_si *si, int index,446 char *mac_addr, int si_map);447int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);448int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,449 int index);450void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes);451int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);452int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);453int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);454 455static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si,456 struct enetc_cbd *cbd,457 int size, dma_addr_t *dma,458 void **data_align)459{460 struct enetc_cbdr *ring = &si->cbd_ring;461 dma_addr_t dma_align;462 void *data;463 464 data = dma_alloc_coherent(ring->dma_dev,465 size + ENETC_CBD_DATA_MEM_ALIGN,466 dma, GFP_KERNEL);467 if (!data) {468 dev_err(ring->dma_dev, "CBD alloc data memory failed!\n");469 return NULL;470 }471 472 dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN);473 *data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN);474 475 cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align));476 cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align));477 cbd->length = cpu_to_le16(size);478 479 return data;480}481 482static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size,483 void *data, dma_addr_t *dma)484{485 struct enetc_cbdr *ring = &si->cbd_ring;486 487 dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN,488 data, *dma);489}490 491void enetc_reset_ptcmsdur(struct enetc_hw *hw);492void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu);493 494#ifdef CONFIG_FSL_ENETC_QOS495int enetc_qos_query_caps(struct net_device *ndev, void *type_data);496int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);497void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed);498int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);499int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data);500int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data,501 void *cb_priv);502int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data);503int enetc_psfp_init(struct enetc_ndev_priv *priv);504int enetc_psfp_clean(struct enetc_ndev_priv *priv);505int enetc_set_psfp(struct net_device *ndev, bool en);506 507static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv)508{509 struct enetc_hw *hw = &priv->si->hw;510 u32 reg;511 512 reg = enetc_port_rd(hw, ENETC_PSIDCAPR);513 priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK;514 /* Port stream filter capability */515 reg = enetc_port_rd(hw, ENETC_PSFCAPR);516 priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK;517 /* Port stream gate capability */518 reg = enetc_port_rd(hw, ENETC_PSGCAPR);519 priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK);520 priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16;521 /* Port flow meter capability */522 reg = enetc_port_rd(hw, ENETC_PFMCAPR);523 priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK;524}525 526static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)527{528 struct enetc_hw *hw = &priv->si->hw;529 int err;530 531 enetc_get_max_cap(priv);532 533 err = enetc_psfp_init(priv);534 if (err)535 return err;536 537 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) |538 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS |539 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC);540 541 return 0;542}543 544static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)545{546 struct enetc_hw *hw = &priv->si->hw;547 int err;548 549 err = enetc_psfp_clean(priv);550 if (err)551 return err;552 553 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) &554 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS &555 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC);556 557 memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap));558 559 return 0;560}561 562#else563#define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP564#define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP565#define enetc_sched_speed_set(priv, speed) (void)0566#define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP567#define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP568#define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP569#define enetc_setup_tc_block_cb NULL570 571#define enetc_get_max_cap(p) \572 memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap))573 574static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)575{576 return 0;577}578 579static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)580{581 return 0;582}583 584static inline int enetc_set_psfp(struct net_device *ndev, bool en)585{586 return 0;587}588#endif589