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1# SPDX-License-Identifier: GPL-2.0-only2config FSL_FMAN3 tristate "FMan support"4 depends on FSL_SOC || ARCH_LAYERSCAPE || COMPILE_TEST5 select GENERIC_ALLOCATOR6 select PHYLINK7 select PCS_LYNX8 select CRC329 default n10 help11 Freescale Data-Path Acceleration Architecture Frame Manager12 (FMan) support13 14config DPAA_ERRATUM_A05038515 bool16 depends on ARM64 && FSL_DPAA17 default y18 help19 DPAA FMan erratum A050385 software workaround implementation:20 align buffers, data start, SG fragment length to avoid FMan DMA21 splits.22 FMAN DMA read or writes under heavy traffic load may cause FMAN23 internal resource leak thus stopping further packet processing.24 The FMAN internal queue can overflow when FMAN splits single25 read or write transactions into multiple smaller transactions26 such that more than 17 AXI transactions are in flight from FMAN27 to interconnect. When the FMAN internal queue overflows, it can28 stall further packet processing. The issue can occur with any29 one of the following three conditions:30 1. FMAN AXI transaction crosses 4K address boundary (Errata31 A010022)32 2. FMAN DMA address for an AXI transaction is not 16 byte33 aligned, i.e. the last 4 bits of an address are non-zero34 3. Scatter Gather (SG) frames have more than one SG buffer in35 the SG list and any one of the buffers, except the last36 buffer in the SG list has data size that is not a multiple37 of 16 bytes, i.e., other than 16, 32, 48, 64, etc.38 With any one of the above three conditions present, there is39 likelihood of stalled FMAN packet processing, especially under40 stress with multiple ports injecting line-rate traffic.41