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1/* SPDX-License-Identifier: GPL-2.0 */2#ifndef FS_ENET_FEC_H3#define FS_ENET_FEC_H4 5#define FEC_MAX_MULTICAST_ADDRS 646 7/* Interrupt events/masks.8*/9#define FEC_ENET_HBERR 0x80000000U /* Heartbeat error */10#define FEC_ENET_BABR 0x40000000U /* Babbling receiver */11#define FEC_ENET_BABT 0x20000000U /* Babbling transmitter */12#define FEC_ENET_GRA 0x10000000U /* Graceful stop complete */13#define FEC_ENET_TXF 0x08000000U /* Full frame transmitted */14#define FEC_ENET_TXB 0x04000000U /* A buffer was transmitted */15#define FEC_ENET_RXF 0x02000000U /* Full frame received */16#define FEC_ENET_RXB 0x01000000U /* A buffer was received */17#define FEC_ENET_MII 0x00800000U /* MII interrupt */18#define FEC_ENET_EBERR 0x00400000U /* SDMA bus error */19 20#define FEC_ECNTRL_PINMUX 0x0000000421#define FEC_ECNTRL_ETHER_EN 0x0000000222#define FEC_ECNTRL_RESET 0x0000000123 24/* RMII mode enabled only when MII_MODE bit is set too. */25#define FEC_RCNTRL_RMII_MODE (0x00000100 | \26 FEC_RCNTRL_MII_MODE | FEC_RCNTRL_FCE)27#define FEC_RCNTRL_FCE 0x0000002028#define FEC_RCNTRL_BC_REJ 0x0000001029#define FEC_RCNTRL_PROM 0x0000000830#define FEC_RCNTRL_MII_MODE 0x0000000431#define FEC_RCNTRL_DRT 0x0000000232#define FEC_RCNTRL_LOOP 0x0000000133 34#define FEC_TCNTRL_FDEN 0x0000000435#define FEC_TCNTRL_HBC 0x0000000236#define FEC_TCNTRL_GTS 0x0000000137 38/*39 * Delay to wait for FEC reset command to complete (in us)40 */41#define FEC_RESET_DELAY 5042#endif43