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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Huawei HiNIC PCI Express Linux driver4 * Copyright(c) 2017 Huawei Technologies Co., Ltd5 */6 7#ifndef HINIC_HW_QP_H8#define HINIC_HW_QP_H9 10#include <linux/kernel.h>11#include <linux/types.h>12#include <linux/sizes.h>13#include <linux/pci.h>14#include <linux/skbuff.h>15 16#include "hinic_common.h"17#include "hinic_hw_if.h"18#include "hinic_hw_wqe.h"19#include "hinic_hw_wq.h"20#include "hinic_hw_qp_ctxt.h"21 22#define HINIC_SQ_DB_INFO_PI_HI_SHIFT 023#define HINIC_SQ_DB_INFO_QID_SHIFT 824#define HINIC_SQ_DB_INFO_PATH_SHIFT 2325#define HINIC_SQ_DB_INFO_COS_SHIFT 2426#define HINIC_SQ_DB_INFO_TYPE_SHIFT 2727 28#define HINIC_SQ_DB_INFO_PI_HI_MASK 0xFF29#define HINIC_SQ_DB_INFO_QID_MASK 0x3FF30#define HINIC_SQ_DB_INFO_PATH_MASK 0x131#define HINIC_SQ_DB_INFO_COS_MASK 0x732#define HINIC_SQ_DB_INFO_TYPE_MASK 0x1F33 34#define HINIC_SQ_DB_INFO_SET(val, member) \35 (((u32)(val) & HINIC_SQ_DB_INFO_##member##_MASK) \36 << HINIC_SQ_DB_INFO_##member##_SHIFT)37 38#define HINIC_SQ_WQEBB_SIZE 6439#define HINIC_RQ_WQEBB_SIZE 3240 41#define HINIC_SQ_PAGE_SIZE SZ_256K42#define HINIC_RQ_PAGE_SIZE SZ_256K43 44#define HINIC_SQ_DEPTH SZ_4K45#define HINIC_RQ_DEPTH SZ_4K46 47#define HINIC_MAX_QUEUE_DEPTH SZ_4K48#define HINIC_MIN_QUEUE_DEPTH 12849 50/* In any change to HINIC_RX_BUF_SZ, HINIC_RX_BUF_SZ_IDX must be changed */51#define HINIC_RX_BUF_SZ 204852#define HINIC_RX_BUF_SZ_IDX HINIC_RX_BUF_SZ_2048_IDX53 54#define HINIC_MIN_TX_WQE_SIZE(wq) \55 ALIGN(HINIC_SQ_WQE_SIZE(1), (wq)->wqebb_size)56 57#define HINIC_MIN_TX_NUM_WQEBBS(sq) \58 (HINIC_MIN_TX_WQE_SIZE((sq)->wq) / (sq)->wq->wqebb_size)59 60enum hinic_rx_buf_sz_idx {61 HINIC_RX_BUF_SZ_32_IDX,62 HINIC_RX_BUF_SZ_64_IDX,63 HINIC_RX_BUF_SZ_96_IDX,64 HINIC_RX_BUF_SZ_128_IDX,65 HINIC_RX_BUF_SZ_192_IDX,66 HINIC_RX_BUF_SZ_256_IDX,67 HINIC_RX_BUF_SZ_384_IDX,68 HINIC_RX_BUF_SZ_512_IDX,69 HINIC_RX_BUF_SZ_768_IDX,70 HINIC_RX_BUF_SZ_1024_IDX,71 HINIC_RX_BUF_SZ_1536_IDX,72 HINIC_RX_BUF_SZ_2048_IDX,73 HINIC_RX_BUF_SZ_3072_IDX,74 HINIC_RX_BUF_SZ_4096_IDX,75 HINIC_RX_BUF_SZ_8192_IDX,76 HINIC_RX_BUF_SZ_16384_IDX,77};78 79struct hinic_sq {80 struct hinic_hwif *hwif;81 82 struct hinic_wq *wq;83 84 u16 qid;85 86 u32 irq;87 u16 msix_entry;88 89 void *hw_ci_addr;90 dma_addr_t hw_ci_dma_addr;91 92 void __iomem *db_base;93 94 struct sk_buff **saved_skb;95 struct hinic_debug_priv *dbg;96};97 98struct hinic_rq {99 struct hinic_hwif *hwif;100 101 struct hinic_wq *wq;102 103 u16 qid;104 105 struct cpumask affinity_mask;106 u32 irq;107 u16 msix_entry;108 109 size_t buf_sz;110 111 struct sk_buff **saved_skb;112 113 struct hinic_rq_cqe **cqe;114 dma_addr_t *cqe_dma;115 116 u16 *pi_virt_addr;117 dma_addr_t pi_dma_addr;118 struct hinic_debug_priv *dbg;119};120 121struct hinic_qp {122 struct hinic_sq sq;123 struct hinic_rq rq;124 125 u16 q_id;126};127 128void hinic_qp_prepare_header(struct hinic_qp_ctxt_header *qp_ctxt_hdr,129 enum hinic_qp_ctxt_type ctxt_type,130 u16 num_queues, u16 max_queues);131 132void hinic_sq_prepare_ctxt(struct hinic_sq_ctxt *sq_ctxt,133 struct hinic_sq *sq, u16 global_qid);134 135void hinic_rq_prepare_ctxt(struct hinic_rq_ctxt *rq_ctxt,136 struct hinic_rq *rq, u16 global_qid);137 138int hinic_init_sq(struct hinic_sq *sq, struct hinic_hwif *hwif,139 struct hinic_wq *wq, struct msix_entry *entry, void *ci_addr,140 dma_addr_t ci_dma_addr, void __iomem *db_base);141 142void hinic_clean_sq(struct hinic_sq *sq);143 144int hinic_init_rq(struct hinic_rq *rq, struct hinic_hwif *hwif,145 struct hinic_wq *wq, struct msix_entry *entry);146 147void hinic_clean_rq(struct hinic_rq *rq);148 149int hinic_get_sq_free_wqebbs(struct hinic_sq *sq);150 151int hinic_get_rq_free_wqebbs(struct hinic_rq *rq);152 153void hinic_task_set_l2hdr(struct hinic_sq_task *task, u32 len);154 155void hinic_task_set_outter_l3(struct hinic_sq_task *task,156 enum hinic_l3_offload_type l3_type,157 u32 network_len);158 159void hinic_task_set_inner_l3(struct hinic_sq_task *task,160 enum hinic_l3_offload_type l3_type,161 u32 network_len);162 163void hinic_task_set_tunnel_l4(struct hinic_sq_task *task,164 enum hinic_l4_tunnel_type l4_type,165 u32 tunnel_len);166 167void hinic_set_cs_inner_l4(struct hinic_sq_task *task,168 u32 *queue_info,169 enum hinic_l4_offload_type l4_offload,170 u32 l4_len, u32 offset);171 172void hinic_set_tso_inner_l4(struct hinic_sq_task *task,173 u32 *queue_info,174 enum hinic_l4_offload_type l4_offload,175 u32 l4_len,176 u32 offset, u32 ip_ident, u32 mss);177 178void hinic_sq_prepare_wqe(struct hinic_sq *sq, struct hinic_sq_wqe *wqe,179 struct hinic_sge *sges, int nr_sges);180 181void hinic_sq_write_db(struct hinic_sq *sq, u16 prod_idx, unsigned int wqe_size,182 unsigned int cos);183 184struct hinic_sq_wqe *hinic_sq_get_wqe(struct hinic_sq *sq,185 unsigned int wqe_size, u16 *prod_idx);186 187void hinic_sq_return_wqe(struct hinic_sq *sq, unsigned int wqe_size);188 189void hinic_sq_write_wqe(struct hinic_sq *sq, u16 prod_idx,190 struct hinic_sq_wqe *wqe, struct sk_buff *skb,191 unsigned int wqe_size);192 193struct hinic_sq_wqe *hinic_sq_read_wqe(struct hinic_sq *sq,194 struct sk_buff **skb,195 unsigned int wqe_size, u16 *cons_idx);196 197struct hinic_sq_wqe *hinic_sq_read_wqebb(struct hinic_sq *sq,198 struct sk_buff **skb,199 unsigned int *wqe_size, u16 *cons_idx);200 201void hinic_sq_put_wqe(struct hinic_sq *sq, unsigned int wqe_size);202 203void hinic_sq_get_sges(struct hinic_sq_wqe *wqe, struct hinic_sge *sges,204 int nr_sges);205 206struct hinic_rq_wqe *hinic_rq_get_wqe(struct hinic_rq *rq,207 unsigned int wqe_size, u16 *prod_idx);208 209void hinic_rq_write_wqe(struct hinic_rq *rq, u16 prod_idx,210 struct hinic_rq_wqe *wqe, struct sk_buff *skb);211 212struct hinic_rq_wqe *hinic_rq_read_wqe(struct hinic_rq *rq,213 unsigned int wqe_size,214 struct sk_buff **skb, u16 *cons_idx);215 216struct hinic_rq_wqe *hinic_rq_read_next_wqe(struct hinic_rq *rq,217 unsigned int wqe_size,218 struct sk_buff **skb,219 u16 *cons_idx);220 221void hinic_rq_put_wqe(struct hinic_rq *rq, u16 cons_idx,222 unsigned int wqe_size);223 224void hinic_rq_get_sge(struct hinic_rq *rq, struct hinic_rq_wqe *wqe,225 u16 cons_idx, struct hinic_sge *sge);226 227void hinic_rq_prepare_wqe(struct hinic_rq *rq, u16 prod_idx,228 struct hinic_rq_wqe *wqe, struct hinic_sge *sge);229 230void hinic_rq_update(struct hinic_rq *rq, u16 prod_idx);231 232#endif233