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1/* SPDX-License-Identifier: GPL-2.0 */2/* Copyright (c) 2018, Intel Corporation. */3 4#ifndef _ICE_H_5#define _ICE_H_6 7#include <linux/types.h>8#include <linux/errno.h>9#include <linux/kernel.h>10#include <linux/module.h>11#include <linux/firmware.h>12#include <linux/netdevice.h>13#include <linux/compiler.h>14#include <linux/etherdevice.h>15#include <linux/skbuff.h>16#include <linux/cpumask.h>17#include <linux/rtnetlink.h>18#include <linux/if_vlan.h>19#include <linux/dma-mapping.h>20#include <linux/pci.h>21#include <linux/workqueue.h>22#include <linux/wait.h>23#include <linux/interrupt.h>24#include <linux/ethtool.h>25#include <linux/timer.h>26#include <linux/delay.h>27#include <linux/bitmap.h>28#include <linux/log2.h>29#include <linux/ip.h>30#include <linux/sctp.h>31#include <linux/ipv6.h>32#include <linux/pkt_sched.h>33#include <linux/if_bridge.h>34#include <linux/ctype.h>35#include <linux/linkmode.h>36#include <linux/bpf.h>37#include <linux/btf.h>38#include <linux/auxiliary_bus.h>39#include <linux/avf/virtchnl.h>40#include <linux/cpu_rmap.h>41#include <linux/dim.h>42#include <linux/gnss.h>43#include <net/pkt_cls.h>44#include <net/pkt_sched.h>45#include <net/tc_act/tc_mirred.h>46#include <net/tc_act/tc_gact.h>47#include <net/ip.h>48#include <net/devlink.h>49#include <net/ipv6.h>50#include <net/xdp_sock.h>51#include <net/xdp_sock_drv.h>52#include <net/geneve.h>53#include <net/gre.h>54#include <net/udp_tunnel.h>55#include <net/vxlan.h>56#include <net/gtp.h>57#include <linux/ppp_defs.h>58#include "ice_devids.h"59#include "ice_type.h"60#include "ice_txrx.h"61#include "ice_dcb.h"62#include "ice_switch.h"63#include "ice_common.h"64#include "ice_flow.h"65#include "ice_sched.h"66#include "ice_idc_int.h"67#include "ice_sriov.h"68#include "ice_vf_mbx.h"69#include "ice_ptp.h"70#include "ice_fdir.h"71#include "ice_xsk.h"72#include "ice_arfs.h"73#include "ice_repr.h"74#include "ice_eswitch.h"75#include "ice_lag.h"76#include "ice_vsi_vlan_ops.h"77#include "ice_gnss.h"78#include "ice_irq.h"79#include "ice_dpll.h"80#include "ice_adapter.h"81 82#define ICE_BAR0 083#define ICE_REQ_DESC_MULTIPLE 3284#define ICE_MIN_NUM_DESC 6485#define ICE_MAX_NUM_DESC 816086#define ICE_DFLT_MIN_RX_DESC 51287#define ICE_DFLT_NUM_TX_DESC 25688#define ICE_DFLT_NUM_RX_DESC 204889 90#define ICE_DFLT_TRAFFIC_CLASS BIT(0)91#define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)92#define ICE_AQ_LEN 19293#define ICE_MBXSQ_LEN 6494#define ICE_SBQ_LEN 6495#define ICE_MIN_LAN_TXRX_MSIX 196#define ICE_MIN_LAN_OICR_MSIX 197#define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)98#define ICE_FDIR_MSIX 299#define ICE_RDMA_NUM_AEQ_MSIX 4100#define ICE_MIN_RDMA_MSIX 2101#define ICE_ESWITCH_MSIX 1102#define ICE_NO_VSI 0xffff103#define ICE_VSI_MAP_CONTIG 0104#define ICE_VSI_MAP_SCATTER 1105#define ICE_MAX_SCATTER_TXQS 16106#define ICE_MAX_SCATTER_RXQS 16107#define ICE_Q_WAIT_RETRY_LIMIT 10108#define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT)109#define ICE_MAX_LG_RSS_QS 256110#define ICE_INVAL_Q_INDEX 0xffff111 112#define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */113 114#define ICE_CHNL_START_TC 1115 116#define ICE_MAX_RESET_WAIT 20117 118#define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4)119 120#define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)121 122#define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)123 124#define ICE_MAX_TSO_SIZE 131072125 126#define ICE_UP_TABLE_TRANSLATE(val, i) \127 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \128 ICE_AQ_VSI_UP_TABLE_UP##i##_M)129 130#define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))131#define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))132#define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))133#define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))134 135/* Minimum BW limit is 500 Kbps for any scheduler node */136#define ICE_MIN_BW_LIMIT 500137/* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.138 * use it to convert user specified BW limit into Kbps139 */140#define ICE_BW_KBPS_DIVISOR 125141 142/* Default recipes have priority 4 and below, hence priority values between 5..7143 * can be used as filter priority for advanced switch filter (advanced switch144 * filters need new recipe to be created for specified extraction sequence145 * because default recipe extraction sequence does not represent custom146 * extraction)147 */148#define ICE_SWITCH_FLTR_PRIO_QUEUE 7149/* prio 6 is reserved for future use (e.g. switch filter with L3 fields +150 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as151 * SYN/FIN/RST))152 */153#define ICE_SWITCH_FLTR_PRIO_RSVD 6154#define ICE_SWITCH_FLTR_PRIO_VSI 5155#define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI156 157/* Macro for each VSI in a PF */158#define ice_for_each_vsi(pf, i) \159 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)160 161/* Macros for each Tx/Xdp/Rx ring in a VSI */162#define ice_for_each_txq(vsi, i) \163 for ((i) = 0; (i) < (vsi)->num_txq; (i)++)164 165#define ice_for_each_xdp_txq(vsi, i) \166 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)167 168#define ice_for_each_rxq(vsi, i) \169 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)170 171/* Macros for each allocated Tx/Rx ring whether used or not in a VSI */172#define ice_for_each_alloc_txq(vsi, i) \173 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)174 175#define ice_for_each_alloc_rxq(vsi, i) \176 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)177 178#define ice_for_each_q_vector(vsi, i) \179 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)180 181#define ice_for_each_chnl_tc(i) \182 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)183 184#define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)185 186#define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \187 ICE_PROMISC_UCAST_RX | \188 ICE_PROMISC_VLAN_TX | \189 ICE_PROMISC_VLAN_RX)190 191#define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)192 193#define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \194 ICE_PROMISC_MCAST_RX | \195 ICE_PROMISC_VLAN_TX | \196 ICE_PROMISC_VLAN_RX)197 198#define ice_pf_to_dev(pf) (&((pf)->pdev->dev))199 200#define ice_pf_src_tmr_owned(pf) ((pf)->hw.func_caps.ts_func_info.src_tmr_owned)201 202enum ice_feature {203 ICE_F_DSCP,204 ICE_F_PHY_RCLK,205 ICE_F_SMA_CTRL,206 ICE_F_CGU,207 ICE_F_GNSS,208 ICE_F_ROCE_LAG,209 ICE_F_SRIOV_LAG,210 ICE_F_MAX211};212 213DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);214 215struct ice_channel {216 struct list_head list;217 u8 type;218 u16 sw_id;219 u16 base_q;220 u16 num_rxq;221 u16 num_txq;222 u16 vsi_num;223 u8 ena_tc;224 struct ice_aqc_vsi_props info;225 u64 max_tx_rate;226 u64 min_tx_rate;227 atomic_t num_sb_fltr;228 struct ice_vsi *ch_vsi;229};230 231struct ice_txq_meta {232 u32 q_teid; /* Tx-scheduler element identifier */233 u16 q_id; /* Entry in VSI's txq_map bitmap */234 u16 q_handle; /* Relative index of Tx queue within TC */235 u16 vsi_idx; /* VSI index that Tx queue belongs to */236 u8 tc; /* TC number that Tx queue belongs to */237};238 239struct ice_tc_info {240 u16 qoffset;241 u16 qcount_tx;242 u16 qcount_rx;243 u8 netdev_tc;244};245 246struct ice_tc_cfg {247 u8 numtc; /* Total number of enabled TCs */248 u16 ena_tc; /* Tx map */249 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];250};251 252struct ice_qs_cfg {253 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */254 unsigned long *pf_map;255 unsigned long pf_map_size;256 unsigned int q_count;257 unsigned int scatter_count;258 u16 *vsi_map;259 u16 vsi_map_offset;260 u8 mapping_mode;261};262 263struct ice_sw {264 struct ice_pf *pf;265 u16 sw_id; /* switch ID for this switch */266 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */267};268 269enum ice_pf_state {270 ICE_TESTING,271 ICE_DOWN,272 ICE_NEEDS_RESTART,273 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */274 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */275 ICE_PFR_REQ, /* set by driver */276 ICE_CORER_REQ, /* set by driver */277 ICE_GLOBR_REQ, /* set by driver */278 ICE_CORER_RECV, /* set by OICR handler */279 ICE_GLOBR_RECV, /* set by OICR handler */280 ICE_EMPR_RECV, /* set by OICR handler */281 ICE_SUSPENDED, /* set on module remove path */282 ICE_RESET_FAILED, /* set by reset/rebuild */283 /* When checking for the PF to be in a nominal operating state, the284 * bits that are grouped at the beginning of the list need to be285 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will286 * be checked. If you need to add a bit into consideration for nominal287 * operating state, it must be added before288 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position289 * without appropriate consideration.290 */291 ICE_STATE_NOMINAL_CHECK_BITS,292 ICE_ADMINQ_EVENT_PENDING,293 ICE_MAILBOXQ_EVENT_PENDING,294 ICE_SIDEBANDQ_EVENT_PENDING,295 ICE_MDD_EVENT_PENDING,296 ICE_VFLR_EVENT_PENDING,297 ICE_FLTR_OVERFLOW_PROMISC,298 ICE_VF_DIS,299 ICE_CFG_BUSY,300 ICE_SERVICE_SCHED,301 ICE_SERVICE_DIS,302 ICE_FD_FLUSH_REQ,303 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */304 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */305 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */306 ICE_LINK_DEFAULT_OVERRIDE_PENDING,307 ICE_PHY_INIT_COMPLETE,308 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */309 ICE_AUX_ERR_PENDING,310 ICE_STATE_NBITS /* must be last */311};312 313enum ice_vsi_state {314 ICE_VSI_DOWN,315 ICE_VSI_NEEDS_RESTART,316 ICE_VSI_NETDEV_ALLOCD,317 ICE_VSI_NETDEV_REGISTERED,318 ICE_VSI_UMAC_FLTR_CHANGED,319 ICE_VSI_MMAC_FLTR_CHANGED,320 ICE_VSI_PROMISC_CHANGED,321 ICE_VSI_REBUILD_PENDING,322 ICE_VSI_STATE_NBITS /* must be last */323};324 325struct ice_vsi_stats {326 struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */327 struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */328};329 330/* struct that defines a VSI, associated with a dev */331struct ice_vsi {332 struct net_device *netdev;333 struct ice_sw *vsw; /* switch this VSI is on */334 struct ice_pf *back; /* back pointer to PF */335 struct ice_rx_ring **rx_rings; /* Rx ring array */336 struct ice_tx_ring **tx_rings; /* Tx ring array */337 struct ice_q_vector **q_vectors; /* q_vector array */338 339 irqreturn_t (*irq_handler)(int irq, void *data);340 341 u64 tx_linearize;342 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);343 unsigned int current_netdev_flags;344 u32 tx_restart;345 u32 tx_busy;346 u32 rx_buf_failed;347 u32 rx_page_failed;348 u16 num_q_vectors;349 /* tell if only dynamic irq allocation is allowed */350 bool irq_dyn_alloc;351 352 u16 vsi_num; /* HW (absolute) index of this VSI */353 u16 idx; /* software index in pf->vsi[] */354 355 u16 num_gfltr;356 u16 num_bfltr;357 358 /* RSS config */359 u16 rss_table_size; /* HW RSS table size */360 u16 rss_size; /* Allocated RSS queues */361 u8 rss_hfunc; /* User configured hash type */362 u8 *rss_hkey_user; /* User configured hash keys */363 u8 *rss_lut_user; /* User configured lookup table entries */364 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */365 366 /* aRFS members only allocated for the PF VSI */367#define ICE_MAX_ARFS_LIST 1024368#define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1)369 struct hlist_head *arfs_fltr_list;370 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;371 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */372 atomic_t *arfs_last_fltr_id;373 374 u16 max_frame;375 u16 rx_buf_len;376 377 struct ice_aqc_vsi_props info; /* VSI properties */378 struct ice_vsi_vlan_info vlan_info; /* vlan config to be restored */379 380 /* VSI stats */381 struct rtnl_link_stats64 net_stats;382 struct rtnl_link_stats64 net_stats_prev;383 struct ice_eth_stats eth_stats;384 struct ice_eth_stats eth_stats_prev;385 386 struct list_head tmp_sync_list; /* MAC filters to be synced */387 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */388 389 u8 irqs_ready:1;390 u8 current_isup:1; /* Sync 'link up' logging */391 u8 stat_offsets_loaded:1;392 struct ice_vsi_vlan_ops inner_vlan_ops;393 struct ice_vsi_vlan_ops outer_vlan_ops;394 u16 num_vlan;395 396 /* queue information */397 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */398 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */399 u16 *txq_map; /* index in pf->avail_txqs */400 u16 *rxq_map; /* index in pf->avail_rxqs */401 u16 alloc_txq; /* Allocated Tx queues */402 u16 num_txq; /* Used Tx queues */403 u16 alloc_rxq; /* Allocated Rx queues */404 u16 num_rxq; /* Used Rx queues */405 u16 req_txq; /* User requested Tx queues */406 u16 req_rxq; /* User requested Rx queues */407 u16 num_rx_desc;408 u16 num_tx_desc;409 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];410 struct ice_tc_cfg tc_cfg;411 struct bpf_prog *xdp_prog;412 struct ice_tx_ring **xdp_rings; /* XDP ring array */413 u16 num_xdp_txq; /* Used XDP queues */414 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */415 struct mutex xdp_state_lock;416 417 struct net_device **target_netdevs;418 419 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */420 421 /* Channel Specific Fields */422 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];423 u16 cnt_q_avail;424 u16 next_base_q; /* next queue to be used for channel setup */425 struct list_head ch_list;426 u16 num_chnl_rxq;427 u16 num_chnl_txq;428 u16 ch_rss_size;429 u16 num_chnl_fltr;430 /* store away rss size info before configuring ADQ channels so that,431 * it can be used after tc-qdisc delete, to get back RSS setting as432 * they were before433 */434 u16 orig_rss_size;435 /* this keeps tracks of all enabled TC with and without DCB436 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue437 * information438 */439 u8 all_numtc;440 u16 all_enatc;441 442 /* store away TC info, to be used for rebuild logic */443 u8 old_numtc;444 u16 old_ena_tc;445 446 /* setup back reference, to which aggregator node this VSI447 * corresponds to448 */449 struct ice_agg_node *agg_node;450 451 struct_group_tagged(ice_vsi_cfg_params, params,452 struct ice_port_info *port_info; /* back pointer to port_info */453 struct ice_channel *ch; /* VSI's channel structure, may be NULL */454 union {455 /* VF associated with this VSI, may be NULL */456 struct ice_vf *vf;457 /* SF associated with this VSI, may be NULL */458 struct ice_dynamic_port *sf;459 };460 u32 flags; /* VSI flags used for rebuild and configuration */461 enum ice_vsi_type type; /* the type of the VSI */462 );463} ____cacheline_internodealigned_in_smp;464 465/* struct that defines an interrupt vector */466struct ice_q_vector {467 struct ice_vsi *vsi;468 469 u16 v_idx; /* index in the vsi->q_vector array. */470 u16 reg_idx; /* PF relative register index */471 u8 num_ring_rx; /* total number of Rx rings in vector */472 u8 num_ring_tx; /* total number of Tx rings in vector */473 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */474 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this475 * value to the device476 */477 u8 intrl;478 479 struct napi_struct napi;480 481 struct ice_ring_container rx;482 struct ice_ring_container tx;483 484 cpumask_t affinity_mask;485 struct irq_affinity_notify affinity_notify;486 487 struct ice_channel *ch;488 489 char name[ICE_INT_NAME_STR_LEN];490 491 u16 total_events; /* net_dim(): number of interrupts processed */492 u16 vf_reg_idx; /* VF relative register index */493 struct msi_map irq;494} ____cacheline_internodealigned_in_smp;495 496enum ice_pf_flags {497 ICE_FLAG_FLTR_SYNC,498 ICE_FLAG_RDMA_ENA,499 ICE_FLAG_RSS_ENA,500 ICE_FLAG_SRIOV_ENA,501 ICE_FLAG_SRIOV_CAPABLE,502 ICE_FLAG_DCB_CAPABLE,503 ICE_FLAG_DCB_ENA,504 ICE_FLAG_FD_ENA,505 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */506 ICE_FLAG_ADV_FEATURES,507 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */508 ICE_FLAG_CLS_FLOWER,509 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,510 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,511 ICE_FLAG_NO_MEDIA,512 ICE_FLAG_FW_LLDP_AGENT,513 ICE_FLAG_MOD_POWER_UNSUPPORTED,514 ICE_FLAG_PHY_FW_LOAD_FAILED,515 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */516 ICE_FLAG_LEGACY_RX,517 ICE_FLAG_VF_TRUE_PROMISC_ENA,518 ICE_FLAG_MDD_AUTO_RESET_VF,519 ICE_FLAG_VF_VLAN_PRUNING,520 ICE_FLAG_LINK_LENIENT_MODE_ENA,521 ICE_FLAG_PLUG_AUX_DEV,522 ICE_FLAG_UNPLUG_AUX_DEV,523 ICE_FLAG_MTU_CHANGED,524 ICE_FLAG_GNSS, /* GNSS successfully initialized */525 ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */526 ICE_PF_FLAGS_NBITS /* must be last */527};528 529enum ice_misc_thread_tasks {530 ICE_MISC_THREAD_TX_TSTAMP,531 ICE_MISC_THREAD_NBITS /* must be last */532};533 534struct ice_eswitch {535 struct ice_vsi *uplink_vsi;536 struct ice_esw_br_offloads *br_offloads;537 struct xarray reprs;538 bool is_running;539};540 541struct ice_agg_node {542 u32 agg_id;543#define ICE_MAX_VSIS_IN_AGG_NODE 64544 u32 num_vsis;545 u8 valid;546};547 548struct ice_pf {549 struct pci_dev *pdev;550 struct ice_adapter *adapter;551 552 struct devlink_region *nvm_region;553 struct devlink_region *sram_region;554 struct devlink_region *devcaps_region;555 556 /* devlink port data */557 struct devlink_port devlink_port;558 559 /* OS reserved IRQ details */560 struct msix_entry *msix_entries;561 struct ice_irq_tracker irq_tracker;562 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the563 * number of MSIX vectors needed for all SR-IOV VFs from the number of564 * MSIX vectors allowed on this PF.565 */566 u16 sriov_base_vector;567 unsigned long *sriov_irq_bm; /* bitmap to track irq usage */568 u16 sriov_irq_size; /* size of the irq_bm bitmap */569 570 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */571 572 struct ice_vsi **vsi; /* VSIs created by the driver */573 struct ice_vsi_stats **vsi_stats;574 struct ice_sw *first_sw; /* first switch created by firmware */575 u16 eswitch_mode; /* current mode of eswitch */576 struct dentry *ice_debugfs_pf;577 struct dentry *ice_debugfs_pf_fwlog;578 /* keep track of all the dentrys for FW log modules */579 struct dentry **ice_debugfs_pf_fwlog_modules;580 struct ice_vfs vfs;581 DECLARE_BITMAP(features, ICE_F_MAX);582 DECLARE_BITMAP(state, ICE_STATE_NBITS);583 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);584 DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS);585 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */586 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */587 unsigned long serv_tmr_period;588 unsigned long serv_tmr_prev;589 struct timer_list serv_tmr;590 struct work_struct serv_task;591 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */592 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */593 struct mutex tc_mutex; /* lock to protect TC changes */594 struct mutex adev_mutex; /* lock to protect aux device access */595 struct mutex lag_mutex; /* protect ice_lag struct in PF */596 u32 msg_enable;597 struct ice_ptp ptp;598 struct gnss_serial *gnss_serial;599 struct gnss_device *gnss_dev;600 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */601 u16 rdma_base_vector;602 603 /* spinlock to protect the AdminQ wait list */604 spinlock_t aq_wait_lock;605 struct hlist_head aq_wait_list;606 wait_queue_head_t aq_wait_queue;607 bool fw_emp_reset_disabled;608 609 wait_queue_head_t reset_wait_queue;610 611 u32 hw_csum_rx_error;612 u32 hw_rx_eipe_error;613 u32 oicr_err_reg;614 struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */615 struct msi_map ll_ts_irq; /* LL_TS interrupt MSIX vector */616 u16 max_pf_txqs; /* Total Tx queues PF wide */617 u16 max_pf_rxqs; /* Total Rx queues PF wide */618 u16 num_lan_msix; /* Total MSIX vectors for base driver */619 u16 num_lan_tx; /* num LAN Tx queues setup */620 u16 num_lan_rx; /* num LAN Rx queues setup */621 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */622 u16 num_alloc_vsi;623 u16 corer_count; /* Core reset count */624 u16 globr_count; /* Global reset count */625 u16 empr_count; /* EMP reset count */626 u16 pfr_count; /* PF reset count */627 628 u8 wol_ena : 1; /* software state of WoL */629 u32 wakeup_reason; /* last wakeup reason */630 struct ice_hw_port_stats stats;631 struct ice_hw_port_stats stats_prev;632 struct ice_hw hw;633 u8 stat_prev_loaded:1; /* has previous stats been loaded */634 u8 rdma_mode;635 u16 dcbx_cap;636 u32 tx_timeout_count;637 unsigned long tx_timeout_last_recovery;638 u32 tx_timeout_recovery_level;639 char int_name[ICE_INT_NAME_STR_LEN];640 char int_name_ll_ts[ICE_INT_NAME_STR_LEN];641 struct auxiliary_device *adev;642 int aux_idx;643 u32 sw_int_count;644 /* count of tc_flower filters specific to channel (aka where filter645 * action is "hw_tc <tc_num>")646 */647 u16 num_dmac_chnl_fltrs;648 struct hlist_head tc_flower_fltr_list;649 650 u64 supported_rxdids;651 652 __le64 nvm_phy_type_lo; /* NVM PHY type low */653 __le64 nvm_phy_type_hi; /* NVM PHY type high */654 struct ice_link_default_override_tlv link_dflt_override;655 struct ice_lag *lag; /* Link Aggregation information */656 657 struct ice_eswitch eswitch;658 struct ice_esw_br_port *br_port;659 660 struct xarray dyn_ports;661 struct xarray sf_nums;662 663#define ICE_INVALID_AGG_NODE_ID 0664#define ICE_PF_AGG_NODE_ID_START 1665#define ICE_MAX_PF_AGG_NODES 32666 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];667#define ICE_VF_AGG_NODE_ID_START 65668#define ICE_MAX_VF_AGG_NODES 32669 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];670 struct ice_dplls dplls;671 struct device *hwmon_dev;672};673 674extern struct workqueue_struct *ice_lag_wq;675 676struct ice_netdev_priv {677 struct ice_vsi *vsi;678 struct ice_repr *repr;679 /* indirect block callbacks on registered higher level devices680 * (e.g. tunnel devices)681 *682 * tc_indr_block_cb_priv_list is used to look up indirect callback683 * private data684 */685 struct list_head tc_indr_block_priv_list;686};687 688/**689 * ice_vector_ch_enabled690 * @qv: pointer to q_vector, can be NULL691 *692 * This function returns true if vector is channel enabled otherwise false693 */694static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)695{696 return !!qv->ch; /* Enable it to run with TC */697}698 699/**700 * ice_ptp_pf_handles_tx_interrupt - Check if PF handles Tx interrupt701 * @pf: Board private structure702 *703 * Return true if this PF should respond to the Tx timestamp interrupt704 * indication in the miscellaneous OICR interrupt handler.705 */706static inline bool ice_ptp_pf_handles_tx_interrupt(struct ice_pf *pf)707{708 return pf->ptp.tx_interrupt_mode != ICE_PTP_TX_INTERRUPT_NONE;709}710 711/**712 * ice_irq_dynamic_ena - Enable default interrupt generation settings713 * @hw: pointer to HW struct714 * @vsi: pointer to VSI struct, can be NULL715 * @q_vector: pointer to q_vector, can be NULL716 */717static inline void718ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,719 struct ice_q_vector *q_vector)720{721 u32 vector = (vsi && q_vector) ? q_vector->reg_idx :722 ((struct ice_pf *)hw->back)->oicr_irq.index;723 int itr = ICE_ITR_NONE;724 u32 val;725 726 /* clear the PBA here, as this function is meant to clean out all727 * previous interrupts and enable the interrupt728 */729 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |730 (itr << GLINT_DYN_CTL_ITR_INDX_S);731 if (vsi)732 if (test_bit(ICE_VSI_DOWN, vsi->state))733 return;734 wr32(hw, GLINT_DYN_CTL(vector), val);735}736 737/**738 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev739 * @netdev: pointer to the netdev struct740 */741static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)742{743 struct ice_netdev_priv *np = netdev_priv(netdev);744 745 return np->vsi->back;746}747 748static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)749{750 return !!READ_ONCE(vsi->xdp_prog);751}752 753static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)754{755 ring->flags |= ICE_TX_FLAGS_RING_XDP;756}757 758/**759 * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID760 * @vsi: pointer to VSI761 * @qid: index of a queue to look at XSK buff pool presence762 *763 * Return: A pointer to xsk_buff_pool structure if there is a buffer pool764 * attached and configured as zero-copy, NULL otherwise.765 */766static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi,767 u16 qid)768{769 struct xsk_buff_pool *pool = xsk_get_pool_from_qid(vsi->netdev, qid);770 771 if (!ice_is_xdp_ena_vsi(vsi))772 return NULL;773 774 return (pool && pool->dev) ? pool : NULL;775}776 777/**778 * ice_rx_xsk_pool - assign XSK buff pool to Rx ring779 * @ring: Rx ring to use780 *781 * Sets XSK buff pool pointer on Rx ring.782 */783static inline void ice_rx_xsk_pool(struct ice_rx_ring *ring)784{785 struct ice_vsi *vsi = ring->vsi;786 u16 qid = ring->q_index;787 788 WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid));789}790 791/**792 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring793 * @vsi: pointer to VSI794 * @qid: index of a queue to look at XSK buff pool presence795 *796 * Sets XSK buff pool pointer on XDP ring.797 *798 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided799 * queue id. Reason for doing so is that queue vectors might have assigned more800 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring801 * carries a pointer to one of these XDP rings for its own purposes, such as802 * handling XDP_TX action, therefore we can piggyback here on the803 * rx_ring->xdp_ring assignment that was done during XDP rings initialization.804 */805static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid)806{807 struct ice_tx_ring *ring;808 809 ring = vsi->rx_rings[qid]->xdp_ring;810 if (!ring)811 return;812 813 WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid));814}815 816/**817 * ice_get_main_vsi - Get the PF VSI818 * @pf: PF instance819 *820 * returns pf->vsi[0], which by definition is the PF VSI821 */822static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)823{824 if (pf->vsi)825 return pf->vsi[0];826 827 return NULL;828}829 830/**831 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.832 * @np: private netdev structure833 */834static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)835{836 /* In case of port representor return source port VSI. */837 if (np->repr)838 return np->repr->src_vsi;839 else840 return np->vsi;841}842 843/**844 * ice_get_ctrl_vsi - Get the control VSI845 * @pf: PF instance846 */847static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)848{849 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */850 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)851 return NULL;852 853 return pf->vsi[pf->ctrl_vsi_idx];854}855 856/**857 * ice_find_vsi - Find the VSI from VSI ID858 * @pf: The PF pointer to search in859 * @vsi_num: The VSI ID to search for860 */861static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num)862{863 int i;864 865 ice_for_each_vsi(pf, i)866 if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num)867 return pf->vsi[i];868 return NULL;869}870 871/**872 * ice_is_switchdev_running - check if switchdev is configured873 * @pf: pointer to PF structure874 *875 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV876 * and switchdev is configured, false otherwise.877 */878static inline bool ice_is_switchdev_running(struct ice_pf *pf)879{880 return pf->eswitch.is_running;881}882 883#define ICE_FD_STAT_CTR_BLOCK_COUNT 256884#define ICE_FD_STAT_PF_IDX(base_idx) \885 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)886#define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)887#define ICE_FD_STAT_CH 1888#define ICE_FD_CH_STAT_IDX(base_idx) \889 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)890 891/**892 * ice_is_adq_active - any active ADQs893 * @pf: pointer to PF894 *895 * This function returns true if there are any ADQs configured (which is896 * determined by looking at VSI type (which should be VSI_PF), numtc, and897 * TC_MQPRIO flag) otherwise return false898 */899static inline bool ice_is_adq_active(struct ice_pf *pf)900{901 struct ice_vsi *vsi;902 903 vsi = ice_get_main_vsi(pf);904 if (!vsi)905 return false;906 907 /* is ADQ configured */908 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&909 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))910 return true;911 912 return false;913}914 915void ice_debugfs_fwlog_init(struct ice_pf *pf);916void ice_debugfs_pf_deinit(struct ice_pf *pf);917void ice_debugfs_init(void);918void ice_debugfs_exit(void);919void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module);920 921bool netif_is_ice(const struct net_device *dev);922int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);923int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);924int ice_vsi_open_ctrl(struct ice_vsi *vsi);925int ice_vsi_open(struct ice_vsi *vsi);926void ice_set_ethtool_ops(struct net_device *netdev);927void ice_set_ethtool_repr_ops(struct net_device *netdev);928void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);929void ice_set_ethtool_sf_ops(struct net_device *netdev);930u16 ice_get_avail_txq_count(struct ice_pf *pf);931u16 ice_get_avail_rxq_count(struct ice_pf *pf);932int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked);933void ice_update_vsi_stats(struct ice_vsi *vsi);934void ice_update_pf_stats(struct ice_pf *pf);935void936ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp,937 struct ice_q_stats stats, u64 *pkts, u64 *bytes);938int ice_up(struct ice_vsi *vsi);939int ice_down(struct ice_vsi *vsi);940int ice_down_up(struct ice_vsi *vsi);941int ice_vsi_cfg_lan(struct ice_vsi *vsi);942struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);943 944enum ice_xdp_cfg {945 ICE_XDP_CFG_FULL, /* Fully apply new config in .ndo_bpf() */946 ICE_XDP_CFG_PART, /* Save/use part of config in VSI rebuild */947};948 949int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);950int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,951 enum ice_xdp_cfg cfg_type);952int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type);953void ice_map_xdp_rings(struct ice_vsi *vsi);954int955ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,956 u32 flags);957int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);958int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);959int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);960int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);961int ice_set_rss_hfunc(struct ice_vsi *vsi, u8 hfunc);962void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);963int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);964void ice_print_link_msg(struct ice_vsi *vsi, bool isup);965int ice_plug_aux_dev(struct ice_pf *pf);966void ice_unplug_aux_dev(struct ice_pf *pf);967int ice_init_rdma(struct ice_pf *pf);968void ice_deinit_rdma(struct ice_pf *pf);969const char *ice_aq_str(enum ice_aq_err aq_err);970bool ice_is_wol_supported(struct ice_hw *hw);971void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);972int973ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,974 bool is_tun);975void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);976int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);977int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);978int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);979int980ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,981 u32 *rule_locs);982void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);983void ice_fdir_release_flows(struct ice_hw *hw);984void ice_fdir_replay_flows(struct ice_hw *hw);985void ice_fdir_replay_fltrs(struct ice_pf *pf);986int ice_fdir_create_dflt_rules(struct ice_pf *pf);987 988enum ice_aq_task_state {989 ICE_AQ_TASK_NOT_PREPARED,990 ICE_AQ_TASK_WAITING,991 ICE_AQ_TASK_COMPLETE,992 ICE_AQ_TASK_CANCELED,993};994 995struct ice_aq_task {996 struct hlist_node entry;997 struct ice_rq_event_info event;998 enum ice_aq_task_state state;999 u16 opcode;1000};1001 1002void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task,1003 u16 opcode);1004int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task,1005 unsigned long timeout);1006int ice_open(struct net_device *netdev);1007int ice_open_internal(struct net_device *netdev);1008int ice_stop(struct net_device *netdev);1009void ice_service_task_schedule(struct ice_pf *pf);1010int ice_load(struct ice_pf *pf);1011void ice_unload(struct ice_pf *pf);1012void ice_adv_lnk_speed_maps_init(void);1013int ice_init_dev(struct ice_pf *pf);1014void ice_deinit_dev(struct ice_pf *pf);1015int ice_change_mtu(struct net_device *netdev, int new_mtu);1016void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue);1017int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp);1018void ice_set_netdev_features(struct net_device *netdev);1019int ice_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid);1020int ice_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid);1021void ice_get_stats64(struct net_device *netdev,1022 struct rtnl_link_stats64 *stats);1023 1024/**1025 * ice_set_rdma_cap - enable RDMA support1026 * @pf: PF struct1027 */1028static inline void ice_set_rdma_cap(struct ice_pf *pf)1029{1030 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {1031 set_bit(ICE_FLAG_RDMA_ENA, pf->flags);1032 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);1033 }1034}1035 1036/**1037 * ice_clear_rdma_cap - disable RDMA support1038 * @pf: PF struct1039 */1040static inline void ice_clear_rdma_cap(struct ice_pf *pf)1041{1042 /* defer unplug to service task to avoid RTNL lock and1043 * clear PLUG bit so that pending plugs don't interfere1044 */1045 clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);1046 set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags);1047 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);1048}1049 1050extern const struct xdp_metadata_ops ice_xdp_md_ops;1051#endif /* _ICE_H_ */1052