62 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/* Copyright(c) 1999 - 2018 Intel Corporation. */3 4#ifndef _IXGBEVF_REGS_H_5#define _IXGBEVF_REGS_H_6 7#define IXGBE_VFCTRL 0x000008#define IXGBE_VFSTATUS 0x000089#define IXGBE_VFLINKS 0x0001010#define IXGBE_VFFRTIMER 0x0004811#define IXGBE_VFRXMEMWRAP 0x0319012#define IXGBE_VTEICR 0x0010013#define IXGBE_VTEICS 0x0010414#define IXGBE_VTEIMS 0x0010815#define IXGBE_VTEIMC 0x0010C16#define IXGBE_VTEIAC 0x0011017#define IXGBE_VTEIAM 0x0011418#define IXGBE_VTEITR(x) (0x00820 + (4 * (x)))19#define IXGBE_VTIVAR(x) (0x00120 + (4 * (x)))20#define IXGBE_VTIVAR_MISC 0x0014021#define IXGBE_VTRSCINT(x) (0x00180 + (4 * (x)))22#define IXGBE_VFRDBAL(x) (0x01000 + (0x40 * (x)))23#define IXGBE_VFRDBAH(x) (0x01004 + (0x40 * (x)))24#define IXGBE_VFRDLEN(x) (0x01008 + (0x40 * (x)))25#define IXGBE_VFRDH(x) (0x01010 + (0x40 * (x)))26#define IXGBE_VFRDT(x) (0x01018 + (0x40 * (x)))27#define IXGBE_VFRXDCTL(x) (0x01028 + (0x40 * (x)))28#define IXGBE_VFSRRCTL(x) (0x01014 + (0x40 * (x)))29#define IXGBE_VFRSCCTL(x) (0x0102C + (0x40 * (x)))30#define IXGBE_VFPSRTYPE 0x0030031#define IXGBE_VFTDBAL(x) (0x02000 + (0x40 * (x)))32#define IXGBE_VFTDBAH(x) (0x02004 + (0x40 * (x)))33#define IXGBE_VFTDLEN(x) (0x02008 + (0x40 * (x)))34#define IXGBE_VFTDH(x) (0x02010 + (0x40 * (x)))35#define IXGBE_VFTDT(x) (0x02018 + (0x40 * (x)))36#define IXGBE_VFTXDCTL(x) (0x02028 + (0x40 * (x)))37#define IXGBE_VFTDWBAL(x) (0x02038 + (0x40 * (x)))38#define IXGBE_VFTDWBAH(x) (0x0203C + (0x40 * (x)))39#define IXGBE_VFDCA_RXCTRL(x) (0x0100C + (0x40 * (x)))40#define IXGBE_VFDCA_TXCTRL(x) (0x0200c + (0x40 * (x)))41#define IXGBE_VFGPRC 0x0101C42#define IXGBE_VFGPTC 0x0201C43#define IXGBE_VFGORC_LSB 0x0102044#define IXGBE_VFGORC_MSB 0x0102445#define IXGBE_VFGOTC_LSB 0x0202046#define IXGBE_VFGOTC_MSB 0x0202447#define IXGBE_VFMPRC 0x0103448#define IXGBE_VFMRQC 0x300049#define IXGBE_VFRSSRK(x) (0x3100 + ((x) * 4))50#define IXGBE_VFRETA(x) (0x3200 + ((x) * 4))51 52/* VFMRQC bits */53#define IXGBE_VFMRQC_RSSEN 0x00000001 /* RSS Enable */54#define IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP 0x0001000055#define IXGBE_VFMRQC_RSS_FIELD_IPV4 0x0002000056#define IXGBE_VFMRQC_RSS_FIELD_IPV6 0x0010000057#define IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP 0x0020000058 59#define IXGBE_WRITE_FLUSH(a) (IXGBE_READ_REG(a, IXGBE_VFSTATUS))60 61#endif /* _IXGBEVF_REGS_H_ */62