3606 lines · c
1/*2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.3 *4 * This software is available to you under a choice of one of two5 * licenses. You may choose to be licensed under the terms of the GNU6 * General Public License (GPL) Version 2, available from the file7 * COPYING in the main directory of this source tree, or the8 * OpenIB.org BSD license below:9 *10 * Redistribution and use in source and binary forms, with or11 * without modification, are permitted provided that the following12 * conditions are met:13 *14 * - Redistributions of source code must retain the above15 * copyright notice, this list of conditions and the following16 * disclaimer.17 *18 * - Redistributions in binary form must reproduce the above19 * copyright notice, this list of conditions and the following20 * disclaimer in the documentation and/or other materials21 * provided with the distribution.22 *23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE30 * SOFTWARE.31 *32 */33 34#include <linux/bpf.h>35#include <linux/etherdevice.h>36#include <linux/filter.h>37#include <linux/tcp.h>38#include <linux/if_vlan.h>39#include <linux/delay.h>40#include <linux/slab.h>41#include <linux/hash.h>42#include <net/ip.h>43#include <net/vxlan.h>44#include <net/devlink.h>45#include <net/rps.h>46#include <net/netdev_queues.h>47 48#include <linux/mlx4/driver.h>49#include <linux/mlx4/device.h>50#include <linux/mlx4/cmd.h>51#include <linux/mlx4/cq.h>52 53#include "mlx4_en.h"54#include "en_port.h"55 56#define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \57 XDP_PACKET_HEADROOM - \58 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))))59 60int mlx4_en_setup_tc(struct net_device *dev, u8 up)61{62 struct mlx4_en_priv *priv = netdev_priv(dev);63 int i;64 unsigned int offset = 0;65 66 if (up && up != MLX4_EN_NUM_UP_HIGH)67 return -EINVAL;68 69 netdev_set_num_tc(dev, up);70 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);71 /* Partition Tx queues evenly amongst UP's */72 for (i = 0; i < up; i++) {73 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);74 offset += priv->num_tx_rings_p_up;75 }76 77#ifdef CONFIG_MLX4_EN_DCB78 if (!mlx4_is_slave(priv->mdev->dev)) {79 if (up) {80 if (priv->dcbx_cap)81 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;82 } else {83 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;84 priv->cee_config.pfc_state = false;85 }86 }87#endif /* CONFIG_MLX4_EN_DCB */88 89 return 0;90}91 92int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc)93{94 struct mlx4_en_priv *priv = netdev_priv(dev);95 struct mlx4_en_dev *mdev = priv->mdev;96 struct mlx4_en_port_profile new_prof;97 struct mlx4_en_priv *tmp;98 int total_count;99 int port_up = 0;100 int err = 0;101 102 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);103 if (!tmp)104 return -ENOMEM;105 106 mutex_lock(&mdev->state_lock);107 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));108 new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW :109 MLX4_EN_NUM_UP_HIGH;110 new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up *111 new_prof.num_up;112 total_count = new_prof.tx_ring_num[TX] + new_prof.tx_ring_num[TX_XDP];113 if (total_count > MAX_TX_RINGS) {114 err = -EINVAL;115 en_err(priv,116 "Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",117 total_count, MAX_TX_RINGS);118 goto out;119 }120 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);121 if (err)122 goto out;123 124 if (priv->port_up) {125 port_up = 1;126 mlx4_en_stop_port(dev, 1);127 }128 129 mlx4_en_safe_replace_resources(priv, tmp);130 if (port_up) {131 err = mlx4_en_start_port(dev);132 if (err) {133 en_err(priv, "Failed starting port for setup TC\n");134 goto out;135 }136 }137 138 err = mlx4_en_setup_tc(dev, tc);139out:140 mutex_unlock(&mdev->state_lock);141 kfree(tmp);142 return err;143}144 145static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type,146 void *type_data)147{148 struct tc_mqprio_qopt *mqprio = type_data;149 150 if (type != TC_SETUP_QDISC_MQPRIO)151 return -EOPNOTSUPP;152 153 if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH)154 return -EINVAL;155 156 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;157 158 return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc);159}160 161#ifdef CONFIG_RFS_ACCEL162 163struct mlx4_en_filter {164 struct list_head next;165 struct work_struct work;166 167 u8 ip_proto;168 __be32 src_ip;169 __be32 dst_ip;170 __be16 src_port;171 __be16 dst_port;172 173 int rxq_index;174 struct mlx4_en_priv *priv;175 u32 flow_id; /* RFS infrastructure id */176 int id; /* mlx4_en driver id */177 u64 reg_id; /* Flow steering API id */178 u8 activated; /* Used to prevent expiry before filter179 * is attached180 */181 struct hlist_node filter_chain;182};183 184static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);185 186static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)187{188 switch (ip_proto) {189 case IPPROTO_UDP:190 return MLX4_NET_TRANS_RULE_ID_UDP;191 case IPPROTO_TCP:192 return MLX4_NET_TRANS_RULE_ID_TCP;193 default:194 return MLX4_NET_TRANS_RULE_NUM;195 }196};197 198/* Must not acquire state_lock, as its corresponding work_sync199 * is done under it.200 */201static void mlx4_en_filter_work(struct work_struct *work)202{203 struct mlx4_en_filter *filter = container_of(work,204 struct mlx4_en_filter,205 work);206 struct mlx4_en_priv *priv = filter->priv;207 struct mlx4_spec_list spec_tcp_udp = {208 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),209 {210 .tcp_udp = {211 .dst_port = filter->dst_port,212 .dst_port_msk = (__force __be16)-1,213 .src_port = filter->src_port,214 .src_port_msk = (__force __be16)-1,215 },216 },217 };218 struct mlx4_spec_list spec_ip = {219 .id = MLX4_NET_TRANS_RULE_ID_IPV4,220 {221 .ipv4 = {222 .dst_ip = filter->dst_ip,223 .dst_ip_msk = (__force __be32)-1,224 .src_ip = filter->src_ip,225 .src_ip_msk = (__force __be32)-1,226 },227 },228 };229 struct mlx4_spec_list spec_eth = {230 .id = MLX4_NET_TRANS_RULE_ID_ETH,231 };232 struct mlx4_net_trans_rule rule = {233 .list = LIST_HEAD_INIT(rule.list),234 .queue_mode = MLX4_NET_TRANS_Q_LIFO,235 .exclusive = 1,236 .allow_loopback = 1,237 .promisc_mode = MLX4_FS_REGULAR,238 .port = priv->port,239 .priority = MLX4_DOMAIN_RFS,240 };241 int rc;242 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);243 244 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {245 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",246 filter->ip_proto);247 goto ignore;248 }249 list_add_tail(&spec_eth.list, &rule.list);250 list_add_tail(&spec_ip.list, &rule.list);251 list_add_tail(&spec_tcp_udp.list, &rule.list);252 253 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;254 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);255 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);256 257 filter->activated = 0;258 259 if (filter->reg_id) {260 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);261 if (rc && rc != -ENOENT)262 en_err(priv, "Error detaching flow. rc = %d\n", rc);263 }264 265 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);266 if (rc)267 en_err(priv, "Error attaching flow. err = %d\n", rc);268 269ignore:270 mlx4_en_filter_rfs_expire(priv);271 272 filter->activated = 1;273}274 275static inline struct hlist_head *276filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,277 __be16 src_port, __be16 dst_port)278{279 unsigned long l;280 int bucket_idx;281 282 l = (__force unsigned long)src_port |283 ((__force unsigned long)dst_port << 2);284 l ^= (__force unsigned long)(src_ip ^ dst_ip);285 286 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);287 288 return &priv->filter_hash[bucket_idx];289}290 291static struct mlx4_en_filter *292mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,293 __be32 dst_ip, u8 ip_proto, __be16 src_port,294 __be16 dst_port, u32 flow_id)295{296 struct mlx4_en_filter *filter;297 298 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);299 if (!filter)300 return NULL;301 302 filter->priv = priv;303 filter->rxq_index = rxq_index;304 INIT_WORK(&filter->work, mlx4_en_filter_work);305 306 filter->src_ip = src_ip;307 filter->dst_ip = dst_ip;308 filter->ip_proto = ip_proto;309 filter->src_port = src_port;310 filter->dst_port = dst_port;311 312 filter->flow_id = flow_id;313 314 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;315 316 list_add_tail(&filter->next, &priv->filters);317 hlist_add_head(&filter->filter_chain,318 filter_hash_bucket(priv, src_ip, dst_ip, src_port,319 dst_port));320 321 return filter;322}323 324static void mlx4_en_filter_free(struct mlx4_en_filter *filter)325{326 struct mlx4_en_priv *priv = filter->priv;327 int rc;328 329 list_del(&filter->next);330 331 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);332 if (rc && rc != -ENOENT)333 en_err(priv, "Error detaching flow. rc = %d\n", rc);334 335 kfree(filter);336}337 338static inline struct mlx4_en_filter *339mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,340 u8 ip_proto, __be16 src_port, __be16 dst_port)341{342 struct mlx4_en_filter *filter;343 struct mlx4_en_filter *ret = NULL;344 345 hlist_for_each_entry(filter,346 filter_hash_bucket(priv, src_ip, dst_ip,347 src_port, dst_port),348 filter_chain) {349 if (filter->src_ip == src_ip &&350 filter->dst_ip == dst_ip &&351 filter->ip_proto == ip_proto &&352 filter->src_port == src_port &&353 filter->dst_port == dst_port) {354 ret = filter;355 break;356 }357 }358 359 return ret;360}361 362static int363mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,364 u16 rxq_index, u32 flow_id)365{366 struct mlx4_en_priv *priv = netdev_priv(net_dev);367 struct mlx4_en_filter *filter;368 const struct iphdr *ip;369 const __be16 *ports;370 u8 ip_proto;371 __be32 src_ip;372 __be32 dst_ip;373 __be16 src_port;374 __be16 dst_port;375 int nhoff = skb_network_offset(skb);376 int ret = 0;377 378 if (skb->encapsulation)379 return -EPROTONOSUPPORT;380 381 if (skb->protocol != htons(ETH_P_IP))382 return -EPROTONOSUPPORT;383 384 ip = (const struct iphdr *)(skb->data + nhoff);385 if (ip_is_fragment(ip))386 return -EPROTONOSUPPORT;387 388 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))389 return -EPROTONOSUPPORT;390 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);391 392 ip_proto = ip->protocol;393 src_ip = ip->saddr;394 dst_ip = ip->daddr;395 src_port = ports[0];396 dst_port = ports[1];397 398 spin_lock_bh(&priv->filters_lock);399 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,400 src_port, dst_port);401 if (filter) {402 if (filter->rxq_index == rxq_index)403 goto out;404 405 filter->rxq_index = rxq_index;406 } else {407 filter = mlx4_en_filter_alloc(priv, rxq_index,408 src_ip, dst_ip, ip_proto,409 src_port, dst_port, flow_id);410 if (!filter) {411 ret = -ENOMEM;412 goto err;413 }414 }415 416 queue_work(priv->mdev->workqueue, &filter->work);417 418out:419 ret = filter->id;420err:421 spin_unlock_bh(&priv->filters_lock);422 423 return ret;424}425 426void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)427{428 struct mlx4_en_filter *filter, *tmp;429 LIST_HEAD(del_list);430 431 spin_lock_bh(&priv->filters_lock);432 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {433 list_move(&filter->next, &del_list);434 hlist_del(&filter->filter_chain);435 }436 spin_unlock_bh(&priv->filters_lock);437 438 list_for_each_entry_safe(filter, tmp, &del_list, next) {439 cancel_work_sync(&filter->work);440 mlx4_en_filter_free(filter);441 }442}443 444static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)445{446 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;447 LIST_HEAD(del_list);448 int i = 0;449 450 spin_lock_bh(&priv->filters_lock);451 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {452 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)453 break;454 455 if (filter->activated &&456 !work_pending(&filter->work) &&457 rps_may_expire_flow(priv->dev,458 filter->rxq_index, filter->flow_id,459 filter->id)) {460 list_move(&filter->next, &del_list);461 hlist_del(&filter->filter_chain);462 } else463 last_filter = filter;464 465 i++;466 }467 468 if (last_filter && (&last_filter->next != priv->filters.next))469 list_move(&priv->filters, &last_filter->next);470 471 spin_unlock_bh(&priv->filters_lock);472 473 list_for_each_entry_safe(filter, tmp, &del_list, next)474 mlx4_en_filter_free(filter);475}476#endif477 478static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,479 __be16 proto, u16 vid)480{481 struct mlx4_en_priv *priv = netdev_priv(dev);482 struct mlx4_en_dev *mdev = priv->mdev;483 int err;484 int idx;485 486 en_dbg(HW, priv, "adding VLAN:%d\n", vid);487 488 set_bit(vid, priv->active_vlans);489 490 /* Add VID to port VLAN filter */491 mutex_lock(&mdev->state_lock);492 if (mdev->device_up && priv->port_up) {493 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);494 if (err) {495 en_err(priv, "Failed configuring VLAN filter\n");496 goto out;497 }498 }499 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);500 if (err)501 en_dbg(HW, priv, "Failed adding vlan %d\n", vid);502 503out:504 mutex_unlock(&mdev->state_lock);505 return err;506}507 508static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,509 __be16 proto, u16 vid)510{511 struct mlx4_en_priv *priv = netdev_priv(dev);512 struct mlx4_en_dev *mdev = priv->mdev;513 int err = 0;514 515 en_dbg(HW, priv, "Killing VID:%d\n", vid);516 517 clear_bit(vid, priv->active_vlans);518 519 /* Remove VID from port VLAN filter */520 mutex_lock(&mdev->state_lock);521 mlx4_unregister_vlan(mdev->dev, priv->port, vid);522 523 if (mdev->device_up && priv->port_up) {524 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);525 if (err)526 en_err(priv, "Failed configuring VLAN filter\n");527 }528 mutex_unlock(&mdev->state_lock);529 530 return err;531}532 533static void mlx4_en_u64_to_mac(struct net_device *dev, u64 src_mac)534{535 u8 addr[ETH_ALEN];536 537 u64_to_ether_addr(src_mac, addr);538 eth_hw_addr_set(dev, addr);539}540 541 542static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv,543 const unsigned char *addr,544 int qpn, u64 *reg_id)545{546 int err;547 548 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||549 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)550 return 0; /* do nothing */551 552 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,553 MLX4_DOMAIN_NIC, reg_id);554 if (err) {555 en_err(priv, "failed to add vxlan steering rule, err %d\n", err);556 return err;557 }558 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);559 return 0;560}561 562 563static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,564 const unsigned char *mac, int *qpn, u64 *reg_id)565{566 struct mlx4_en_dev *mdev = priv->mdev;567 struct mlx4_dev *dev = mdev->dev;568 int err;569 570 switch (dev->caps.steering_mode) {571 case MLX4_STEERING_MODE_B0: {572 struct mlx4_qp qp;573 u8 gid[16] = {0};574 575 qp.qpn = *qpn;576 memcpy(&gid[10], mac, ETH_ALEN);577 gid[5] = priv->port;578 579 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);580 break;581 }582 case MLX4_STEERING_MODE_DEVICE_MANAGED: {583 struct mlx4_spec_list spec_eth = { {NULL} };584 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);585 586 struct mlx4_net_trans_rule rule = {587 .queue_mode = MLX4_NET_TRANS_Q_FIFO,588 .exclusive = 0,589 .allow_loopback = 1,590 .promisc_mode = MLX4_FS_REGULAR,591 .priority = MLX4_DOMAIN_NIC,592 };593 594 rule.port = priv->port;595 rule.qpn = *qpn;596 INIT_LIST_HEAD(&rule.list);597 598 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;599 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);600 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);601 list_add_tail(&spec_eth.list, &rule.list);602 603 err = mlx4_flow_attach(dev, &rule, reg_id);604 break;605 }606 default:607 return -EINVAL;608 }609 if (err)610 en_warn(priv, "Failed Attaching Unicast\n");611 612 return err;613}614 615static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,616 const unsigned char *mac,617 int qpn, u64 reg_id)618{619 struct mlx4_en_dev *mdev = priv->mdev;620 struct mlx4_dev *dev = mdev->dev;621 622 switch (dev->caps.steering_mode) {623 case MLX4_STEERING_MODE_B0: {624 struct mlx4_qp qp;625 u8 gid[16] = {0};626 627 qp.qpn = qpn;628 memcpy(&gid[10], mac, ETH_ALEN);629 gid[5] = priv->port;630 631 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);632 break;633 }634 case MLX4_STEERING_MODE_DEVICE_MANAGED: {635 mlx4_flow_detach(dev, reg_id);636 break;637 }638 default:639 en_err(priv, "Invalid steering mode.\n");640 }641}642 643static int mlx4_en_get_qp(struct mlx4_en_priv *priv)644{645 struct mlx4_en_dev *mdev = priv->mdev;646 struct mlx4_dev *dev = mdev->dev;647 int index = 0;648 int err = 0;649 int *qpn = &priv->base_qpn;650 u64 mac = ether_addr_to_u64(priv->dev->dev_addr);651 652 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",653 priv->dev->dev_addr);654 index = mlx4_register_mac(dev, priv->port, mac);655 if (index < 0) {656 err = index;657 en_err(priv, "Failed adding MAC: %pM\n",658 priv->dev->dev_addr);659 return err;660 }661 662 en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode);663 664 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {665 int base_qpn = mlx4_get_base_qpn(dev, priv->port);666 *qpn = base_qpn + index;667 return 0;668 }669 670 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP,671 MLX4_RES_USAGE_DRIVER);672 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);673 if (err) {674 en_err(priv, "Failed to reserve qp for mac registration\n");675 mlx4_unregister_mac(dev, priv->port, mac);676 return err;677 }678 679 return 0;680}681 682static void mlx4_en_put_qp(struct mlx4_en_priv *priv)683{684 struct mlx4_en_dev *mdev = priv->mdev;685 struct mlx4_dev *dev = mdev->dev;686 int qpn = priv->base_qpn;687 688 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {689 u64 mac = ether_addr_to_u64(priv->dev->dev_addr);690 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",691 priv->dev->dev_addr);692 mlx4_unregister_mac(dev, priv->port, mac);693 } else {694 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",695 priv->port, qpn);696 mlx4_qp_release_range(dev, qpn, 1);697 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;698 }699}700 701static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,702 unsigned char *new_mac, unsigned char *prev_mac)703{704 struct mlx4_en_dev *mdev = priv->mdev;705 struct mlx4_dev *dev = mdev->dev;706 int err = 0;707 u64 new_mac_u64 = ether_addr_to_u64(new_mac);708 709 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {710 struct hlist_head *bucket;711 unsigned int mac_hash;712 struct mlx4_mac_entry *entry;713 struct hlist_node *tmp;714 u64 prev_mac_u64 = ether_addr_to_u64(prev_mac);715 716 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];717 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {718 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {719 mlx4_en_uc_steer_release(priv, entry->mac,720 qpn, entry->reg_id);721 mlx4_unregister_mac(dev, priv->port,722 prev_mac_u64);723 hlist_del_rcu(&entry->hlist);724 synchronize_rcu();725 memcpy(entry->mac, new_mac, ETH_ALEN);726 entry->reg_id = 0;727 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];728 hlist_add_head_rcu(&entry->hlist,729 &priv->mac_hash[mac_hash]);730 mlx4_register_mac(dev, priv->port, new_mac_u64);731 err = mlx4_en_uc_steer_add(priv, new_mac,732 &qpn,733 &entry->reg_id);734 if (err)735 return err;736 if (priv->tunnel_reg_id) {737 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);738 priv->tunnel_reg_id = 0;739 }740 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,741 &priv->tunnel_reg_id);742 return err;743 }744 }745 return -EINVAL;746 }747 748 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);749}750 751static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv,752 unsigned char new_mac[ETH_ALEN + 2])753{754 struct mlx4_en_dev *mdev = priv->mdev;755 int err;756 757 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN))758 return;759 760 err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac);761 if (err)762 en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n",763 new_mac, priv->port, err);764}765 766static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,767 unsigned char new_mac[ETH_ALEN + 2])768{769 int err = 0;770 771 if (priv->port_up) {772 /* Remove old MAC and insert the new one */773 err = mlx4_en_replace_mac(priv, priv->base_qpn,774 new_mac, priv->current_mac);775 if (err)776 en_err(priv, "Failed changing HW MAC address\n");777 } else778 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");779 780 if (!err)781 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));782 783 return err;784}785 786static int mlx4_en_set_mac(struct net_device *dev, void *addr)787{788 struct mlx4_en_priv *priv = netdev_priv(dev);789 struct mlx4_en_dev *mdev = priv->mdev;790 struct sockaddr *saddr = addr;791 unsigned char new_mac[ETH_ALEN + 2];792 int err;793 794 if (!is_valid_ether_addr(saddr->sa_data))795 return -EADDRNOTAVAIL;796 797 mutex_lock(&mdev->state_lock);798 memcpy(new_mac, saddr->sa_data, ETH_ALEN);799 err = mlx4_en_do_set_mac(priv, new_mac);800 if (err)801 goto out;802 803 eth_hw_addr_set(dev, saddr->sa_data);804 mlx4_en_update_user_mac(priv, new_mac);805out:806 mutex_unlock(&mdev->state_lock);807 808 return err;809}810 811static void mlx4_en_clear_list(struct net_device *dev)812{813 struct mlx4_en_priv *priv = netdev_priv(dev);814 struct mlx4_en_mc_list *tmp, *mc_to_del;815 816 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {817 list_del(&mc_to_del->list);818 kfree(mc_to_del);819 }820}821 822static void mlx4_en_cache_mclist(struct net_device *dev)823{824 struct mlx4_en_priv *priv = netdev_priv(dev);825 struct netdev_hw_addr *ha;826 struct mlx4_en_mc_list *tmp;827 828 mlx4_en_clear_list(dev);829 netdev_for_each_mc_addr(ha, dev) {830 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);831 if (!tmp) {832 mlx4_en_clear_list(dev);833 return;834 }835 memcpy(tmp->addr, ha->addr, ETH_ALEN);836 list_add_tail(&tmp->list, &priv->mc_list);837 }838}839 840static void update_mclist_flags(struct mlx4_en_priv *priv,841 struct list_head *dst,842 struct list_head *src)843{844 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;845 bool found;846 847 /* Find all the entries that should be removed from dst,848 * These are the entries that are not found in src849 */850 list_for_each_entry(dst_tmp, dst, list) {851 found = false;852 list_for_each_entry(src_tmp, src, list) {853 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {854 found = true;855 break;856 }857 }858 if (!found)859 dst_tmp->action = MCLIST_REM;860 }861 862 /* Add entries that exist in src but not in dst863 * mark them as need to add864 */865 list_for_each_entry(src_tmp, src, list) {866 found = false;867 list_for_each_entry(dst_tmp, dst, list) {868 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {869 dst_tmp->action = MCLIST_NONE;870 found = true;871 break;872 }873 }874 if (!found) {875 new_mc = kmemdup(src_tmp,876 sizeof(struct mlx4_en_mc_list),877 GFP_KERNEL);878 if (!new_mc)879 return;880 881 new_mc->action = MCLIST_ADD;882 list_add_tail(&new_mc->list, dst);883 }884 }885}886 887static void mlx4_en_set_rx_mode(struct net_device *dev)888{889 struct mlx4_en_priv *priv = netdev_priv(dev);890 891 if (!priv->port_up)892 return;893 894 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);895}896 897static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,898 struct mlx4_en_dev *mdev)899{900 int err = 0;901 902 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {903 if (netif_msg_rx_status(priv))904 en_warn(priv, "Entering promiscuous mode\n");905 priv->flags |= MLX4_EN_FLAG_PROMISC;906 907 /* Enable promiscouos mode */908 switch (mdev->dev->caps.steering_mode) {909 case MLX4_STEERING_MODE_DEVICE_MANAGED:910 err = mlx4_flow_steer_promisc_add(mdev->dev,911 priv->port,912 priv->base_qpn,913 MLX4_FS_ALL_DEFAULT);914 if (err)915 en_err(priv, "Failed enabling promiscuous mode\n");916 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;917 break;918 919 case MLX4_STEERING_MODE_B0:920 err = mlx4_unicast_promisc_add(mdev->dev,921 priv->base_qpn,922 priv->port);923 if (err)924 en_err(priv, "Failed enabling unicast promiscuous mode\n");925 926 /* Add the default qp number as multicast927 * promisc928 */929 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {930 err = mlx4_multicast_promisc_add(mdev->dev,931 priv->base_qpn,932 priv->port);933 if (err)934 en_err(priv, "Failed enabling multicast promiscuous mode\n");935 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;936 }937 break;938 939 case MLX4_STEERING_MODE_A0:940 err = mlx4_SET_PORT_qpn_calc(mdev->dev,941 priv->port,942 priv->base_qpn,943 1);944 if (err)945 en_err(priv, "Failed enabling promiscuous mode\n");946 break;947 }948 949 /* Disable port multicast filter (unconditionally) */950 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,951 0, MLX4_MCAST_DISABLE);952 if (err)953 en_err(priv, "Failed disabling multicast filter\n");954 }955}956 957static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,958 struct mlx4_en_dev *mdev)959{960 int err = 0;961 962 if (netif_msg_rx_status(priv))963 en_warn(priv, "Leaving promiscuous mode\n");964 priv->flags &= ~MLX4_EN_FLAG_PROMISC;965 966 /* Disable promiscouos mode */967 switch (mdev->dev->caps.steering_mode) {968 case MLX4_STEERING_MODE_DEVICE_MANAGED:969 err = mlx4_flow_steer_promisc_remove(mdev->dev,970 priv->port,971 MLX4_FS_ALL_DEFAULT);972 if (err)973 en_err(priv, "Failed disabling promiscuous mode\n");974 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;975 break;976 977 case MLX4_STEERING_MODE_B0:978 err = mlx4_unicast_promisc_remove(mdev->dev,979 priv->base_qpn,980 priv->port);981 if (err)982 en_err(priv, "Failed disabling unicast promiscuous mode\n");983 /* Disable Multicast promisc */984 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {985 err = mlx4_multicast_promisc_remove(mdev->dev,986 priv->base_qpn,987 priv->port);988 if (err)989 en_err(priv, "Failed disabling multicast promiscuous mode\n");990 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;991 }992 break;993 994 case MLX4_STEERING_MODE_A0:995 err = mlx4_SET_PORT_qpn_calc(mdev->dev,996 priv->port,997 priv->base_qpn, 0);998 if (err)999 en_err(priv, "Failed disabling promiscuous mode\n");1000 break;1001 }1002}1003 1004static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,1005 struct net_device *dev,1006 struct mlx4_en_dev *mdev)1007{1008 struct mlx4_en_mc_list *mclist, *tmp;1009 u64 mcast_addr = 0;1010 u8 mc_list[16] = {0};1011 int err = 0;1012 1013 /* Enable/disable the multicast filter according to IFF_ALLMULTI */1014 if (dev->flags & IFF_ALLMULTI) {1015 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,1016 0, MLX4_MCAST_DISABLE);1017 if (err)1018 en_err(priv, "Failed disabling multicast filter\n");1019 1020 /* Add the default qp number as multicast promisc */1021 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {1022 switch (mdev->dev->caps.steering_mode) {1023 case MLX4_STEERING_MODE_DEVICE_MANAGED:1024 err = mlx4_flow_steer_promisc_add(mdev->dev,1025 priv->port,1026 priv->base_qpn,1027 MLX4_FS_MC_DEFAULT);1028 break;1029 1030 case MLX4_STEERING_MODE_B0:1031 err = mlx4_multicast_promisc_add(mdev->dev,1032 priv->base_qpn,1033 priv->port);1034 break;1035 1036 case MLX4_STEERING_MODE_A0:1037 break;1038 }1039 if (err)1040 en_err(priv, "Failed entering multicast promisc mode\n");1041 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;1042 }1043 } else {1044 /* Disable Multicast promisc */1045 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {1046 switch (mdev->dev->caps.steering_mode) {1047 case MLX4_STEERING_MODE_DEVICE_MANAGED:1048 err = mlx4_flow_steer_promisc_remove(mdev->dev,1049 priv->port,1050 MLX4_FS_MC_DEFAULT);1051 break;1052 1053 case MLX4_STEERING_MODE_B0:1054 err = mlx4_multicast_promisc_remove(mdev->dev,1055 priv->base_qpn,1056 priv->port);1057 break;1058 1059 case MLX4_STEERING_MODE_A0:1060 break;1061 }1062 if (err)1063 en_err(priv, "Failed disabling multicast promiscuous mode\n");1064 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;1065 }1066 1067 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,1068 0, MLX4_MCAST_DISABLE);1069 if (err)1070 en_err(priv, "Failed disabling multicast filter\n");1071 1072 /* Flush mcast filter and init it with broadcast address */1073 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,1074 1, MLX4_MCAST_CONFIG);1075 1076 /* Update multicast list - we cache all addresses so they won't1077 * change while HW is updated holding the command semaphore1078 */1079 netif_addr_lock_bh(dev);1080 mlx4_en_cache_mclist(dev);1081 netif_addr_unlock_bh(dev);1082 list_for_each_entry(mclist, &priv->mc_list, list) {1083 mcast_addr = ether_addr_to_u64(mclist->addr);1084 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,1085 mcast_addr, 0, MLX4_MCAST_CONFIG);1086 }1087 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,1088 0, MLX4_MCAST_ENABLE);1089 if (err)1090 en_err(priv, "Failed enabling multicast filter\n");1091 1092 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);1093 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {1094 if (mclist->action == MCLIST_REM) {1095 /* detach this address and delete from list */1096 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);1097 mc_list[5] = priv->port;1098 err = mlx4_multicast_detach(mdev->dev,1099 priv->rss_map.indir_qp,1100 mc_list,1101 MLX4_PROT_ETH,1102 mclist->reg_id);1103 if (err)1104 en_err(priv, "Fail to detach multicast address\n");1105 1106 if (mclist->tunnel_reg_id) {1107 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);1108 if (err)1109 en_err(priv, "Failed to detach multicast address\n");1110 }1111 1112 /* remove from list */1113 list_del(&mclist->list);1114 kfree(mclist);1115 } else if (mclist->action == MCLIST_ADD) {1116 /* attach the address */1117 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);1118 /* needed for B0 steering support */1119 mc_list[5] = priv->port;1120 err = mlx4_multicast_attach(mdev->dev,1121 priv->rss_map.indir_qp,1122 mc_list,1123 priv->port, 0,1124 MLX4_PROT_ETH,1125 &mclist->reg_id);1126 if (err)1127 en_err(priv, "Fail to attach multicast address\n");1128 1129 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,1130 &mclist->tunnel_reg_id);1131 if (err)1132 en_err(priv, "Failed to attach multicast address\n");1133 }1134 }1135 }1136}1137 1138static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,1139 struct net_device *dev,1140 struct mlx4_en_dev *mdev)1141{1142 struct netdev_hw_addr *ha;1143 struct mlx4_mac_entry *entry;1144 struct hlist_node *tmp;1145 bool found;1146 u64 mac;1147 int err = 0;1148 struct hlist_head *bucket;1149 unsigned int i;1150 int removed = 0;1151 u32 prev_flags;1152 1153 /* Note that we do not need to protect our mac_hash traversal with rcu,1154 * since all modification code is protected by mdev->state_lock1155 */1156 1157 /* find what to remove */1158 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {1159 bucket = &priv->mac_hash[i];1160 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {1161 found = false;1162 netdev_for_each_uc_addr(ha, dev) {1163 if (ether_addr_equal_64bits(entry->mac,1164 ha->addr)) {1165 found = true;1166 break;1167 }1168 }1169 1170 /* MAC address of the port is not in uc list */1171 if (ether_addr_equal_64bits(entry->mac,1172 priv->current_mac))1173 found = true;1174 1175 if (!found) {1176 mac = ether_addr_to_u64(entry->mac);1177 mlx4_en_uc_steer_release(priv, entry->mac,1178 priv->base_qpn,1179 entry->reg_id);1180 mlx4_unregister_mac(mdev->dev, priv->port, mac);1181 1182 hlist_del_rcu(&entry->hlist);1183 kfree_rcu(entry, rcu);1184 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",1185 entry->mac, priv->port);1186 ++removed;1187 }1188 }1189 }1190 1191 /* if we didn't remove anything, there is no use in trying to add1192 * again once we are in a forced promisc mode state1193 */1194 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)1195 return;1196 1197 prev_flags = priv->flags;1198 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;1199 1200 /* find what to add */1201 netdev_for_each_uc_addr(ha, dev) {1202 found = false;1203 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];1204 hlist_for_each_entry(entry, bucket, hlist) {1205 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {1206 found = true;1207 break;1208 }1209 }1210 1211 if (!found) {1212 entry = kmalloc(sizeof(*entry), GFP_KERNEL);1213 if (!entry) {1214 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",1215 ha->addr, priv->port);1216 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;1217 break;1218 }1219 mac = ether_addr_to_u64(ha->addr);1220 memcpy(entry->mac, ha->addr, ETH_ALEN);1221 err = mlx4_register_mac(mdev->dev, priv->port, mac);1222 if (err < 0) {1223 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",1224 ha->addr, priv->port, err);1225 kfree(entry);1226 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;1227 break;1228 }1229 err = mlx4_en_uc_steer_add(priv, ha->addr,1230 &priv->base_qpn,1231 &entry->reg_id);1232 if (err) {1233 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",1234 ha->addr, priv->port, err);1235 mlx4_unregister_mac(mdev->dev, priv->port, mac);1236 kfree(entry);1237 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;1238 break;1239 } else {1240 unsigned int mac_hash;1241 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",1242 ha->addr, priv->port);1243 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];1244 bucket = &priv->mac_hash[mac_hash];1245 hlist_add_head_rcu(&entry->hlist, bucket);1246 }1247 }1248 }1249 1250 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {1251 en_warn(priv, "Forcing promiscuous mode on port:%d\n",1252 priv->port);1253 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {1254 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",1255 priv->port);1256 }1257}1258 1259static void mlx4_en_do_set_rx_mode(struct work_struct *work)1260{1261 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,1262 rx_mode_task);1263 struct mlx4_en_dev *mdev = priv->mdev;1264 struct net_device *dev = priv->dev;1265 1266 mutex_lock(&mdev->state_lock);1267 if (!mdev->device_up) {1268 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");1269 goto out;1270 }1271 if (!priv->port_up) {1272 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");1273 goto out;1274 }1275 1276 if (!netif_carrier_ok(dev)) {1277 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {1278 if (priv->port_state.link_state) {1279 netif_carrier_on(dev);1280 en_dbg(LINK, priv, "Link Up\n");1281 }1282 }1283 }1284 1285 if (dev->priv_flags & IFF_UNICAST_FLT)1286 mlx4_en_do_uc_filter(priv, dev, mdev);1287 1288 /* Promsicuous mode: disable all filters */1289 if ((dev->flags & IFF_PROMISC) ||1290 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {1291 mlx4_en_set_promisc_mode(priv, mdev);1292 goto out;1293 }1294 1295 /* Not in promiscuous mode */1296 if (priv->flags & MLX4_EN_FLAG_PROMISC)1297 mlx4_en_clear_promisc_mode(priv, mdev);1298 1299 mlx4_en_do_multicast(priv, dev, mdev);1300out:1301 mutex_unlock(&mdev->state_lock);1302}1303 1304static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)1305{1306 u64 reg_id;1307 int err = 0;1308 int *qpn = &priv->base_qpn;1309 struct mlx4_mac_entry *entry;1310 1311 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id);1312 if (err)1313 return err;1314 1315 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,1316 &priv->tunnel_reg_id);1317 if (err)1318 goto tunnel_err;1319 1320 entry = kmalloc(sizeof(*entry), GFP_KERNEL);1321 if (!entry) {1322 err = -ENOMEM;1323 goto alloc_err;1324 }1325 1326 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));1327 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));1328 entry->reg_id = reg_id;1329 hlist_add_head_rcu(&entry->hlist,1330 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);1331 1332 return 0;1333 1334alloc_err:1335 if (priv->tunnel_reg_id)1336 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);1337 1338tunnel_err:1339 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);1340 return err;1341}1342 1343static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)1344{1345 u64 mac;1346 unsigned int i;1347 int qpn = priv->base_qpn;1348 struct hlist_head *bucket;1349 struct hlist_node *tmp;1350 struct mlx4_mac_entry *entry;1351 1352 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {1353 bucket = &priv->mac_hash[i];1354 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {1355 mac = ether_addr_to_u64(entry->mac);1356 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",1357 entry->mac);1358 mlx4_en_uc_steer_release(priv, entry->mac,1359 qpn, entry->reg_id);1360 1361 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);1362 hlist_del_rcu(&entry->hlist);1363 kfree_rcu(entry, rcu);1364 }1365 }1366 1367 if (priv->tunnel_reg_id) {1368 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);1369 priv->tunnel_reg_id = 0;1370 }1371}1372 1373static void mlx4_en_tx_timeout(struct net_device *dev, unsigned int txqueue)1374{1375 struct mlx4_en_priv *priv = netdev_priv(dev);1376 struct mlx4_en_dev *mdev = priv->mdev;1377 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][txqueue];1378 1379 if (netif_msg_timer(priv))1380 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);1381 1382 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",1383 txqueue, tx_ring->qpn, tx_ring->sp_cqn,1384 tx_ring->cons, tx_ring->prod);1385 1386 priv->port_stats.tx_timeout++;1387 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state)) {1388 en_dbg(DRV, priv, "Scheduling port restart\n");1389 queue_work(mdev->workqueue, &priv->restart_task);1390 }1391}1392 1393 1394static void1395mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)1396{1397 struct mlx4_en_priv *priv = netdev_priv(dev);1398 1399 spin_lock_bh(&priv->stats_lock);1400 mlx4_en_fold_software_stats(dev);1401 netdev_stats_to_stats64(stats, &dev->stats);1402 spin_unlock_bh(&priv->stats_lock);1403}1404 1405static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)1406{1407 struct mlx4_en_cq *cq;1408 int i, t;1409 1410 /* If we haven't received a specific coalescing setting1411 * (module param), we set the moderation parameters as follows:1412 * - moder_cnt is set to the number of mtu sized packets to1413 * satisfy our coalescing target.1414 * - moder_time is set to a fixed value.1415 */1416 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;1417 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;1418 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;1419 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;1420 en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",1421 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);1422 1423 /* Setup cq moderation params */1424 for (i = 0; i < priv->rx_ring_num; i++) {1425 cq = priv->rx_cq[i];1426 cq->moder_cnt = priv->rx_frames;1427 cq->moder_time = priv->rx_usecs;1428 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;1429 priv->last_moder_packets[i] = 0;1430 priv->last_moder_bytes[i] = 0;1431 }1432 1433 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {1434 for (i = 0; i < priv->tx_ring_num[t]; i++) {1435 cq = priv->tx_cq[t][i];1436 cq->moder_cnt = priv->tx_frames;1437 cq->moder_time = priv->tx_usecs;1438 }1439 }1440 1441 /* Reset auto-moderation params */1442 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;1443 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;1444 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;1445 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;1446 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;1447 priv->adaptive_rx_coal = 1;1448 priv->last_moder_jiffies = 0;1449 priv->last_moder_tx_packets = 0;1450}1451 1452static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)1453{1454 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);1455 u32 pkt_rate_high, pkt_rate_low;1456 struct mlx4_en_cq *cq;1457 unsigned long packets;1458 unsigned long rate;1459 unsigned long avg_pkt_size;1460 unsigned long rx_packets;1461 unsigned long rx_bytes;1462 unsigned long rx_pkt_diff;1463 int moder_time;1464 int ring, err;1465 1466 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)1467 return;1468 1469 pkt_rate_low = READ_ONCE(priv->pkt_rate_low);1470 pkt_rate_high = READ_ONCE(priv->pkt_rate_high);1471 1472 for (ring = 0; ring < priv->rx_ring_num; ring++) {1473 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets);1474 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes);1475 1476 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring];1477 packets = rx_pkt_diff;1478 rate = packets * HZ / period;1479 avg_pkt_size = packets ? (rx_bytes -1480 priv->last_moder_bytes[ring]) / packets : 0;1481 1482 /* Apply auto-moderation only when packet rate1483 * exceeds a rate that it matters */1484 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&1485 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {1486 if (rate <= pkt_rate_low)1487 moder_time = priv->rx_usecs_low;1488 else if (rate >= pkt_rate_high)1489 moder_time = priv->rx_usecs_high;1490 else1491 moder_time = (rate - pkt_rate_low) *1492 (priv->rx_usecs_high - priv->rx_usecs_low) /1493 (pkt_rate_high - pkt_rate_low) +1494 priv->rx_usecs_low;1495 } else {1496 moder_time = priv->rx_usecs_low;1497 }1498 1499 cq = priv->rx_cq[ring];1500 if (moder_time != priv->last_moder_time[ring] ||1501 cq->moder_cnt != priv->rx_frames) {1502 priv->last_moder_time[ring] = moder_time;1503 cq->moder_time = moder_time;1504 cq->moder_cnt = priv->rx_frames;1505 err = mlx4_en_set_cq_moder(priv, cq);1506 if (err)1507 en_err(priv, "Failed modifying moderation for cq:%d\n",1508 ring);1509 }1510 priv->last_moder_packets[ring] = rx_packets;1511 priv->last_moder_bytes[ring] = rx_bytes;1512 }1513 1514 priv->last_moder_jiffies = jiffies;1515}1516 1517static void mlx4_en_do_get_stats(struct work_struct *work)1518{1519 struct delayed_work *delay = to_delayed_work(work);1520 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,1521 stats_task);1522 struct mlx4_en_dev *mdev = priv->mdev;1523 int err;1524 1525 mutex_lock(&mdev->state_lock);1526 if (mdev->device_up) {1527 if (priv->port_up) {1528 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);1529 if (err)1530 en_dbg(HW, priv, "Could not update stats\n");1531 1532 mlx4_en_auto_moderation(priv);1533 }1534 1535 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);1536 }1537 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {1538 mlx4_en_do_set_mac(priv, priv->current_mac);1539 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;1540 }1541 mutex_unlock(&mdev->state_lock);1542}1543 1544/* mlx4_en_service_task - Run service task for tasks that needed to be done1545 * periodically1546 */1547static void mlx4_en_service_task(struct work_struct *work)1548{1549 struct delayed_work *delay = to_delayed_work(work);1550 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,1551 service_task);1552 struct mlx4_en_dev *mdev = priv->mdev;1553 1554 mutex_lock(&mdev->state_lock);1555 if (mdev->device_up) {1556 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)1557 mlx4_en_ptp_overflow_check(mdev);1558 1559 mlx4_en_recover_from_oom(priv);1560 queue_delayed_work(mdev->workqueue, &priv->service_task,1561 SERVICE_TASK_DELAY);1562 }1563 mutex_unlock(&mdev->state_lock);1564}1565 1566static void mlx4_en_linkstate(struct mlx4_en_priv *priv)1567{1568 struct mlx4_en_port_state *port_state = &priv->port_state;1569 struct mlx4_en_dev *mdev = priv->mdev;1570 struct net_device *dev = priv->dev;1571 bool up;1572 1573 if (mlx4_en_QUERY_PORT(mdev, priv->port))1574 port_state->link_state = MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN;1575 1576 up = port_state->link_state == MLX4_PORT_STATE_DEV_EVENT_PORT_UP;1577 if (up == netif_carrier_ok(dev))1578 netif_carrier_event(dev);1579 if (!up) {1580 en_info(priv, "Link Down\n");1581 netif_carrier_off(dev);1582 } else {1583 en_info(priv, "Link Up\n");1584 netif_carrier_on(dev);1585 }1586}1587 1588static void mlx4_en_linkstate_work(struct work_struct *work)1589{1590 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,1591 linkstate_task);1592 struct mlx4_en_dev *mdev = priv->mdev;1593 1594 mutex_lock(&mdev->state_lock);1595 mlx4_en_linkstate(priv);1596 mutex_unlock(&mdev->state_lock);1597}1598 1599static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)1600{1601 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];1602 int numa_node = priv->mdev->dev->numa_node;1603 1604 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))1605 return -ENOMEM;1606 1607 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),1608 ring->affinity_mask);1609 return 0;1610}1611 1612static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)1613{1614 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);1615}1616 1617static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,1618 int tx_ring_idx)1619{1620 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx];1621 int rr_index = tx_ring_idx;1622 1623 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;1624 tx_ring->recycle_ring = priv->rx_ring[rr_index];1625 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n",1626 TX_XDP, tx_ring_idx, rr_index);1627}1628 1629int mlx4_en_start_port(struct net_device *dev)1630{1631 struct mlx4_en_priv *priv = netdev_priv(dev);1632 struct mlx4_en_dev *mdev = priv->mdev;1633 struct mlx4_en_cq *cq;1634 struct mlx4_en_tx_ring *tx_ring;1635 int rx_index = 0;1636 int err = 0;1637 int i, t;1638 int j;1639 u8 mc_list[16] = {0};1640 1641 if (priv->port_up) {1642 en_dbg(DRV, priv, "start port called while port already up\n");1643 return 0;1644 }1645 1646 INIT_LIST_HEAD(&priv->mc_list);1647 INIT_LIST_HEAD(&priv->curr_list);1648 INIT_LIST_HEAD(&priv->ethtool_list);1649 memset(&priv->ethtool_rules[0], 0,1650 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);1651 1652 /* Calculate Rx buf size */1653 WRITE_ONCE(dev->mtu, min(dev->mtu, priv->max_mtu));1654 mlx4_en_calc_rx_buf(dev);1655 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);1656 1657 /* Configure rx cq's and rings */1658 err = mlx4_en_activate_rx_rings(priv);1659 if (err) {1660 en_err(priv, "Failed to activate RX rings\n");1661 return err;1662 }1663 for (i = 0; i < priv->rx_ring_num; i++) {1664 cq = priv->rx_cq[i];1665 1666 err = mlx4_en_init_affinity_hint(priv, i);1667 if (err) {1668 en_err(priv, "Failed preparing IRQ affinity hint\n");1669 goto cq_err;1670 }1671 1672 err = mlx4_en_activate_cq(priv, cq, i);1673 if (err) {1674 en_err(priv, "Failed activating Rx CQ\n");1675 mlx4_en_free_affinity_hint(priv, i);1676 goto cq_err;1677 }1678 1679 for (j = 0; j < cq->size; j++) {1680 struct mlx4_cqe *cqe = NULL;1681 1682 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +1683 priv->cqe_factor;1684 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;1685 }1686 1687 err = mlx4_en_set_cq_moder(priv, cq);1688 if (err) {1689 en_err(priv, "Failed setting cq moderation parameters\n");1690 mlx4_en_deactivate_cq(priv, cq);1691 mlx4_en_free_affinity_hint(priv, i);1692 goto cq_err;1693 }1694 mlx4_en_arm_cq(priv, cq);1695 priv->rx_ring[i]->cqn = cq->mcq.cqn;1696 ++rx_index;1697 }1698 1699 /* Set qp number */1700 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);1701 err = mlx4_en_get_qp(priv);1702 if (err) {1703 en_err(priv, "Failed getting eth qp\n");1704 goto cq_err;1705 }1706 mdev->mac_removed[priv->port] = 0;1707 1708 priv->counter_index =1709 mlx4_get_default_counter_index(mdev->dev, priv->port);1710 1711 err = mlx4_en_config_rss_steer(priv);1712 if (err) {1713 en_err(priv, "Failed configuring rss steering\n");1714 goto mac_err;1715 }1716 1717 err = mlx4_en_create_drop_qp(priv);1718 if (err)1719 goto rss_err;1720 1721 /* Configure tx cq's and rings */1722 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {1723 u8 num_tx_rings_p_up = t == TX ?1724 priv->num_tx_rings_p_up : priv->tx_ring_num[t];1725 1726 for (i = 0; i < priv->tx_ring_num[t]; i++) {1727 /* Configure cq */1728 cq = priv->tx_cq[t][i];1729 err = mlx4_en_activate_cq(priv, cq, i);1730 if (err) {1731 en_err(priv, "Failed allocating Tx CQ\n");1732 goto tx_err;1733 }1734 err = mlx4_en_set_cq_moder(priv, cq);1735 if (err) {1736 en_err(priv, "Failed setting cq moderation parameters\n");1737 mlx4_en_deactivate_cq(priv, cq);1738 goto tx_err;1739 }1740 en_dbg(DRV, priv,1741 "Resetting index of collapsed CQ:%d to -1\n", i);1742 cq->buf->wqe_index = cpu_to_be16(0xffff);1743 1744 /* Configure ring */1745 tx_ring = priv->tx_ring[t][i];1746 err = mlx4_en_activate_tx_ring(priv, tx_ring,1747 cq->mcq.cqn,1748 i / num_tx_rings_p_up);1749 if (err) {1750 en_err(priv, "Failed allocating Tx ring\n");1751 mlx4_en_deactivate_cq(priv, cq);1752 goto tx_err;1753 }1754 clear_bit(MLX4_EN_TX_RING_STATE_RECOVERING, &tx_ring->state);1755 if (t != TX_XDP) {1756 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);1757 tx_ring->recycle_ring = NULL;1758 1759 /* Arm CQ for TX completions */1760 mlx4_en_arm_cq(priv, cq);1761 1762 } else {1763 mlx4_en_init_tx_xdp_ring_descs(priv, tx_ring);1764 mlx4_en_init_recycle_ring(priv, i);1765 /* XDP TX CQ should never be armed */1766 }1767 1768 /* Set initial ownership of all Tx TXBBs to SW (1) */1769 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)1770 *((u32 *)(tx_ring->buf + j)) = 0xffffffff;1771 }1772 }1773 1774 /* Configure port */1775 err = mlx4_SET_PORT_general(mdev->dev, priv->port,1776 priv->rx_skb_size + ETH_FCS_LEN,1777 priv->prof->tx_pause,1778 priv->prof->tx_ppp,1779 priv->prof->rx_pause,1780 priv->prof->rx_ppp);1781 if (err) {1782 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",1783 priv->port, err);1784 goto tx_err;1785 }1786 1787 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);1788 if (err) {1789 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",1790 dev->mtu, priv->port, err);1791 goto tx_err;1792 }1793 1794 /* Set default qp number */1795 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);1796 if (err) {1797 en_err(priv, "Failed setting default qp numbers\n");1798 goto tx_err;1799 }1800 1801 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {1802 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);1803 if (err) {1804 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",1805 err);1806 goto tx_err;1807 }1808 }1809 1810 /* Init port */1811 en_dbg(HW, priv, "Initializing port\n");1812 err = mlx4_INIT_PORT(mdev->dev, priv->port);1813 if (err) {1814 en_err(priv, "Failed Initializing port\n");1815 goto tx_err;1816 }1817 1818 /* Set Unicast and VXLAN steering rules */1819 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&1820 mlx4_en_set_rss_steer_rules(priv))1821 mlx4_warn(mdev, "Failed setting steering rules\n");1822 1823 /* Attach rx QP to broadcast address */1824 eth_broadcast_addr(&mc_list[10]);1825 mc_list[5] = priv->port; /* needed for B0 steering support */1826 if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list,1827 priv->port, 0, MLX4_PROT_ETH,1828 &priv->broadcast_id))1829 mlx4_warn(mdev, "Failed Attaching Broadcast\n");1830 1831 /* Must redo promiscuous mode setup. */1832 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);1833 1834 /* Schedule multicast task to populate multicast list */1835 queue_work(mdev->workqueue, &priv->rx_mode_task);1836 1837 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)1838 udp_tunnel_nic_reset_ntf(dev);1839 1840 priv->port_up = true;1841 1842 /* Process all completions if exist to prevent1843 * the queues freezing if they are full1844 */1845 for (i = 0; i < priv->rx_ring_num; i++) {1846 local_bh_disable();1847 napi_schedule(&priv->rx_cq[i]->napi);1848 local_bh_enable();1849 }1850 1851 clear_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state);1852 netif_tx_start_all_queues(dev);1853 netif_device_attach(dev);1854 1855 return 0;1856 1857tx_err:1858 if (t == MLX4_EN_NUM_TX_TYPES) {1859 t--;1860 i = priv->tx_ring_num[t];1861 }1862 while (t >= 0) {1863 while (i--) {1864 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);1865 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);1866 }1867 if (!t--)1868 break;1869 i = priv->tx_ring_num[t];1870 }1871 mlx4_en_destroy_drop_qp(priv);1872rss_err:1873 mlx4_en_release_rss_steer(priv);1874mac_err:1875 mlx4_en_put_qp(priv);1876cq_err:1877 while (rx_index--) {1878 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);1879 mlx4_en_free_affinity_hint(priv, rx_index);1880 }1881 for (i = 0; i < priv->rx_ring_num; i++)1882 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);1883 1884 return err; /* need to close devices */1885}1886 1887 1888void mlx4_en_stop_port(struct net_device *dev, int detach)1889{1890 struct mlx4_en_priv *priv = netdev_priv(dev);1891 struct mlx4_en_dev *mdev = priv->mdev;1892 struct mlx4_en_mc_list *mclist, *tmp;1893 struct ethtool_flow_id *flow, *tmp_flow;1894 int i, t;1895 u8 mc_list[16] = {0};1896 1897 if (!priv->port_up) {1898 en_dbg(DRV, priv, "stop port called while port already down\n");1899 return;1900 }1901 1902 /* close port*/1903 mlx4_CLOSE_PORT(mdev->dev, priv->port);1904 1905 /* Synchronize with tx routine */1906 netif_tx_lock_bh(dev);1907 if (detach)1908 netif_device_detach(dev);1909 netif_tx_stop_all_queues(dev);1910 netif_tx_unlock_bh(dev);1911 1912 netif_tx_disable(dev);1913 1914 spin_lock_bh(&priv->stats_lock);1915 mlx4_en_fold_software_stats(dev);1916 /* Set port as not active */1917 priv->port_up = false;1918 spin_unlock_bh(&priv->stats_lock);1919 1920 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);1921 1922 /* Promsicuous mode */1923 if (mdev->dev->caps.steering_mode ==1924 MLX4_STEERING_MODE_DEVICE_MANAGED) {1925 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |1926 MLX4_EN_FLAG_MC_PROMISC);1927 mlx4_flow_steer_promisc_remove(mdev->dev,1928 priv->port,1929 MLX4_FS_ALL_DEFAULT);1930 mlx4_flow_steer_promisc_remove(mdev->dev,1931 priv->port,1932 MLX4_FS_MC_DEFAULT);1933 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {1934 priv->flags &= ~MLX4_EN_FLAG_PROMISC;1935 1936 /* Disable promiscouos mode */1937 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,1938 priv->port);1939 1940 /* Disable Multicast promisc */1941 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {1942 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,1943 priv->port);1944 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;1945 }1946 }1947 1948 /* Detach All multicasts */1949 eth_broadcast_addr(&mc_list[10]);1950 mc_list[5] = priv->port; /* needed for B0 steering support */1951 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list,1952 MLX4_PROT_ETH, priv->broadcast_id);1953 list_for_each_entry(mclist, &priv->curr_list, list) {1954 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);1955 mc_list[5] = priv->port;1956 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp,1957 mc_list, MLX4_PROT_ETH, mclist->reg_id);1958 if (mclist->tunnel_reg_id)1959 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);1960 }1961 mlx4_en_clear_list(dev);1962 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {1963 list_del(&mclist->list);1964 kfree(mclist);1965 }1966 1967 /* Flush multicast filter */1968 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);1969 1970 /* Remove flow steering rules for the port*/1971 if (mdev->dev->caps.steering_mode ==1972 MLX4_STEERING_MODE_DEVICE_MANAGED) {1973 ASSERT_RTNL();1974 list_for_each_entry_safe(flow, tmp_flow,1975 &priv->ethtool_list, list) {1976 mlx4_flow_detach(mdev->dev, flow->id);1977 list_del(&flow->list);1978 }1979 }1980 1981 mlx4_en_destroy_drop_qp(priv);1982 1983 /* Free TX Rings */1984 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {1985 for (i = 0; i < priv->tx_ring_num[t]; i++) {1986 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);1987 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);1988 }1989 }1990 msleep(10);1991 1992 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)1993 for (i = 0; i < priv->tx_ring_num[t]; i++)1994 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]);1995 1996 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)1997 mlx4_en_delete_rss_steer_rules(priv);1998 1999 /* Free RSS qps */2000 mlx4_en_release_rss_steer(priv);2001 2002 /* Unregister Mac address for the port */2003 mlx4_en_put_qp(priv);2004 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))2005 mdev->mac_removed[priv->port] = 1;2006 2007 /* Free RX Rings */2008 for (i = 0; i < priv->rx_ring_num; i++) {2009 struct mlx4_en_cq *cq = priv->rx_cq[i];2010 2011 napi_synchronize(&cq->napi);2012 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);2013 mlx4_en_deactivate_cq(priv, cq);2014 2015 mlx4_en_free_affinity_hint(priv, i);2016 }2017}2018 2019static void mlx4_en_restart(struct work_struct *work)2020{2021 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,2022 restart_task);2023 struct mlx4_en_dev *mdev = priv->mdev;2024 struct net_device *dev = priv->dev;2025 2026 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);2027 2028 rtnl_lock();2029 mutex_lock(&mdev->state_lock);2030 if (priv->port_up) {2031 mlx4_en_stop_port(dev, 1);2032 if (mlx4_en_start_port(dev))2033 en_err(priv, "Failed restarting port %d\n", priv->port);2034 }2035 mutex_unlock(&mdev->state_lock);2036 rtnl_unlock();2037}2038 2039static void mlx4_en_clear_stats(struct net_device *dev)2040{2041 struct mlx4_en_priv *priv = netdev_priv(dev);2042 struct mlx4_en_dev *mdev = priv->mdev;2043 struct mlx4_en_tx_ring **tx_ring;2044 int i;2045 2046 if (!mlx4_is_slave(mdev->dev))2047 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))2048 en_dbg(HW, priv, "Failed dumping statistics\n");2049 2050 memset(&priv->pkstats, 0, sizeof(priv->pkstats));2051 memset(&priv->port_stats, 0, sizeof(priv->port_stats));2052 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));2053 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));2054 memset(&priv->rx_priority_flowstats, 0,2055 sizeof(priv->rx_priority_flowstats));2056 memset(&priv->tx_priority_flowstats, 0,2057 sizeof(priv->tx_priority_flowstats));2058 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));2059 2060 tx_ring = priv->tx_ring[TX];2061 for (i = 0; i < priv->tx_ring_num[TX]; i++) {2062 tx_ring[i]->bytes = 0;2063 tx_ring[i]->packets = 0;2064 tx_ring[i]->tx_csum = 0;2065 tx_ring[i]->tx_dropped = 0;2066 tx_ring[i]->queue_stopped = 0;2067 tx_ring[i]->wake_queue = 0;2068 tx_ring[i]->tso_packets = 0;2069 tx_ring[i]->xmit_more = 0;2070 }2071 for (i = 0; i < priv->rx_ring_num; i++) {2072 priv->rx_ring[i]->bytes = 0;2073 priv->rx_ring[i]->packets = 0;2074 priv->rx_ring[i]->csum_ok = 0;2075 priv->rx_ring[i]->csum_none = 0;2076 priv->rx_ring[i]->csum_complete = 0;2077 priv->rx_ring[i]->alloc_fail = 0;2078 }2079}2080 2081static int mlx4_en_open(struct net_device *dev)2082{2083 struct mlx4_en_priv *priv = netdev_priv(dev);2084 struct mlx4_en_dev *mdev = priv->mdev;2085 int err = 0;2086 2087 mutex_lock(&mdev->state_lock);2088 2089 if (!mdev->device_up) {2090 en_err(priv, "Cannot open - device down/disabled\n");2091 err = -EBUSY;2092 goto out;2093 }2094 2095 /* Reset HW statistics and SW counters */2096 mlx4_en_clear_stats(dev);2097 2098 err = mlx4_en_start_port(dev);2099 if (err) {2100 en_err(priv, "Failed starting port:%d\n", priv->port);2101 goto out;2102 }2103 mlx4_en_linkstate(priv);2104out:2105 mutex_unlock(&mdev->state_lock);2106 return err;2107}2108 2109 2110static int mlx4_en_close(struct net_device *dev)2111{2112 struct mlx4_en_priv *priv = netdev_priv(dev);2113 struct mlx4_en_dev *mdev = priv->mdev;2114 2115 en_dbg(IFDOWN, priv, "Close port called\n");2116 2117 mutex_lock(&mdev->state_lock);2118 2119 mlx4_en_stop_port(dev, 0);2120 netif_carrier_off(dev);2121 2122 mutex_unlock(&mdev->state_lock);2123 return 0;2124}2125 2126static void mlx4_en_free_resources(struct mlx4_en_priv *priv)2127{2128 int i, t;2129 2130#ifdef CONFIG_RFS_ACCEL2131 priv->dev->rx_cpu_rmap = NULL;2132#endif2133 2134 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {2135 for (i = 0; i < priv->tx_ring_num[t]; i++) {2136 if (priv->tx_ring[t] && priv->tx_ring[t][i])2137 mlx4_en_destroy_tx_ring(priv,2138 &priv->tx_ring[t][i]);2139 if (priv->tx_cq[t] && priv->tx_cq[t][i])2140 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);2141 }2142 kfree(priv->tx_ring[t]);2143 kfree(priv->tx_cq[t]);2144 }2145 2146 for (i = 0; i < priv->rx_ring_num; i++) {2147 if (priv->rx_ring[i])2148 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],2149 priv->prof->rx_ring_size, priv->stride);2150 if (priv->rx_cq[i])2151 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);2152 }2153 2154}2155 2156static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)2157{2158 struct mlx4_en_port_profile *prof = priv->prof;2159 int i, t;2160 int node;2161 2162 /* Create tx Rings */2163 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {2164 for (i = 0; i < priv->tx_ring_num[t]; i++) {2165 node = cpu_to_node(i % num_online_cpus());2166 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i],2167 prof->tx_ring_size, i, t, node))2168 goto err;2169 2170 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i],2171 prof->tx_ring_size,2172 TXBB_SIZE, node, i))2173 goto err;2174 }2175 }2176 2177 /* Create rx Rings */2178 for (i = 0; i < priv->rx_ring_num; i++) {2179 node = cpu_to_node(i % num_online_cpus());2180 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],2181 prof->rx_ring_size, i, RX, node))2182 goto err;2183 2184 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],2185 prof->rx_ring_size, priv->stride,2186 node, i))2187 goto err;2188 2189 }2190 2191#ifdef CONFIG_RFS_ACCEL2192 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);2193#endif2194 2195 return 0;2196 2197err:2198 en_err(priv, "Failed to allocate NIC resources\n");2199 for (i = 0; i < priv->rx_ring_num; i++) {2200 if (priv->rx_ring[i])2201 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],2202 prof->rx_ring_size,2203 priv->stride);2204 if (priv->rx_cq[i])2205 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);2206 }2207 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {2208 for (i = 0; i < priv->tx_ring_num[t]; i++) {2209 if (priv->tx_ring[t][i])2210 mlx4_en_destroy_tx_ring(priv,2211 &priv->tx_ring[t][i]);2212 if (priv->tx_cq[t][i])2213 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);2214 }2215 }2216 return -ENOMEM;2217}2218 2219 2220static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,2221 struct mlx4_en_priv *src,2222 struct mlx4_en_port_profile *prof)2223{2224 int t;2225 2226 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,2227 sizeof(dst->hwtstamp_config));2228 dst->num_tx_rings_p_up = prof->num_tx_rings_p_up;2229 dst->rx_ring_num = prof->rx_ring_num;2230 dst->flags = prof->flags;2231 dst->mdev = src->mdev;2232 dst->port = src->port;2233 dst->dev = src->dev;2234 dst->prof = prof;2235 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +2236 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);2237 2238 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {2239 dst->tx_ring_num[t] = prof->tx_ring_num[t];2240 if (!dst->tx_ring_num[t])2241 continue;2242 2243 dst->tx_ring[t] = kcalloc(MAX_TX_RINGS,2244 sizeof(struct mlx4_en_tx_ring *),2245 GFP_KERNEL);2246 if (!dst->tx_ring[t])2247 goto err_free_tx;2248 2249 dst->tx_cq[t] = kcalloc(MAX_TX_RINGS,2250 sizeof(struct mlx4_en_cq *),2251 GFP_KERNEL);2252 if (!dst->tx_cq[t]) {2253 kfree(dst->tx_ring[t]);2254 goto err_free_tx;2255 }2256 }2257 2258 return 0;2259 2260err_free_tx:2261 while (t--) {2262 kfree(dst->tx_ring[t]);2263 kfree(dst->tx_cq[t]);2264 }2265 return -ENOMEM;2266}2267 2268static void mlx4_en_update_priv(struct mlx4_en_priv *dst,2269 struct mlx4_en_priv *src)2270{2271 int t;2272 memcpy(dst->rx_ring, src->rx_ring,2273 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);2274 memcpy(dst->rx_cq, src->rx_cq,2275 sizeof(struct mlx4_en_cq *) * src->rx_ring_num);2276 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,2277 sizeof(dst->hwtstamp_config));2278 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {2279 dst->tx_ring_num[t] = src->tx_ring_num[t];2280 dst->tx_ring[t] = src->tx_ring[t];2281 dst->tx_cq[t] = src->tx_cq[t];2282 }2283 dst->num_tx_rings_p_up = src->num_tx_rings_p_up;2284 dst->rx_ring_num = src->rx_ring_num;2285 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));2286}2287 2288int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,2289 struct mlx4_en_priv *tmp,2290 struct mlx4_en_port_profile *prof,2291 bool carry_xdp_prog)2292{2293 struct bpf_prog *xdp_prog;2294 int i, t, ret;2295 2296 ret = mlx4_en_copy_priv(tmp, priv, prof);2297 if (ret) {2298 en_warn(priv, "%s: mlx4_en_copy_priv() failed, return\n",2299 __func__);2300 return ret;2301 }2302 2303 if (mlx4_en_alloc_resources(tmp)) {2304 en_warn(priv,2305 "%s: Resource allocation failed, using previous configuration\n",2306 __func__);2307 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {2308 kfree(tmp->tx_ring[t]);2309 kfree(tmp->tx_cq[t]);2310 }2311 return -ENOMEM;2312 }2313 2314 /* All rx_rings has the same xdp_prog. Pick the first one. */2315 xdp_prog = rcu_dereference_protected(2316 priv->rx_ring[0]->xdp_prog,2317 lockdep_is_held(&priv->mdev->state_lock));2318 2319 if (xdp_prog && carry_xdp_prog) {2320 bpf_prog_add(xdp_prog, tmp->rx_ring_num);2321 for (i = 0; i < tmp->rx_ring_num; i++)2322 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog,2323 xdp_prog);2324 }2325 2326 return 0;2327}2328 2329void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,2330 struct mlx4_en_priv *tmp)2331{2332 mlx4_en_free_resources(priv);2333 mlx4_en_update_priv(priv, tmp);2334}2335 2336void mlx4_en_destroy_netdev(struct net_device *dev)2337{2338 struct mlx4_en_priv *priv = netdev_priv(dev);2339 struct mlx4_en_dev *mdev = priv->mdev;2340 2341 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);2342 2343 /* Unregister device - this will close the port if it was up */2344 if (priv->registered)2345 unregister_netdev(dev);2346 2347 if (priv->allocated)2348 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);2349 2350 cancel_delayed_work(&priv->stats_task);2351 cancel_delayed_work(&priv->service_task);2352 /* flush any pending task for this netdev */2353 flush_workqueue(mdev->workqueue);2354 2355 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)2356 mlx4_en_remove_timestamp(mdev);2357 2358 /* Detach the netdev so tasks would not attempt to access it */2359 mutex_lock(&mdev->state_lock);2360 mdev->pndev[priv->port] = NULL;2361 mdev->upper[priv->port] = NULL;2362 2363#ifdef CONFIG_RFS_ACCEL2364 mlx4_en_cleanup_filters(priv);2365#endif2366 2367 mlx4_en_free_resources(priv);2368 mutex_unlock(&mdev->state_lock);2369 2370 free_netdev(dev);2371}2372 2373static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu)2374{2375 struct mlx4_en_priv *priv = netdev_priv(dev);2376 2377 if (mtu > MLX4_EN_MAX_XDP_MTU) {2378 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n",2379 mtu, MLX4_EN_MAX_XDP_MTU);2380 return false;2381 }2382 2383 return true;2384}2385 2386static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)2387{2388 struct mlx4_en_priv *priv = netdev_priv(dev);2389 struct mlx4_en_dev *mdev = priv->mdev;2390 int err = 0;2391 2392 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",2393 dev->mtu, new_mtu);2394 2395 if (priv->tx_ring_num[TX_XDP] &&2396 !mlx4_en_check_xdp_mtu(dev, new_mtu))2397 return -EOPNOTSUPP;2398 2399 WRITE_ONCE(dev->mtu, new_mtu);2400 2401 if (netif_running(dev)) {2402 mutex_lock(&mdev->state_lock);2403 if (!mdev->device_up) {2404 /* NIC is probably restarting - let restart task reset2405 * the port */2406 en_dbg(DRV, priv, "Change MTU called with card down!?\n");2407 } else {2408 mlx4_en_stop_port(dev, 1);2409 err = mlx4_en_start_port(dev);2410 if (err) {2411 en_err(priv, "Failed restarting port:%d\n",2412 priv->port);2413 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING,2414 &priv->state))2415 queue_work(mdev->workqueue, &priv->restart_task);2416 }2417 }2418 mutex_unlock(&mdev->state_lock);2419 }2420 return 0;2421}2422 2423static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)2424{2425 struct mlx4_en_priv *priv = netdev_priv(dev);2426 struct mlx4_en_dev *mdev = priv->mdev;2427 struct hwtstamp_config config;2428 2429 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))2430 return -EFAULT;2431 2432 /* device doesn't support time stamping */2433 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))2434 return -EINVAL;2435 2436 /* TX HW timestamp */2437 switch (config.tx_type) {2438 case HWTSTAMP_TX_OFF:2439 case HWTSTAMP_TX_ON:2440 break;2441 default:2442 return -ERANGE;2443 }2444 2445 /* RX HW timestamp */2446 switch (config.rx_filter) {2447 case HWTSTAMP_FILTER_NONE:2448 break;2449 case HWTSTAMP_FILTER_ALL:2450 case HWTSTAMP_FILTER_SOME:2451 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:2452 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:2453 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:2454 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:2455 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:2456 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:2457 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:2458 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:2459 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:2460 case HWTSTAMP_FILTER_PTP_V2_EVENT:2461 case HWTSTAMP_FILTER_PTP_V2_SYNC:2462 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:2463 case HWTSTAMP_FILTER_NTP_ALL:2464 config.rx_filter = HWTSTAMP_FILTER_ALL;2465 break;2466 default:2467 return -ERANGE;2468 }2469 2470 if (mlx4_en_reset_config(dev, config, dev->features)) {2471 config.tx_type = HWTSTAMP_TX_OFF;2472 config.rx_filter = HWTSTAMP_FILTER_NONE;2473 }2474 2475 return copy_to_user(ifr->ifr_data, &config,2476 sizeof(config)) ? -EFAULT : 0;2477}2478 2479static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)2480{2481 struct mlx4_en_priv *priv = netdev_priv(dev);2482 2483 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,2484 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;2485}2486 2487static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)2488{2489 switch (cmd) {2490 case SIOCSHWTSTAMP:2491 return mlx4_en_hwtstamp_set(dev, ifr);2492 case SIOCGHWTSTAMP:2493 return mlx4_en_hwtstamp_get(dev, ifr);2494 default:2495 return -EOPNOTSUPP;2496 }2497}2498 2499static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,2500 netdev_features_t features)2501{2502 struct mlx4_en_priv *en_priv = netdev_priv(netdev);2503 struct mlx4_en_dev *mdev = en_priv->mdev;2504 2505 /* Since there is no support for separate RX C-TAG/S-TAG vlan accel2506 * enable/disable make sure S-TAG flag is always in same state as2507 * C-TAG.2508 */2509 if (features & NETIF_F_HW_VLAN_CTAG_RX &&2510 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))2511 features |= NETIF_F_HW_VLAN_STAG_RX;2512 else2513 features &= ~NETIF_F_HW_VLAN_STAG_RX;2514 2515 return features;2516}2517 2518static int mlx4_en_set_features(struct net_device *netdev,2519 netdev_features_t features)2520{2521 struct mlx4_en_priv *priv = netdev_priv(netdev);2522 bool reset = false;2523 int ret = 0;2524 2525 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {2526 en_info(priv, "Turn %s RX-FCS\n",2527 (features & NETIF_F_RXFCS) ? "ON" : "OFF");2528 reset = true;2529 }2530 2531 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {2532 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;2533 2534 en_info(priv, "Turn %s RX-ALL\n",2535 ignore_fcs_value ? "ON" : "OFF");2536 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,2537 priv->port, ignore_fcs_value);2538 if (ret)2539 return ret;2540 }2541 2542 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {2543 en_info(priv, "Turn %s RX vlan strip offload\n",2544 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");2545 reset = true;2546 }2547 2548 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))2549 en_info(priv, "Turn %s TX vlan strip offload\n",2550 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");2551 2552 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))2553 en_info(priv, "Turn %s TX S-VLAN strip offload\n",2554 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");2555 2556 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {2557 en_info(priv, "Turn %s loopback\n",2558 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");2559 mlx4_en_update_loopback_state(netdev, features);2560 }2561 2562 if (reset) {2563 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,2564 features);2565 if (ret)2566 return ret;2567 }2568 2569 return 0;2570}2571 2572static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)2573{2574 struct mlx4_en_priv *en_priv = netdev_priv(dev);2575 struct mlx4_en_dev *mdev = en_priv->mdev;2576 2577 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac);2578}2579 2580static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos,2581 __be16 vlan_proto)2582{2583 struct mlx4_en_priv *en_priv = netdev_priv(dev);2584 struct mlx4_en_dev *mdev = en_priv->mdev;2585 2586 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos,2587 vlan_proto);2588}2589 2590static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,2591 int max_tx_rate)2592{2593 struct mlx4_en_priv *en_priv = netdev_priv(dev);2594 struct mlx4_en_dev *mdev = en_priv->mdev;2595 2596 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,2597 max_tx_rate);2598}2599 2600static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)2601{2602 struct mlx4_en_priv *en_priv = netdev_priv(dev);2603 struct mlx4_en_dev *mdev = en_priv->mdev;2604 2605 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);2606}2607 2608static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)2609{2610 struct mlx4_en_priv *en_priv = netdev_priv(dev);2611 struct mlx4_en_dev *mdev = en_priv->mdev;2612 2613 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);2614}2615 2616static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)2617{2618 struct mlx4_en_priv *en_priv = netdev_priv(dev);2619 struct mlx4_en_dev *mdev = en_priv->mdev;2620 2621 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);2622}2623 2624static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,2625 struct ifla_vf_stats *vf_stats)2626{2627 struct mlx4_en_priv *en_priv = netdev_priv(dev);2628 struct mlx4_en_dev *mdev = en_priv->mdev;2629 2630 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);2631}2632 2633#define PORT_ID_BYTE_LEN 82634static int mlx4_en_get_phys_port_id(struct net_device *dev,2635 struct netdev_phys_item_id *ppid)2636{2637 struct mlx4_en_priv *priv = netdev_priv(dev);2638 struct mlx4_dev *mdev = priv->mdev->dev;2639 int i;2640 u64 phys_port_id = mdev->caps.phys_port_id[priv->port];2641 2642 if (!phys_port_id)2643 return -EOPNOTSUPP;2644 2645 ppid->id_len = sizeof(phys_port_id);2646 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {2647 ppid->id[i] = phys_port_id & 0xff;2648 phys_port_id >>= 8;2649 }2650 return 0;2651}2652 2653static int mlx4_udp_tunnel_sync(struct net_device *dev, unsigned int table)2654{2655 struct mlx4_en_priv *priv = netdev_priv(dev);2656 struct udp_tunnel_info ti;2657 int ret;2658 2659 udp_tunnel_nic_get_port(dev, table, 0, &ti);2660 priv->vxlan_port = ti.port;2661 2662 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);2663 if (ret)2664 return ret;2665 2666 return mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,2667 VXLAN_STEER_BY_OUTER_MAC,2668 !!priv->vxlan_port);2669}2670 2671static const struct udp_tunnel_nic_info mlx4_udp_tunnels = {2672 .sync_table = mlx4_udp_tunnel_sync,2673 .flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP |2674 UDP_TUNNEL_NIC_INFO_IPV4_ONLY,2675 .tables = {2676 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },2677 },2678};2679 2680static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,2681 struct net_device *dev,2682 netdev_features_t features)2683{2684 features = vlan_features_check(skb, features);2685 features = vxlan_features_check(skb, features);2686 2687 /* The ConnectX-3 doesn't support outer IPv6 checksums but it does2688 * support inner IPv6 checksums and segmentation so we need to2689 * strip that feature if this is an IPv6 encapsulated frame.2690 */2691 if (skb->encapsulation &&2692 (skb->ip_summed == CHECKSUM_PARTIAL)) {2693 struct mlx4_en_priv *priv = netdev_priv(dev);2694 2695 if (!priv->vxlan_port ||2696 (ip_hdr(skb)->version != 4) ||2697 (udp_hdr(skb)->dest != priv->vxlan_port))2698 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);2699 }2700 2701 return features;2702}2703 2704static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)2705{2706 struct mlx4_en_priv *priv = netdev_priv(dev);2707 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index];2708 struct mlx4_update_qp_params params;2709 int err;2710 2711 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))2712 return -EOPNOTSUPP;2713 2714 /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */2715 if (maxrate >> 12) {2716 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;2717 params.rate_val = maxrate / 1000;2718 } else if (maxrate) {2719 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;2720 params.rate_val = maxrate;2721 } else { /* zero serves to revoke the QP rate-limitation */2722 params.rate_unit = 0;2723 params.rate_val = 0;2724 }2725 2726 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,2727 ¶ms);2728 return err;2729}2730 2731static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)2732{2733 struct mlx4_en_priv *priv = netdev_priv(dev);2734 struct mlx4_en_dev *mdev = priv->mdev;2735 struct mlx4_en_port_profile new_prof;2736 struct bpf_prog *old_prog;2737 struct mlx4_en_priv *tmp;2738 int tx_changed = 0;2739 int xdp_ring_num;2740 int port_up = 0;2741 int err;2742 int i;2743 2744 xdp_ring_num = prog ? priv->rx_ring_num : 0;2745 2746 /* No need to reconfigure buffers when simply swapping the2747 * program for a new one.2748 */2749 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) {2750 if (prog)2751 bpf_prog_add(prog, priv->rx_ring_num - 1);2752 2753 mutex_lock(&mdev->state_lock);2754 for (i = 0; i < priv->rx_ring_num; i++) {2755 old_prog = rcu_dereference_protected(2756 priv->rx_ring[i]->xdp_prog,2757 lockdep_is_held(&mdev->state_lock));2758 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);2759 if (old_prog)2760 bpf_prog_put(old_prog);2761 }2762 mutex_unlock(&mdev->state_lock);2763 return 0;2764 }2765 2766 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu))2767 return -EOPNOTSUPP;2768 2769 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);2770 if (!tmp)2771 return -ENOMEM;2772 2773 if (prog)2774 bpf_prog_add(prog, priv->rx_ring_num - 1);2775 2776 mutex_lock(&mdev->state_lock);2777 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));2778 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num;2779 2780 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {2781 tx_changed = 1;2782 new_prof.tx_ring_num[TX] =2783 MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up);2784 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");2785 }2786 2787 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false);2788 if (err) {2789 if (prog)2790 bpf_prog_sub(prog, priv->rx_ring_num - 1);2791 goto unlock_out;2792 }2793 2794 if (priv->port_up) {2795 port_up = 1;2796 mlx4_en_stop_port(dev, 1);2797 }2798 2799 mlx4_en_safe_replace_resources(priv, tmp);2800 if (tx_changed)2801 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);2802 2803 for (i = 0; i < priv->rx_ring_num; i++) {2804 old_prog = rcu_dereference_protected(2805 priv->rx_ring[i]->xdp_prog,2806 lockdep_is_held(&mdev->state_lock));2807 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);2808 if (old_prog)2809 bpf_prog_put(old_prog);2810 }2811 2812 if (port_up) {2813 err = mlx4_en_start_port(dev);2814 if (err) {2815 en_err(priv, "Failed starting port %d for XDP change\n",2816 priv->port);2817 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state))2818 queue_work(mdev->workqueue, &priv->restart_task);2819 }2820 }2821 2822unlock_out:2823 mutex_unlock(&mdev->state_lock);2824 kfree(tmp);2825 return err;2826}2827 2828static int mlx4_xdp(struct net_device *dev, struct netdev_bpf *xdp)2829{2830 switch (xdp->command) {2831 case XDP_SETUP_PROG:2832 return mlx4_xdp_set(dev, xdp->prog);2833 default:2834 return -EINVAL;2835 }2836}2837 2838static const struct net_device_ops mlx4_netdev_ops = {2839 .ndo_open = mlx4_en_open,2840 .ndo_stop = mlx4_en_close,2841 .ndo_start_xmit = mlx4_en_xmit,2842 .ndo_select_queue = mlx4_en_select_queue,2843 .ndo_get_stats64 = mlx4_en_get_stats64,2844 .ndo_set_rx_mode = mlx4_en_set_rx_mode,2845 .ndo_set_mac_address = mlx4_en_set_mac,2846 .ndo_validate_addr = eth_validate_addr,2847 .ndo_change_mtu = mlx4_en_change_mtu,2848 .ndo_eth_ioctl = mlx4_en_ioctl,2849 .ndo_tx_timeout = mlx4_en_tx_timeout,2850 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,2851 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,2852 .ndo_set_features = mlx4_en_set_features,2853 .ndo_fix_features = mlx4_en_fix_features,2854 .ndo_setup_tc = __mlx4_en_setup_tc,2855#ifdef CONFIG_RFS_ACCEL2856 .ndo_rx_flow_steer = mlx4_en_filter_rfs,2857#endif2858 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,2859 .ndo_features_check = mlx4_en_features_check,2860 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,2861 .ndo_bpf = mlx4_xdp,2862};2863 2864static const struct net_device_ops mlx4_netdev_ops_master = {2865 .ndo_open = mlx4_en_open,2866 .ndo_stop = mlx4_en_close,2867 .ndo_start_xmit = mlx4_en_xmit,2868 .ndo_select_queue = mlx4_en_select_queue,2869 .ndo_get_stats64 = mlx4_en_get_stats64,2870 .ndo_set_rx_mode = mlx4_en_set_rx_mode,2871 .ndo_set_mac_address = mlx4_en_set_mac,2872 .ndo_validate_addr = eth_validate_addr,2873 .ndo_change_mtu = mlx4_en_change_mtu,2874 .ndo_tx_timeout = mlx4_en_tx_timeout,2875 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,2876 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,2877 .ndo_set_vf_mac = mlx4_en_set_vf_mac,2878 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,2879 .ndo_set_vf_rate = mlx4_en_set_vf_rate,2880 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,2881 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,2882 .ndo_get_vf_stats = mlx4_en_get_vf_stats,2883 .ndo_get_vf_config = mlx4_en_get_vf_config,2884 .ndo_set_features = mlx4_en_set_features,2885 .ndo_fix_features = mlx4_en_fix_features,2886 .ndo_setup_tc = __mlx4_en_setup_tc,2887#ifdef CONFIG_RFS_ACCEL2888 .ndo_rx_flow_steer = mlx4_en_filter_rfs,2889#endif2890 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,2891 .ndo_features_check = mlx4_en_features_check,2892 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,2893 .ndo_bpf = mlx4_xdp,2894};2895 2896static const struct xdp_metadata_ops mlx4_xdp_metadata_ops = {2897 .xmo_rx_timestamp = mlx4_en_xdp_rx_timestamp,2898 .xmo_rx_hash = mlx4_en_xdp_rx_hash,2899};2900 2901int mlx4_en_netdev_event(struct notifier_block *this,2902 unsigned long event, void *ptr)2903{2904 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);2905 u8 port = 0;2906 struct mlx4_en_dev *mdev;2907 struct mlx4_dev *dev;2908 int i, num_eth_ports = 0;2909 bool do_bond = true;2910 u8 v2p_port1 = 0;2911 u8 v2p_port2 = 0;2912 2913 if (!net_eq(dev_net(ndev), &init_net))2914 return NOTIFY_DONE;2915 2916 mdev = container_of(this, struct mlx4_en_dev, netdev_nb);2917 dev = mdev->dev;2918 2919 /* Go into this mode only when two network devices set on two ports2920 * of the same mlx4 device are slaves of the same bonding master2921 */2922 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {2923 ++num_eth_ports;2924 if (!port && (mdev->pndev[i] == ndev))2925 port = i;2926 mdev->upper[i] = mdev->pndev[i] ?2927 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;2928 /* condition not met: network device is a slave */2929 if (!mdev->upper[i])2930 do_bond = false;2931 if (num_eth_ports < 2)2932 continue;2933 /* condition not met: same master */2934 if (mdev->upper[i] != mdev->upper[i-1])2935 do_bond = false;2936 }2937 /* condition not met: 2 salves */2938 do_bond = (num_eth_ports == 2) ? do_bond : false;2939 2940 /* handle only events that come with enough info */2941 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)2942 return NOTIFY_DONE;2943 2944 if (do_bond) {2945 struct netdev_notifier_bonding_info *notifier_info = ptr;2946 struct netdev_bonding_info *bonding_info =2947 ¬ifier_info->bonding_info;2948 2949 /* required mode 1, 2 or 4 */2950 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&2951 (bonding_info->master.bond_mode != BOND_MODE_XOR) &&2952 (bonding_info->master.bond_mode != BOND_MODE_8023AD))2953 do_bond = false;2954 2955 /* require exactly 2 slaves */2956 if (bonding_info->master.num_slaves != 2)2957 do_bond = false;2958 2959 /* calc v2p */2960 if (do_bond) {2961 if (bonding_info->master.bond_mode ==2962 BOND_MODE_ACTIVEBACKUP) {2963 /* in active-backup mode virtual ports are2964 * mapped to the physical port of the active2965 * slave */2966 if (bonding_info->slave.state ==2967 BOND_STATE_BACKUP) {2968 if (port == 1) {2969 v2p_port1 = 2;2970 v2p_port2 = 2;2971 } else {2972 v2p_port1 = 1;2973 v2p_port2 = 1;2974 }2975 } else { /* BOND_STATE_ACTIVE */2976 if (port == 1) {2977 v2p_port1 = 1;2978 v2p_port2 = 1;2979 } else {2980 v2p_port1 = 2;2981 v2p_port2 = 2;2982 }2983 }2984 } else { /* Active-Active */2985 /* in active-active mode a virtual port is2986 * mapped to the native physical port if and only2987 * if the physical port is up */2988 __s8 link = bonding_info->slave.link;2989 2990 if (port == 1)2991 v2p_port2 = 2;2992 else2993 v2p_port1 = 1;2994 if ((link == BOND_LINK_UP) ||2995 (link == BOND_LINK_FAIL)) {2996 if (port == 1)2997 v2p_port1 = 1;2998 else2999 v2p_port2 = 2;3000 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */3001 if (port == 1)3002 v2p_port1 = 2;3003 else3004 v2p_port2 = 1;3005 }3006 }3007 }3008 }3009 3010 mlx4_queue_bond_work(dev, do_bond, v2p_port1, v2p_port2);3011 3012 return NOTIFY_DONE;3013}3014 3015void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,3016 struct mlx4_en_stats_bitmap *stats_bitmap,3017 u8 rx_ppp, u8 rx_pause,3018 u8 tx_ppp, u8 tx_pause)3019{3020 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;3021 3022 if (!mlx4_is_slave(dev) &&3023 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {3024 mutex_lock(&stats_bitmap->mutex);3025 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);3026 3027 if (rx_ppp)3028 bitmap_set(stats_bitmap->bitmap, last_i,3029 NUM_FLOW_PRIORITY_STATS_RX);3030 last_i += NUM_FLOW_PRIORITY_STATS_RX;3031 3032 if (rx_pause && !(rx_ppp))3033 bitmap_set(stats_bitmap->bitmap, last_i,3034 NUM_FLOW_STATS_RX);3035 last_i += NUM_FLOW_STATS_RX;3036 3037 if (tx_ppp)3038 bitmap_set(stats_bitmap->bitmap, last_i,3039 NUM_FLOW_PRIORITY_STATS_TX);3040 last_i += NUM_FLOW_PRIORITY_STATS_TX;3041 3042 if (tx_pause && !(tx_ppp))3043 bitmap_set(stats_bitmap->bitmap, last_i,3044 NUM_FLOW_STATS_TX);3045 last_i += NUM_FLOW_STATS_TX;3046 3047 mutex_unlock(&stats_bitmap->mutex);3048 }3049}3050 3051void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,3052 struct mlx4_en_stats_bitmap *stats_bitmap,3053 u8 rx_ppp, u8 rx_pause,3054 u8 tx_ppp, u8 tx_pause)3055{3056 int last_i = 0;3057 3058 mutex_init(&stats_bitmap->mutex);3059 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);3060 3061 if (mlx4_is_slave(dev)) {3062 bitmap_set(stats_bitmap->bitmap, last_i +3063 MLX4_FIND_NETDEV_STAT(rx_packets), 1);3064 bitmap_set(stats_bitmap->bitmap, last_i +3065 MLX4_FIND_NETDEV_STAT(tx_packets), 1);3066 bitmap_set(stats_bitmap->bitmap, last_i +3067 MLX4_FIND_NETDEV_STAT(rx_bytes), 1);3068 bitmap_set(stats_bitmap->bitmap, last_i +3069 MLX4_FIND_NETDEV_STAT(tx_bytes), 1);3070 bitmap_set(stats_bitmap->bitmap, last_i +3071 MLX4_FIND_NETDEV_STAT(rx_dropped), 1);3072 bitmap_set(stats_bitmap->bitmap, last_i +3073 MLX4_FIND_NETDEV_STAT(tx_dropped), 1);3074 } else {3075 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);3076 }3077 last_i += NUM_MAIN_STATS;3078 3079 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);3080 last_i += NUM_PORT_STATS;3081 3082 if (mlx4_is_master(dev))3083 bitmap_set(stats_bitmap->bitmap, last_i,3084 NUM_PF_STATS);3085 last_i += NUM_PF_STATS;3086 3087 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,3088 rx_ppp, rx_pause,3089 tx_ppp, tx_pause);3090 last_i += NUM_FLOW_STATS;3091 3092 if (!mlx4_is_slave(dev))3093 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);3094 last_i += NUM_PKT_STATS;3095 3096 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS);3097 last_i += NUM_XDP_STATS;3098 3099 if (!mlx4_is_slave(dev))3100 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PHY_STATS);3101 last_i += NUM_PHY_STATS;3102}3103 3104static void mlx4_get_queue_stats_rx(struct net_device *dev, int i,3105 struct netdev_queue_stats_rx *stats)3106{3107 struct mlx4_en_priv *priv = netdev_priv(dev);3108 const struct mlx4_en_rx_ring *ring;3109 3110 spin_lock_bh(&priv->stats_lock);3111 3112 if (!priv->port_up || mlx4_is_master(priv->mdev->dev))3113 goto out_unlock;3114 3115 ring = priv->rx_ring[i];3116 stats->packets = READ_ONCE(ring->packets);3117 stats->bytes = READ_ONCE(ring->bytes);3118 stats->alloc_fail = READ_ONCE(ring->alloc_fail);3119 3120out_unlock:3121 spin_unlock_bh(&priv->stats_lock);3122}3123 3124static void mlx4_get_queue_stats_tx(struct net_device *dev, int i,3125 struct netdev_queue_stats_tx *stats)3126{3127 struct mlx4_en_priv *priv = netdev_priv(dev);3128 const struct mlx4_en_tx_ring *ring;3129 3130 spin_lock_bh(&priv->stats_lock);3131 3132 if (!priv->port_up || mlx4_is_master(priv->mdev->dev))3133 goto out_unlock;3134 3135 ring = priv->tx_ring[TX][i];3136 stats->packets = READ_ONCE(ring->packets);3137 stats->bytes = READ_ONCE(ring->bytes);3138 3139out_unlock:3140 spin_unlock_bh(&priv->stats_lock);3141}3142 3143static void mlx4_get_base_stats(struct net_device *dev,3144 struct netdev_queue_stats_rx *rx,3145 struct netdev_queue_stats_tx *tx)3146{3147 struct mlx4_en_priv *priv = netdev_priv(dev);3148 3149 spin_lock_bh(&priv->stats_lock);3150 3151 if (!priv->port_up || mlx4_is_master(priv->mdev->dev))3152 goto out_unlock;3153 3154 if (priv->rx_ring_num) {3155 rx->packets = 0;3156 rx->bytes = 0;3157 rx->alloc_fail = 0;3158 }3159 3160 if (priv->tx_ring_num[TX]) {3161 tx->packets = 0;3162 tx->bytes = 0;3163 }3164 3165out_unlock:3166 spin_unlock_bh(&priv->stats_lock);3167}3168 3169static const struct netdev_stat_ops mlx4_stat_ops = {3170 .get_queue_stats_rx = mlx4_get_queue_stats_rx,3171 .get_queue_stats_tx = mlx4_get_queue_stats_tx,3172 .get_base_stats = mlx4_get_base_stats,3173};3174 3175int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,3176 struct mlx4_en_port_profile *prof)3177{3178 struct net_device *dev;3179 struct mlx4_en_priv *priv;3180 int i, t;3181 int err;3182 3183 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),3184 MAX_TX_RINGS, MAX_RX_RINGS);3185 if (dev == NULL)3186 return -ENOMEM;3187 3188 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]);3189 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);3190 3191 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);3192 dev->dev_port = port - 1;3193 3194 /*3195 * Initialize driver private data3196 */3197 3198 priv = netdev_priv(dev);3199 memset(priv, 0, sizeof(struct mlx4_en_priv));3200 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);3201 spin_lock_init(&priv->stats_lock);3202 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);3203 INIT_WORK(&priv->restart_task, mlx4_en_restart);3204 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate_work);3205 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);3206 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);3207#ifdef CONFIG_RFS_ACCEL3208 INIT_LIST_HEAD(&priv->filters);3209 spin_lock_init(&priv->filters_lock);3210#endif3211 3212 priv->dev = dev;3213 priv->mdev = mdev;3214 priv->ddev = &mdev->pdev->dev;3215 priv->prof = prof;3216 priv->port = port;3217 priv->port_up = false;3218 priv->flags = prof->flags;3219 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;3220 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |3221 MLX4_WQE_CTRL_SOLICITED);3222 priv->num_tx_rings_p_up = mdev->profile.max_num_tx_rings_p_up;3223 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;3224 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));3225 3226 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {3227 priv->tx_ring_num[t] = prof->tx_ring_num[t];3228 if (!priv->tx_ring_num[t])3229 continue;3230 3231 priv->tx_ring[t] = kcalloc(MAX_TX_RINGS,3232 sizeof(struct mlx4_en_tx_ring *),3233 GFP_KERNEL);3234 if (!priv->tx_ring[t]) {3235 err = -ENOMEM;3236 goto out;3237 }3238 priv->tx_cq[t] = kcalloc(MAX_TX_RINGS,3239 sizeof(struct mlx4_en_cq *),3240 GFP_KERNEL);3241 if (!priv->tx_cq[t]) {3242 err = -ENOMEM;3243 goto out;3244 }3245 }3246 priv->rx_ring_num = prof->rx_ring_num;3247 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;3248 priv->cqe_size = mdev->dev->caps.cqe_size;3249 priv->mac_index = -1;3250 priv->msg_enable = MLX4_EN_MSG_LEVEL;3251#ifdef CONFIG_MLX4_EN_DCB3252 if (!mlx4_is_slave(priv->mdev->dev)) {3253 u8 prio;3254 3255 for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {3256 priv->ets.prio_tc[prio] = prio;3257 priv->ets.tc_tsa[prio] = IEEE_8021QAZ_TSA_VENDOR;3258 }3259 3260 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |3261 DCB_CAP_DCBX_VER_IEEE;3262 priv->flags |= MLX4_EN_DCB_ENABLED;3263 priv->cee_config.pfc_state = false;3264 3265 for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++)3266 priv->cee_config.dcb_pfc[i] = pfc_disabled;3267 3268 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {3269 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;3270 } else {3271 en_info(priv, "enabling only PFC DCB ops\n");3272 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;3273 }3274 }3275#endif3276 3277 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)3278 INIT_HLIST_HEAD(&priv->mac_hash[i]);3279 3280 /* Query for default mac and max mtu */3281 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];3282 3283 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &3284 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)3285 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;3286 3287 /* Set default MAC */3288 dev->addr_len = ETH_ALEN;3289 mlx4_en_u64_to_mac(dev, mdev->dev->caps.def_mac[priv->port]);3290 if (!is_valid_ether_addr(dev->dev_addr)) {3291 en_err(priv, "Port: %d, invalid mac burned: %pM, quitting\n",3292 priv->port, dev->dev_addr);3293 err = -EINVAL;3294 goto out;3295 } else if (mlx4_is_slave(priv->mdev->dev) &&3296 (priv->mdev->dev->port_random_macs & 1 << priv->port)) {3297 /* Random MAC was assigned in mlx4_slave_cap3298 * in mlx4_core module3299 */3300 dev->addr_assign_type |= NET_ADDR_RANDOM;3301 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);3302 }3303 3304 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));3305 3306 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +3307 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);3308 err = mlx4_en_alloc_resources(priv);3309 if (err)3310 goto out;3311 3312 /* Initialize time stamping config */3313 priv->hwtstamp_config.flags = 0;3314 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;3315 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;3316 3317 /* Allocate page for receive rings */3318 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,3319 MLX4_EN_PAGE_SIZE);3320 if (err) {3321 en_err(priv, "Failed to allocate page for rx qps\n");3322 goto out;3323 }3324 priv->allocated = 1;3325 3326 /*3327 * Initialize netdev entry points3328 */3329 if (mlx4_is_master(priv->mdev->dev))3330 dev->netdev_ops = &mlx4_netdev_ops_master;3331 else3332 dev->netdev_ops = &mlx4_netdev_ops;3333 dev->xdp_metadata_ops = &mlx4_xdp_metadata_ops;3334 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;3335 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);3336 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);3337 3338 dev->stat_ops = &mlx4_stat_ops;3339 dev->ethtool_ops = &mlx4_en_ethtool_ops;3340 3341 /*3342 * Set driver features3343 */3344 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;3345 if (mdev->LSO_support)3346 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;3347 3348 if (mdev->dev->caps.tunnel_offload_mode ==3349 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {3350 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |3351 NETIF_F_GSO_UDP_TUNNEL_CSUM |3352 NETIF_F_GSO_PARTIAL;3353 dev->features |= NETIF_F_GSO_UDP_TUNNEL |3354 NETIF_F_GSO_UDP_TUNNEL_CSUM |3355 NETIF_F_GSO_PARTIAL;3356 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;3357 dev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |3358 NETIF_F_RXCSUM |3359 NETIF_F_TSO | NETIF_F_TSO6 |3360 NETIF_F_GSO_UDP_TUNNEL |3361 NETIF_F_GSO_UDP_TUNNEL_CSUM |3362 NETIF_F_GSO_PARTIAL;3363 3364 dev->udp_tunnel_nic_info = &mlx4_udp_tunnels;3365 }3366 3367 dev->vlan_features = dev->hw_features;3368 3369 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;3370 dev->features = dev->hw_features | NETIF_F_HIGHDMA |3371 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |3372 NETIF_F_HW_VLAN_CTAG_FILTER;3373 dev->hw_features |= NETIF_F_LOOPBACK |3374 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;3375 3376 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {3377 dev->features |= NETIF_F_HW_VLAN_STAG_RX |3378 NETIF_F_HW_VLAN_STAG_FILTER;3379 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;3380 }3381 3382 if (mlx4_is_slave(mdev->dev)) {3383 bool vlan_offload_disabled;3384 int phv;3385 3386 err = get_phv_bit(mdev->dev, port, &phv);3387 if (!err && phv) {3388 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;3389 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;3390 }3391 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port,3392 &vlan_offload_disabled);3393 if (!err && vlan_offload_disabled) {3394 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX |3395 NETIF_F_HW_VLAN_CTAG_RX |3396 NETIF_F_HW_VLAN_STAG_TX |3397 NETIF_F_HW_VLAN_STAG_RX);3398 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX |3399 NETIF_F_HW_VLAN_CTAG_RX |3400 NETIF_F_HW_VLAN_STAG_TX |3401 NETIF_F_HW_VLAN_STAG_RX);3402 }3403 } else {3404 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&3405 !(mdev->dev->caps.flags2 &3406 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))3407 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;3408 }3409 3410 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)3411 dev->hw_features |= NETIF_F_RXFCS;3412 3413 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)3414 dev->hw_features |= NETIF_F_RXALL;3415 3416 if (mdev->dev->caps.steering_mode ==3417 MLX4_STEERING_MODE_DEVICE_MANAGED &&3418 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)3419 dev->hw_features |= NETIF_F_NTUPLE;3420 3421 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)3422 dev->priv_flags |= IFF_UNICAST_FLT;3423 3424 /* Setting a default hash function value */3425 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {3426 priv->rss_hash_fn = ETH_RSS_HASH_TOP;3427 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {3428 priv->rss_hash_fn = ETH_RSS_HASH_XOR;3429 } else {3430 en_warn(priv,3431 "No RSS hash capabilities exposed, using Toeplitz\n");3432 priv->rss_hash_fn = ETH_RSS_HASH_TOP;3433 }3434 3435 dev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT;3436 3437 /* MTU range: 68 - hw-specific max */3438 dev->min_mtu = ETH_MIN_MTU;3439 dev->max_mtu = priv->max_mtu;3440 3441 /* supports LSOv2 packets. */3442 netif_set_tso_max_size(dev, GSO_MAX_SIZE);3443 3444 mdev->pndev[port] = dev;3445 mdev->upper[port] = NULL;3446 3447 netif_carrier_off(dev);3448 mlx4_en_set_default_moderation(priv);3449 3450 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]);3451 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);3452 3453 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);3454 3455 /* Configure port */3456 mlx4_en_calc_rx_buf(dev);3457 err = mlx4_SET_PORT_general(mdev->dev, priv->port,3458 priv->rx_skb_size + ETH_FCS_LEN,3459 prof->tx_pause, prof->tx_ppp,3460 prof->rx_pause, prof->rx_ppp);3461 if (err) {3462 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",3463 priv->port, err);3464 goto out;3465 }3466 3467 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {3468 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);3469 if (err) {3470 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",3471 err);3472 goto out;3473 }3474 }3475 3476 /* Init port */3477 en_warn(priv, "Initializing port\n");3478 err = mlx4_INIT_PORT(mdev->dev, priv->port);3479 if (err) {3480 en_err(priv, "Failed Initializing port\n");3481 goto out;3482 }3483 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);3484 3485 /* Initialize time stamp mechanism */3486 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)3487 mlx4_en_init_timestamp(mdev);3488 3489 queue_delayed_work(mdev->workqueue, &priv->service_task,3490 SERVICE_TASK_DELAY);3491 3492 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,3493 mdev->profile.prof[priv->port].rx_ppp,3494 mdev->profile.prof[priv->port].rx_pause,3495 mdev->profile.prof[priv->port].tx_ppp,3496 mdev->profile.prof[priv->port].tx_pause);3497 3498 SET_NETDEV_DEVLINK_PORT(dev,3499 mlx4_get_devlink_port(mdev->dev, priv->port));3500 err = register_netdev(dev);3501 if (err) {3502 en_err(priv, "Netdev registration failed for port %d\n", port);3503 goto out;3504 }3505 3506 priv->registered = 1;3507 3508 return 0;3509 3510out:3511 mlx4_en_destroy_netdev(dev);3512 return err;3513}3514 3515int mlx4_en_reset_config(struct net_device *dev,3516 struct hwtstamp_config ts_config,3517 netdev_features_t features)3518{3519 struct mlx4_en_priv *priv = netdev_priv(dev);3520 struct mlx4_en_dev *mdev = priv->mdev;3521 struct mlx4_en_port_profile new_prof;3522 struct mlx4_en_priv *tmp;3523 int port_up = 0;3524 int err = 0;3525 3526 if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&3527 priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&3528 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&3529 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))3530 return 0; /* Nothing to change */3531 3532 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&3533 (features & NETIF_F_HW_VLAN_CTAG_RX) &&3534 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {3535 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");3536 return -EINVAL;3537 }3538 3539 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);3540 if (!tmp)3541 return -ENOMEM;3542 3543 mutex_lock(&mdev->state_lock);3544 3545 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));3546 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));3547 3548 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);3549 if (err)3550 goto out;3551 3552 if (priv->port_up) {3553 port_up = 1;3554 mlx4_en_stop_port(dev, 1);3555 }3556 3557 mlx4_en_safe_replace_resources(priv, tmp);3558 3559 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {3560 if (features & NETIF_F_HW_VLAN_CTAG_RX)3561 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;3562 else3563 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;3564 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {3565 /* RX time-stamping is OFF, update the RX vlan offload3566 * to the latest wanted state3567 */3568 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)3569 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;3570 else3571 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;3572 }3573 3574 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {3575 if (features & NETIF_F_RXFCS)3576 dev->features |= NETIF_F_RXFCS;3577 else3578 dev->features &= ~NETIF_F_RXFCS;3579 }3580 3581 /* RX vlan offload and RX time-stamping can't co-exist !3582 * Regardless of the caller's choice,3583 * Turn Off RX vlan offload in case of time-stamping is ON3584 */3585 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {3586 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)3587 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");3588 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;3589 }3590 3591 if (port_up) {3592 err = mlx4_en_start_port(dev);3593 if (err)3594 en_err(priv, "Failed starting port\n");3595 }3596 3597 if (!err)3598 err = mlx4_en_moderation_update(priv);3599out:3600 mutex_unlock(&mdev->state_lock);3601 kfree(tmp);3602 if (!err)3603 netdev_features_change(dev);3604 return err;3605}3606