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1/* SPDX-License-Identifier: GPL-2.0 */2#ifndef _MLX4_STATS_3#define _MLX4_STATS_4 5#define NUM_PRIORITIES 96#define NUM_PRIORITY_STATS 27 8struct mlx4_en_pkt_stats {9 unsigned long rx_multicast_packets;10 unsigned long rx_broadcast_packets;11 unsigned long rx_jabbers;12 unsigned long rx_in_range_length_error;13 unsigned long rx_out_range_length_error;14 unsigned long tx_multicast_packets;15 unsigned long tx_broadcast_packets;16 unsigned long rx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS];17 unsigned long tx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS];18#define NUM_PKT_STATS 4319};20 21struct mlx4_en_counter_stats {22 unsigned long rx_packets;23 unsigned long rx_bytes;24 unsigned long tx_packets;25 unsigned long tx_bytes;26#define NUM_PF_STATS 427};28 29struct mlx4_en_port_stats {30 unsigned long tso_packets;31 unsigned long xmit_more;32 unsigned long queue_stopped;33 unsigned long wake_queue;34 unsigned long tx_timeout;35 unsigned long rx_alloc_pages;36 unsigned long rx_chksum_good;37 unsigned long rx_chksum_none;38 unsigned long rx_chksum_complete;39 unsigned long tx_chksum_offload;40#define NUM_PORT_STATS 1041};42 43struct mlx4_en_xdp_stats {44 unsigned long rx_xdp_drop;45 unsigned long rx_xdp_redirect;46 unsigned long rx_xdp_redirect_fail;47 unsigned long rx_xdp_tx;48 unsigned long rx_xdp_tx_full;49#define NUM_XDP_STATS 550};51 52struct mlx4_en_phy_stats {53 unsigned long rx_packets_phy;54 unsigned long rx_bytes_phy;55 unsigned long tx_packets_phy;56 unsigned long tx_bytes_phy;57#define NUM_PHY_STATS 458};59 60#define NUM_MAIN_STATS 2161 62#define MLX4_NUM_PRIORITIES 863 64struct mlx4_en_flow_stats_rx {65 u64 rx_pause;66 u64 rx_pause_duration;67 u64 rx_pause_transition;68#define NUM_FLOW_STATS_RX 369#define NUM_FLOW_PRIORITY_STATS_RX (NUM_FLOW_STATS_RX * \70 MLX4_NUM_PRIORITIES)71};72 73#define FLOW_PRIORITY_STATS_IDX_RX_FRAMES (NUM_MAIN_STATS + \74 NUM_PORT_STATS + \75 NUM_PF_STATS + \76 NUM_FLOW_PRIORITY_STATS_RX)77 78struct mlx4_en_flow_stats_tx {79 u64 tx_pause;80 u64 tx_pause_duration;81 u64 tx_pause_transition;82#define NUM_FLOW_STATS_TX 383#define NUM_FLOW_PRIORITY_STATS_TX (NUM_FLOW_STATS_TX * \84 MLX4_NUM_PRIORITIES)85};86 87#define FLOW_PRIORITY_STATS_IDX_TX_FRAMES (NUM_MAIN_STATS + \88 NUM_PORT_STATS + \89 NUM_PF_STATS + \90 NUM_FLOW_PRIORITY_STATS_RX + \91 NUM_FLOW_STATS_RX + \92 NUM_FLOW_PRIORITY_STATS_TX)93 94#define NUM_FLOW_STATS (NUM_FLOW_STATS_RX + NUM_FLOW_STATS_TX + \95 NUM_FLOW_PRIORITY_STATS_TX + \96 NUM_FLOW_PRIORITY_STATS_RX)97 98struct mlx4_en_stat_out_flow_control_mbox {99 /* Total number of PAUSE frames received from the far-end port */100 __be64 rx_pause;101 /* Total number of microseconds that far-end port requested to pause102 * transmission of packets103 */104 __be64 rx_pause_duration;105 /* Number of received transmission from XOFF state to XON state */106 __be64 rx_pause_transition;107 /* Total number of PAUSE frames sent from the far-end port */108 __be64 tx_pause;109 /* Total time in microseconds that transmission of packets has been110 * paused111 */112 __be64 tx_pause_duration;113 /* Number of transmitter transitions from XOFF state to XON state */114 __be64 tx_pause_transition;115 /* Reserved */116 __be64 reserved[2];117};118 119enum {120 MLX4_DUMP_ETH_STATS_FLOW_CONTROL = 1 << 12121};122 123#define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + \124 NUM_FLOW_STATS + NUM_PF_STATS + \125 NUM_XDP_STATS + NUM_PHY_STATS)126 127#define MLX4_FIND_NETDEV_STAT(n) (offsetof(struct net_device_stats, n) / \128 sizeof(((struct net_device_stats *)0)->n))129 130#endif131