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1// SPDX-License-Identifier: GPL-2.0-only2/* drivers/net/ethernet/micrel/ks8851.c3 *4 * Copyright 2009 Simtec Electronics5 * http://www.simtec.co.uk/6 * Ben Dooks <ben@simtec.co.uk>7 */8 9#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt10 11#include <linux/interrupt.h>12#include <linux/module.h>13#include <linux/kernel.h>14#include <linux/netdevice.h>15#include <linux/etherdevice.h>16#include <linux/ethtool.h>17#include <linux/iopoll.h>18#include <linux/mii.h>19 20#include <linux/platform_device.h>21#include <linux/of_net.h>22 23#include "ks8851.h"24 25static int msg_enable;26 27#define BE3 0x8000 /* Byte Enable 3 */28#define BE2 0x4000 /* Byte Enable 2 */29#define BE1 0x2000 /* Byte Enable 1 */30#define BE0 0x1000 /* Byte Enable 0 */31 32/**33 * struct ks8851_net_par - KS8851 Parallel driver private data34 * @ks8851: KS8851 driver common private data35 * @lock: Lock to ensure that the device is not accessed when busy.36 * @hw_addr : start address of data register.37 * @hw_addr_cmd : start address of command register.38 * @cmd_reg_cache : command register cached.39 *40 * The @lock ensures that the chip is protected when certain operations are41 * in progress. When the read or write packet transfer is in progress, most42 * of the chip registers are not accessible until the transfer is finished43 * and the DMA has been de-asserted.44 */45struct ks8851_net_par {46 struct ks8851_net ks8851;47 spinlock_t lock;48 void __iomem *hw_addr;49 void __iomem *hw_addr_cmd;50 u16 cmd_reg_cache;51};52 53#define to_ks8851_par(ks) container_of((ks), struct ks8851_net_par, ks8851)54 55/**56 * ks8851_lock_par - register access lock57 * @ks: The chip state58 * @flags: Spinlock flags59 *60 * Claim chip register access lock61 */62static void ks8851_lock_par(struct ks8851_net *ks, unsigned long *flags)63{64 struct ks8851_net_par *ksp = to_ks8851_par(ks);65 66 spin_lock_irqsave(&ksp->lock, *flags);67}68 69/**70 * ks8851_unlock_par - register access unlock71 * @ks: The chip state72 * @flags: Spinlock flags73 *74 * Release chip register access lock75 */76static void ks8851_unlock_par(struct ks8851_net *ks, unsigned long *flags)77{78 struct ks8851_net_par *ksp = to_ks8851_par(ks);79 80 spin_unlock_irqrestore(&ksp->lock, *flags);81}82 83/**84 * ks_check_endian - Check whether endianness of the bus is correct85 * @ks : The chip information86 *87 * The KS8851-16MLL EESK pin allows selecting the endianness of the 16bit88 * bus. To maintain optimum performance, the bus endianness should be set89 * such that it matches the endianness of the CPU.90 */91static int ks_check_endian(struct ks8851_net *ks)92{93 struct ks8851_net_par *ksp = to_ks8851_par(ks);94 u16 cider;95 96 /*97 * Read CIDER register first, however read it the "wrong" way around.98 * If the endian strap on the KS8851-16MLL in incorrect and the chip99 * is operating in different endianness than the CPU, then the meaning100 * of BE[3:0] byte-enable bits is also swapped such that:101 * BE[3,2,1,0] becomes BE[1,0,3,2]102 *103 * Luckily for us, the byte-enable bits are the top four MSbits of104 * the address register and the CIDER register is at offset 0xc0.105 * Hence, by reading address 0xc0c0, which is not impacted by endian106 * swapping, we assert either BE[3:2] or BE[1:0] while reading the107 * CIDER register.108 *109 * If the bus configuration is correct, reading 0xc0c0 asserts110 * BE[3:2] and this read returns 0x0000, because to read register111 * with bottom two LSbits of address set to 0, BE[1:0] must be112 * asserted.113 *114 * If the bus configuration is NOT correct, reading 0xc0c0 asserts115 * BE[1:0] and this read returns non-zero 0x8872 value.116 */117 iowrite16(BE3 | BE2 | KS_CIDER, ksp->hw_addr_cmd);118 cider = ioread16(ksp->hw_addr);119 if (!cider)120 return 0;121 122 netdev_err(ks->netdev, "incorrect EESK endian strap setting\n");123 124 return -EINVAL;125}126 127/**128 * ks8851_wrreg16_par - write 16bit register value to chip129 * @ks: The chip state130 * @reg: The register address131 * @val: The value to write132 *133 * Issue a write to put the value @val into the register specified in @reg.134 */135static void ks8851_wrreg16_par(struct ks8851_net *ks, unsigned int reg,136 unsigned int val)137{138 struct ks8851_net_par *ksp = to_ks8851_par(ks);139 140 ksp->cmd_reg_cache = (u16)reg | ((BE1 | BE0) << (reg & 0x02));141 iowrite16(ksp->cmd_reg_cache, ksp->hw_addr_cmd);142 iowrite16(val, ksp->hw_addr);143}144 145/**146 * ks8851_rdreg16_par - read 16 bit register from chip147 * @ks: The chip information148 * @reg: The register address149 *150 * Read a 16bit register from the chip, returning the result151 */152static unsigned int ks8851_rdreg16_par(struct ks8851_net *ks, unsigned int reg)153{154 struct ks8851_net_par *ksp = to_ks8851_par(ks);155 156 ksp->cmd_reg_cache = (u16)reg | ((BE1 | BE0) << (reg & 0x02));157 iowrite16(ksp->cmd_reg_cache, ksp->hw_addr_cmd);158 return ioread16(ksp->hw_addr);159}160 161/**162 * ks8851_rdfifo_par - read data from the receive fifo163 * @ks: The device state.164 * @buff: The buffer address165 * @len: The length of the data to read166 *167 * Issue an RXQ FIFO read command and read the @len amount of data from168 * the FIFO into the buffer specified by @buff.169 */170static void ks8851_rdfifo_par(struct ks8851_net *ks, u8 *buff, unsigned int len)171{172 struct ks8851_net_par *ksp = to_ks8851_par(ks);173 174 netif_dbg(ks, rx_status, ks->netdev,175 "%s: %d@%p\n", __func__, len, buff);176 177 ioread16_rep(ksp->hw_addr, (u16 *)buff + 1, len / 2);178}179 180/**181 * ks8851_wrfifo_par - write packet to TX FIFO182 * @ks: The device state.183 * @txp: The sk_buff to transmit.184 * @irq: IRQ on completion of the packet.185 *186 * Send the @txp to the chip. This means creating the relevant packet header187 * specifying the length of the packet and the other information the chip188 * needs, such as IRQ on completion. Send the header and the packet data to189 * the device.190 */191static void ks8851_wrfifo_par(struct ks8851_net *ks, struct sk_buff *txp,192 bool irq)193{194 struct ks8851_net_par *ksp = to_ks8851_par(ks);195 unsigned int len = ALIGN(txp->len, 4);196 unsigned int fid = 0;197 198 netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n",199 __func__, txp, txp->len, txp->data, irq);200 201 fid = ks->fid++;202 fid &= TXFR_TXFID_MASK;203 204 if (irq)205 fid |= TXFR_TXIC; /* irq on completion */206 207 iowrite16(fid, ksp->hw_addr);208 iowrite16(txp->len, ksp->hw_addr);209 210 iowrite16_rep(ksp->hw_addr, txp->data, len / 2);211}212 213static unsigned int ks8851_rdreg16_par_txqcr(struct ks8851_net *ks)214{215 return ks8851_rdreg16_par(ks, KS_TXQCR);216}217 218/**219 * ks8851_start_xmit_par - transmit packet220 * @skb: The buffer to transmit221 * @dev: The device used to transmit the packet.222 *223 * Called by the network layer to transmit the @skb. Queue the packet for224 * the device and schedule the necessary work to transmit the packet when225 * it is free.226 *227 * We do this to firstly avoid sleeping with the network device locked,228 * and secondly so we can round up more than one packet to transmit which229 * means we can try and avoid generating too many transmit done interrupts.230 */231static netdev_tx_t ks8851_start_xmit_par(struct sk_buff *skb,232 struct net_device *dev)233{234 struct ks8851_net *ks = netdev_priv(dev);235 netdev_tx_t ret = NETDEV_TX_OK;236 unsigned long flags;237 unsigned int txqcr;238 u16 txmir;239 int err;240 241 netif_dbg(ks, tx_queued, ks->netdev,242 "%s: skb %p, %d@%p\n", __func__, skb, skb->len, skb->data);243 244 ks8851_lock_par(ks, &flags);245 246 txmir = ks8851_rdreg16_par(ks, KS_TXMIR) & 0x1fff;247 248 if (likely(txmir >= skb->len + 12)) {249 ks8851_wrreg16_par(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA);250 ks8851_wrfifo_par(ks, skb, false);251 ks8851_wrreg16_par(ks, KS_RXQCR, ks->rc_rxqcr);252 ks8851_wrreg16_par(ks, KS_TXQCR, TXQCR_METFE);253 254 err = readx_poll_timeout_atomic(ks8851_rdreg16_par_txqcr, ks,255 txqcr, !(txqcr & TXQCR_METFE),256 5, 1000000);257 if (err)258 ret = NETDEV_TX_BUSY;259 260 ks8851_done_tx(ks, skb);261 } else {262 ret = NETDEV_TX_BUSY;263 }264 265 ks8851_unlock_par(ks, &flags);266 267 return ret;268}269 270static int ks8851_probe_par(struct platform_device *pdev)271{272 struct device *dev = &pdev->dev;273 struct ks8851_net_par *ksp;274 struct net_device *netdev;275 struct ks8851_net *ks;276 int ret;277 278 netdev = devm_alloc_etherdev(dev, sizeof(struct ks8851_net_par));279 if (!netdev)280 return -ENOMEM;281 282 ks = netdev_priv(netdev);283 284 ks->lock = ks8851_lock_par;285 ks->unlock = ks8851_unlock_par;286 ks->rdreg16 = ks8851_rdreg16_par;287 ks->wrreg16 = ks8851_wrreg16_par;288 ks->rdfifo = ks8851_rdfifo_par;289 ks->wrfifo = ks8851_wrfifo_par;290 ks->start_xmit = ks8851_start_xmit_par;291 292#define STD_IRQ (IRQ_LCI | /* Link Change */ \293 IRQ_RXI | /* RX done */ \294 IRQ_RXPSI) /* RX process stop */295 ks->rc_ier = STD_IRQ;296 297 ksp = to_ks8851_par(ks);298 spin_lock_init(&ksp->lock);299 300 ksp->hw_addr = devm_platform_ioremap_resource(pdev, 0);301 if (IS_ERR(ksp->hw_addr))302 return PTR_ERR(ksp->hw_addr);303 304 ksp->hw_addr_cmd = devm_platform_ioremap_resource(pdev, 1);305 if (IS_ERR(ksp->hw_addr_cmd))306 return PTR_ERR(ksp->hw_addr_cmd);307 308 ret = ks_check_endian(ks);309 if (ret)310 return ret;311 312 netdev->irq = platform_get_irq(pdev, 0);313 if (netdev->irq < 0)314 return netdev->irq;315 316 return ks8851_probe_common(netdev, dev, msg_enable);317}318 319static void ks8851_remove_par(struct platform_device *pdev)320{321 ks8851_remove_common(&pdev->dev);322}323 324static const struct of_device_id ks8851_match_table[] = {325 { .compatible = "micrel,ks8851-mll" },326 { }327};328MODULE_DEVICE_TABLE(of, ks8851_match_table);329 330static struct platform_driver ks8851_driver = {331 .driver = {332 .name = "ks8851",333 .of_match_table = ks8851_match_table,334 .pm = &ks8851_pm_ops,335 },336 .probe = ks8851_probe_par,337 .remove_new = ks8851_remove_par,338};339module_platform_driver(ks8851_driver);340 341MODULE_DESCRIPTION("KS8851 Network driver");342MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");343MODULE_LICENSE("GPL");344 345module_param_named(message, msg_enable, int, 0);346MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)");347