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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */2/* QLogic qed NIC Driver3 * Copyright (c) 2015-2017  QLogic Corporation4 * Copyright (c) 2019-2020 Marvell International Ltd.5 */6 7#ifndef _QED_DEV_API_H8#define _QED_DEV_API_H9 10#include <linux/types.h>11#include <linux/kernel.h>12#include <linux/slab.h>13#include <linux/qed/qed_chain.h>14#include <linux/qed/qed_if.h>15#include "qed_int.h"16 17/**18 * qed_init_dp(): Initialize the debug level.19 *20 * @cdev: Qed dev pointer.21 * @dp_module: Module debug parameter.22 * @dp_level: Module debug level.23 *24 * Return: Void.25 */26void qed_init_dp(struct qed_dev *cdev,27		 u32 dp_module,28		 u8 dp_level);29 30/**31 * qed_init_struct(): Initialize the device structure to32 *                    its defaults.33 *34 * @cdev: Qed dev pointer.35 *36 * Return: Void.37 */38void qed_init_struct(struct qed_dev *cdev);39 40/**41 * qed_resc_free: Free device resources.42 *43 * @cdev: Qed dev pointer.44 *45 * Return: Void.46 */47void qed_resc_free(struct qed_dev *cdev);48 49/**50 * qed_resc_alloc(): Alloc device resources.51 *52 * @cdev: Qed dev pointer.53 *54 * Return: Int.55 */56int qed_resc_alloc(struct qed_dev *cdev);57 58/**59 * qed_resc_setup(): Setup device resources.60 *61 * @cdev: Qed dev pointer.62 *63 * Return: Void.64 */65void qed_resc_setup(struct qed_dev *cdev);66 67enum qed_override_force_load {68	QED_OVERRIDE_FORCE_LOAD_NONE,69	QED_OVERRIDE_FORCE_LOAD_ALWAYS,70	QED_OVERRIDE_FORCE_LOAD_NEVER,71};72 73struct qed_drv_load_params {74	/* Indicates whether the driver is running over a crash kernel.75	 * As part of the load request, this will be used for providing the76	 * driver role to the MFW.77	 * In case of a crash kernel over PDA - this should be set to false.78	 */79	bool is_crash_kernel;80 81	/* The timeout value that the MFW should use when locking the engine for82	 * the driver load process.83	 * A value of '0' means the default value, and '255' means no timeout.84	 */85	u8 mfw_timeout_val;86#define QED_LOAD_REQ_LOCK_TO_DEFAULT    087#define QED_LOAD_REQ_LOCK_TO_NONE       25588 89	/* Avoid engine reset when first PF loads on it */90	bool avoid_eng_reset;91 92	/* Allow overriding the default force load behavior */93	enum qed_override_force_load override_force_load;94};95 96struct qed_hw_init_params {97	/* Tunneling parameters */98	struct qed_tunnel_info *p_tunn;99 100	bool b_hw_start;101 102	/* Interrupt mode [msix, inta, etc.] to use */103	enum qed_int_mode int_mode;104 105	/* NPAR tx switching to be used for vports for tx-switching */106	bool allow_npar_tx_switch;107 108	/* Binary fw data pointer in binary fw file */109	const u8 *bin_fw_data;110 111	/* Driver load parameters */112	struct qed_drv_load_params *p_drv_load_params;113};114 115/**116 * qed_hw_init(): Init Qed hardware.117 *118 * @cdev: Qed dev pointer.119 * @p_params: Pointers to params.120 *121 * Return: Int.122 */123int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params);124 125/**126 * qed_hw_timers_stop_all(): Stop the timers HW block.127 *128 * @cdev: Qed dev pointer.129 *130 * Return: void.131 */132void qed_hw_timers_stop_all(struct qed_dev *cdev);133 134/**135 * qed_hw_stop(): Stop Qed hardware.136 *137 * @cdev: Qed dev pointer.138 *139 * Return: int.140 */141int qed_hw_stop(struct qed_dev *cdev);142 143/**144 * qed_hw_stop_fastpath(): Should be called incase145 *		           slowpath is still required for the device,146 *		           but fastpath is not.147 *148 * @cdev: Qed dev pointer.149 *150 * Return: Int.151 */152int qed_hw_stop_fastpath(struct qed_dev *cdev);153 154/**155 * qed_hw_start_fastpath(): Restart fastpath traffic,156 *		            only if hw_stop_fastpath was called.157 *158 * @p_hwfn: HW device data.159 *160 * Return: Int.161 */162int qed_hw_start_fastpath(struct qed_hwfn *p_hwfn);163 164/**165 * qed_hw_prepare(): Prepare Qed hardware.166 *167 * @cdev: Qed dev pointer.168 * @personality: Personality to initialize.169 *170 * Return: Int.171 */172int qed_hw_prepare(struct qed_dev *cdev,173		   int personality);174 175/**176 * qed_hw_remove(): Remove Qed hardware.177 *178 * @cdev: Qed dev pointer.179 *180 * Return: Void.181 */182void qed_hw_remove(struct qed_dev *cdev);183 184/**185 * qed_ptt_acquire(): Allocate a PTT window.186 *187 * @p_hwfn: HW device data.188 *189 * Return: struct qed_ptt.190 *191 * Should be called at the entry point to the driver (at the beginning of an192 * exported function).193 */194struct qed_ptt *qed_ptt_acquire(struct qed_hwfn *p_hwfn);195 196/**197 * qed_ptt_acquire_context(): Allocate a PTT window honoring the context198 *			      atomicy.199 *200 * @p_hwfn: HW device data.201 * @is_atomic: Hint from the caller - if the func can sleep or not.202 *203 * Context: The function should not sleep in case is_atomic == true.204 * Return: struct qed_ptt.205 *206 * Should be called at the entry point to the driver207 * (at the beginning of an exported function).208 */209struct qed_ptt *qed_ptt_acquire_context(struct qed_hwfn *p_hwfn,210					bool is_atomic);211 212/**213 * qed_ptt_release(): Release PTT Window.214 *215 * @p_hwfn: HW device data.216 * @p_ptt: P_ptt.217 *218 * Return: Void.219 *220 * Should be called at the end of a flow - at the end of the function that221 * acquired the PTT.222 */223void qed_ptt_release(struct qed_hwfn *p_hwfn,224		     struct qed_ptt *p_ptt);225void qed_reset_vport_stats(struct qed_dev *cdev);226 227enum qed_dmae_address_type_t {228	QED_DMAE_ADDRESS_HOST_VIRT,229	QED_DMAE_ADDRESS_HOST_PHYS,230	QED_DMAE_ADDRESS_GRC231};232 233/**234 * qed_dmae_host2grc(): Copy data from source addr to235 *                      dmae registers using the given ptt.236 *237 * @p_hwfn: HW device data.238 * @p_ptt: P_ptt.239 * @source_addr: Source address.240 * @grc_addr: GRC address (dmae_data_offset).241 * @size_in_dwords: Size.242 * @p_params: (default parameters will be used in case of NULL).243 *244 * Return: Int.245 */246int247qed_dmae_host2grc(struct qed_hwfn *p_hwfn,248		  struct qed_ptt *p_ptt,249		  u64 source_addr,250		  u32 grc_addr,251		  u32 size_in_dwords,252		  struct qed_dmae_params *p_params);253 254 /**255 * qed_dmae_grc2host(): Read data from dmae data offset256 *                      to source address using the given ptt.257 *258 * @p_ptt: P_ptt.259 * @grc_addr: GRC address (dmae_data_offset).260 * @dest_addr: Destination Address.261 * @size_in_dwords: Size.262 * @p_params: (default parameters will be used in case of NULL).263 *264 * Return: Int.265 */266int qed_dmae_grc2host(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,267		      u32 grc_addr, dma_addr_t dest_addr, u32 size_in_dwords,268		      struct qed_dmae_params *p_params);269 270/**271 * qed_dmae_host2host(): Copy data from to source address272 *                       to a destination adrress (for SRIOV) using the given273 *                       ptt.274 *275 * @p_hwfn: HW device data.276 * @p_ptt: P_ptt.277 * @source_addr: Source address.278 * @dest_addr: Destination address.279 * @size_in_dwords: size.280 * @p_params: (default parameters will be used in case of NULL).281 *282 * Return: Int.283 */284int qed_dmae_host2host(struct qed_hwfn *p_hwfn,285		       struct qed_ptt *p_ptt,286		       dma_addr_t source_addr,287		       dma_addr_t dest_addr,288		       u32 size_in_dwords, struct qed_dmae_params *p_params);289 290int qed_chain_alloc(struct qed_dev *cdev, struct qed_chain *chain,291		    struct qed_chain_init_params *params);292void qed_chain_free(struct qed_dev *cdev, struct qed_chain *chain);293 294/**295 * qed_fw_l2_queue(): Get absolute L2 queue ID.296 *297 * @p_hwfn: HW device data.298 * @src_id: Relative to p_hwfn.299 * @dst_id: Absolute per engine.300 *301 * Return: Int.302 */303int qed_fw_l2_queue(struct qed_hwfn *p_hwfn,304		    u16 src_id,305		    u16 *dst_id);306 307/**308 * qed_fw_vport(): Get absolute vport ID.309 *310 * @p_hwfn: HW device data.311 * @src_id: Relative to p_hwfn.312 * @dst_id: Absolute per engine.313 *314 * Return: Int.315 */316int qed_fw_vport(struct qed_hwfn *p_hwfn,317		 u8 src_id,318		 u8 *dst_id);319 320/**321 * qed_fw_rss_eng(): Get absolute RSS engine ID.322 *323 * @p_hwfn: HW device data.324 * @src_id: Relative to p_hwfn.325 * @dst_id: Absolute per engine.326 *327 * Return: Int.328 */329int qed_fw_rss_eng(struct qed_hwfn *p_hwfn,330		   u8 src_id,331		   u8 *dst_id);332 333/**334 * qed_llh_get_num_ppfid(): Return the allocated number of LLH filter335 *	                    banks that are allocated to the PF.336 *337 * @cdev: Qed dev pointer.338 *339 * Return: u8 Number of LLH filter banks.340 */341u8 qed_llh_get_num_ppfid(struct qed_dev *cdev);342 343enum qed_eng {344	QED_ENG0,345	QED_ENG1,346	QED_BOTH_ENG,347};348 349/**350 * qed_llh_set_ppfid_affinity(): Set the engine affinity for the given351 *	                         LLH filter bank.352 *353 * @cdev: Qed dev pointer.354 * @ppfid: Relative within the allocated ppfids ('0' is the default one).355 * @eng: Engine.356 *357 * Return: Int.358 */359int qed_llh_set_ppfid_affinity(struct qed_dev *cdev,360			       u8 ppfid, enum qed_eng eng);361 362/**363 * qed_llh_set_roce_affinity(): Set the RoCE engine affinity.364 *365 * @cdev: Qed dev pointer.366 * @eng: Engine.367 *368 * Return: Int.369 */370int qed_llh_set_roce_affinity(struct qed_dev *cdev, enum qed_eng eng);371 372/**373 * qed_llh_add_mac_filter(): Add a LLH MAC filter into the given filter374 *	                     bank.375 *376 * @cdev: Qed dev pointer.377 * @ppfid: Relative within the allocated ppfids ('0' is the default one).378 * @mac_addr: MAC to add.379 *380 * Return: Int.381 */382int qed_llh_add_mac_filter(struct qed_dev *cdev,383			   u8 ppfid, const u8 mac_addr[ETH_ALEN]);384 385/**386 * qed_llh_remove_mac_filter(): Remove a LLH MAC filter from the given387 *	                        filter bank.388 *389 * @cdev: Qed dev pointer.390 * @ppfid: Ppfid.391 * @mac_addr: MAC to remove392 *393 * Return: Void.394 */395void qed_llh_remove_mac_filter(struct qed_dev *cdev,396			       u8 ppfid, u8 mac_addr[ETH_ALEN]);397 398enum qed_llh_prot_filter_type_t {399	QED_LLH_FILTER_ETHERTYPE,400	QED_LLH_FILTER_TCP_SRC_PORT,401	QED_LLH_FILTER_TCP_DEST_PORT,402	QED_LLH_FILTER_TCP_SRC_AND_DEST_PORT,403	QED_LLH_FILTER_UDP_SRC_PORT,404	QED_LLH_FILTER_UDP_DEST_PORT,405	QED_LLH_FILTER_UDP_SRC_AND_DEST_PORT406};407 408/**409 * qed_llh_add_protocol_filter(): Add a LLH protocol filter into the410 *	                          given filter bank.411 *412 * @cdev: Qed dev pointer.413 * @ppfid: Relative within the allocated ppfids ('0' is the default one).414 * @type: Type of filters and comparing.415 * @source_port_or_eth_type: Source port or ethertype to add.416 * @dest_port: Destination port to add.417 *418 * Return: Int.419 */420int421qed_llh_add_protocol_filter(struct qed_dev *cdev,422			    u8 ppfid,423			    enum qed_llh_prot_filter_type_t type,424			    u16 source_port_or_eth_type, u16 dest_port);425 426/**427 * qed_llh_remove_protocol_filter(): Remove a LLH protocol filter from428 *	                             the given filter bank.429 *430 * @cdev: Qed dev pointer.431 * @ppfid: Relative within the allocated ppfids ('0' is the default one).432 * @type: Type of filters and comparing.433 * @source_port_or_eth_type: Source port or ethertype to add.434 * @dest_port: Destination port to add.435 */436void437qed_llh_remove_protocol_filter(struct qed_dev *cdev,438			       u8 ppfid,439			       enum qed_llh_prot_filter_type_t type,440			       u16 source_port_or_eth_type, u16 dest_port);441 442/**443 * qed_final_cleanup(): Cleanup of previous driver remains prior to load.444 *445 * @p_hwfn: HW device data.446 * @p_ptt: P_ptt.447 * @id: For PF, engine-relative. For VF, PF-relative.448 * @is_vf: True iff cleanup is made for a VF.449 *450 * Return: Int.451 */452int qed_final_cleanup(struct qed_hwfn *p_hwfn,453		      struct qed_ptt *p_ptt, u16 id, bool is_vf);454 455/**456 * qed_get_queue_coalesce(): Retrieve coalesce value for a given queue.457 *458 * @p_hwfn: HW device data.459 * @coal: Store coalesce value read from the hardware.460 * @handle: P_handle.461 *462 * Return: Int.463 **/464int qed_get_queue_coalesce(struct qed_hwfn *p_hwfn, u16 *coal, void *handle);465 466/**467 * qed_set_queue_coalesce(): Configure coalesce parameters for Rx and468 *    Tx queue. The fact that we can configure coalescing to up to 511, but on469 *    varying accuracy [the bigger the value the less accurate] up to a mistake470 *    of 3usec for the highest values.471 *    While the API allows setting coalescing per-qid, all queues sharing a SB472 *    should be in same range [i.e., either 0-0x7f, 0x80-0xff or 0x100-0x1ff]473 *    otherwise configuration would break.474 *475 * @rx_coal: Rx Coalesce value in micro seconds.476 * @tx_coal: TX Coalesce value in micro seconds.477 * @p_handle: P_handle.478 *479 * Return: Int.480 **/481int482qed_set_queue_coalesce(u16 rx_coal, u16 tx_coal, void *p_handle);483 484/**485 * qed_pglueb_set_pfid_enable(): Enable or disable PCI BUS MASTER.486 *487 * @p_hwfn: HW device data.488 * @p_ptt: P_ptt.489 * @b_enable: True/False.490 *491 * Return: Int.492 */493int qed_pglueb_set_pfid_enable(struct qed_hwfn *p_hwfn,494			       struct qed_ptt *p_ptt, bool b_enable);495 496/**497 * qed_db_recovery_add(): add doorbell information to the doorbell498 *                    recovery mechanism.499 *500 * @cdev: Qed dev pointer.501 * @db_addr: Doorbell address.502 * @db_data: Address of where db_data is stored.503 * @db_width: Doorbell is 32b pr 64b.504 * @db_space: Doorbell recovery addresses are user or kernel space.505 *506 * Return: Int.507 */508int qed_db_recovery_add(struct qed_dev *cdev,509			void __iomem *db_addr,510			void *db_data,511			enum qed_db_rec_width db_width,512			enum qed_db_rec_space db_space);513 514/**515 * qed_db_recovery_del() - remove doorbell information from the doorbell516 * recovery mechanism. db_data serves as key (db_addr is not unique).517 *518 * @cdev: Qed dev pointer.519 * @db_addr: doorbell address.520 * @db_data: address where db_data is stored. Serves as key for the521 *                  entry to delete.522 *523 * Return: Int.524 */525int qed_db_recovery_del(struct qed_dev *cdev,526			void __iomem *db_addr, void *db_data);527 528const char *qed_hw_get_resc_name(enum qed_resources res_id);529#endif530