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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */2/* QLogic qed NIC Driver3 * Copyright (c) 2015-2017 QLogic Corporation4 * Copyright (c) 2019-2020 Marvell International Ltd.5 */6 7#ifndef _QED_HW_H8#define _QED_HW_H9 10#include <linux/types.h>11#include <linux/bitops.h>12#include <linux/slab.h>13#include <linux/string.h>14#include "qed.h"15#include "qed_dev_api.h"16 17/* Forward decleration */18struct qed_ptt;19 20enum reserved_ptts {21 RESERVED_PTT_EDIAG,22 RESERVED_PTT_USER_SPACE,23 RESERVED_PTT_MAIN,24 RESERVED_PTT_DPC,25 RESERVED_PTT_MAX26};27 28enum _dmae_cmd_dst_mask {29 DMAE_CMD_DST_MASK_NONE = 0,30 DMAE_CMD_DST_MASK_PCIE = 1,31 DMAE_CMD_DST_MASK_GRC = 232};33 34enum _dmae_cmd_src_mask {35 DMAE_CMD_SRC_MASK_PCIE = 0,36 DMAE_CMD_SRC_MASK_GRC = 137};38 39enum _dmae_cmd_crc_mask {40 DMAE_CMD_COMP_CRC_EN_MASK_NONE = 0,41 DMAE_CMD_COMP_CRC_EN_MASK_SET = 142};43 44/* definitions for DMA constants */45#define DMAE_GO_VALUE 0x146 47#define DMAE_COMPLETION_VAL 0xD1AE48#define DMAE_CMD_ENDIANITY 0x249 50#define DMAE_CMD_SIZE 1451#define DMAE_CMD_SIZE_TO_FILL (DMAE_CMD_SIZE - 5)52#define DMAE_MIN_WAIT_TIME 0x253#define DMAE_MAX_CLIENTS 3254 55/**56 * qed_gtt_init(): Initialize GTT windows.57 *58 * @p_hwfn: HW device data.59 *60 * Return: Void.61 */62void qed_gtt_init(struct qed_hwfn *p_hwfn);63 64/**65 * qed_ptt_invalidate(): Forces all ptt entries to be re-configured66 *67 * @p_hwfn: HW device data.68 *69 * Return: Void.70 */71void qed_ptt_invalidate(struct qed_hwfn *p_hwfn);72 73/**74 * qed_ptt_pool_alloc(): Allocate and initialize PTT pool.75 *76 * @p_hwfn: HW device data.77 *78 * Return: struct _qed_status - success (0), negative - error.79 */80int qed_ptt_pool_alloc(struct qed_hwfn *p_hwfn);81 82/**83 * qed_ptt_pool_free(): Free PTT pool.84 *85 * @p_hwfn: HW device data.86 *87 * Return: Void.88 */89void qed_ptt_pool_free(struct qed_hwfn *p_hwfn);90 91/**92 * qed_ptt_get_hw_addr(): Get PTT's GRC/HW address.93 *94 * @p_hwfn: HW device data.95 * @p_ptt: P_ptt96 *97 * Return: u32.98 */99u32 qed_ptt_get_hw_addr(struct qed_hwfn *p_hwfn,100 struct qed_ptt *p_ptt);101 102/**103 * qed_ptt_get_bar_addr(): Get PPT's external BAR address.104 *105 * @p_ptt: P_ptt106 *107 * Return: u32.108 */109u32 qed_ptt_get_bar_addr(struct qed_ptt *p_ptt);110 111/**112 * qed_ptt_set_win(): Set PTT Window's GRC BAR address113 *114 * @p_hwfn: HW device data.115 * @new_hw_addr: New HW address.116 * @p_ptt: P_Ptt117 *118 * Return: Void.119 */120void qed_ptt_set_win(struct qed_hwfn *p_hwfn,121 struct qed_ptt *p_ptt,122 u32 new_hw_addr);123 124/**125 * qed_get_reserved_ptt(): Get a specific reserved PTT.126 *127 * @p_hwfn: HW device data.128 * @ptt_idx: Ptt Index.129 *130 * Return: struct qed_ptt *.131 */132struct qed_ptt *qed_get_reserved_ptt(struct qed_hwfn *p_hwfn,133 enum reserved_ptts ptt_idx);134 135/**136 * qed_wr(): Write value to BAR using the given ptt.137 *138 * @p_hwfn: HW device data.139 * @p_ptt: P_ptt.140 * @val: Val.141 * @hw_addr: HW address142 *143 * Return: Void.144 */145void qed_wr(struct qed_hwfn *p_hwfn,146 struct qed_ptt *p_ptt,147 u32 hw_addr,148 u32 val);149 150/**151 * qed_rd(): Read value from BAR using the given ptt.152 *153 * @p_hwfn: HW device data.154 * @p_ptt: P_ptt.155 * @hw_addr: HW address156 *157 * Return: Void.158 */159u32 qed_rd(struct qed_hwfn *p_hwfn,160 struct qed_ptt *p_ptt,161 u32 hw_addr);162 163/**164 * qed_memcpy_from(): Copy n bytes from BAR using the given ptt.165 *166 * @p_hwfn: HW device data.167 * @p_ptt: P_ptt.168 * @dest: Destination.169 * @hw_addr: HW address.170 * @n: N171 *172 * Return: Void.173 */174void qed_memcpy_from(struct qed_hwfn *p_hwfn,175 struct qed_ptt *p_ptt,176 void *dest,177 u32 hw_addr,178 size_t n);179 180/**181 * qed_memcpy_to(): Copy n bytes to BAR using the given ptt182 *183 * @p_hwfn: HW device data.184 * @p_ptt: P_ptt.185 * @hw_addr: HW address.186 * @src: Source.187 * @n: N188 *189 * Return: Void.190 */191void qed_memcpy_to(struct qed_hwfn *p_hwfn,192 struct qed_ptt *p_ptt,193 u32 hw_addr,194 void *src,195 size_t n);196/**197 * qed_fid_pretend(): pretend to another function when198 * accessing the ptt window. There is no way to unpretend199 * a function. The only way to cancel a pretend is to200 * pretend back to the original function.201 *202 * @p_hwfn: HW device data.203 * @p_ptt: P_ptt.204 * @fid: fid field of pxp_pretend structure. Can contain205 * either pf / vf, port/path fields are don't care.206 *207 * Return: Void.208 */209void qed_fid_pretend(struct qed_hwfn *p_hwfn,210 struct qed_ptt *p_ptt,211 u16 fid);212 213/**214 * qed_port_pretend(): Pretend to another port when accessing the ptt window215 *216 * @p_hwfn: HW device data.217 * @p_ptt: P_ptt.218 * @port_id: The port to pretend to219 *220 * Return: Void.221 */222void qed_port_pretend(struct qed_hwfn *p_hwfn,223 struct qed_ptt *p_ptt,224 u8 port_id);225 226/**227 * qed_port_unpretend(): Cancel any previously set port pretend228 *229 * @p_hwfn: HW device data.230 * @p_ptt: P_ptt.231 *232 * Return: Void.233 */234void qed_port_unpretend(struct qed_hwfn *p_hwfn,235 struct qed_ptt *p_ptt);236 237/**238 * qed_port_fid_pretend(): Pretend to another port and another function239 * when accessing the ptt window240 *241 * @p_hwfn: HW device data.242 * @p_ptt: P_ptt.243 * @port_id: The port to pretend to244 * @fid: fid field of pxp_pretend structure. Can contain either pf / vf.245 *246 * Return: Void.247 */248void qed_port_fid_pretend(struct qed_hwfn *p_hwfn,249 struct qed_ptt *p_ptt, u8 port_id, u16 fid);250 251/**252 * qed_vfid_to_concrete(): Build a concrete FID for a given VF ID253 *254 * @p_hwfn: HW device data.255 * @vfid: VFID.256 *257 * Return: Void.258 */259u32 qed_vfid_to_concrete(struct qed_hwfn *p_hwfn, u8 vfid);260 261/**262 * qed_dmae_idx_to_go_cmd(): Map the idx to dmae cmd263 * this is declared here since other files will require it.264 *265 * @idx: Index266 *267 * Return: Void.268 */269u32 qed_dmae_idx_to_go_cmd(u8 idx);270 271/**272 * qed_dmae_info_alloc(): Init the dmae_info structure273 * which is part of p_hwfn.274 *275 * @p_hwfn: HW device data.276 *277 * Return: Int.278 */279int qed_dmae_info_alloc(struct qed_hwfn *p_hwfn);280 281/**282 * qed_dmae_info_free(): Free the dmae_info structure283 * which is part of p_hwfn.284 *285 * @p_hwfn: HW device data.286 *287 * Return: Void.288 */289void qed_dmae_info_free(struct qed_hwfn *p_hwfn);290 291union qed_qm_pq_params {292 struct {293 u8 q_idx;294 } iscsi;295 296 struct {297 u8 tc;298 } core;299 300 struct {301 u8 is_vf;302 u8 vf_id;303 u8 tc;304 } eth;305 306 struct {307 u8 dcqcn;308 u8 qpid; /* roce relative */309 } roce;310};311 312int qed_init_fw_data(struct qed_dev *cdev,313 const u8 *fw_data);314 315int qed_dmae_sanity(struct qed_hwfn *p_hwfn,316 struct qed_ptt *p_ptt, const char *phase);317 318#define QED_HW_ERR_MAX_STR_SIZE 256319 320/**321 * qed_hw_err_notify(): Notify upper layer driver and management FW322 * about a HW error.323 *324 * @p_hwfn: HW device data.325 * @p_ptt: P_ptt.326 * @err_type: Err Type.327 * @fmt: Debug data buffer to send to the MFW328 * @...: buffer format args329 *330 * Return void.331 */332void __printf(4, 5) __cold qed_hw_err_notify(struct qed_hwfn *p_hwfn,333 struct qed_ptt *p_ptt,334 enum qed_hw_err_type err_type,335 const char *fmt, ...);336#endif337