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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */2/* QLogic qed NIC Driver3 * Copyright (c) 2015-2017 QLogic Corporation4 * Copyright (c) 2019-2020 Marvell International Ltd.5 */6 7#ifndef _QED_INIT_OPS_H8#define _QED_INIT_OPS_H9 10#include <linux/types.h>11#include <linux/slab.h>12#include "qed.h"13 14/**15 * qed_init_iro_array(): init iro_arr.16 *17 * @cdev: Qed dev pointer.18 *19 * Return: Void.20 */21void qed_init_iro_array(struct qed_dev *cdev);22 23/**24 * qed_init_run(): Run the init-sequence.25 *26 * @p_hwfn: HW device data.27 * @p_ptt: P_ptt.28 * @phase: Phase.29 * @phase_id: Phase ID.30 * @modes: Mode.31 *32 * Return: _qed_status_t33 */34int qed_init_run(struct qed_hwfn *p_hwfn,35 struct qed_ptt *p_ptt,36 int phase,37 int phase_id,38 int modes);39 40/**41 * qed_init_alloc(): Allocate RT array, Store 'values' ptrs.42 *43 * @p_hwfn: HW device data.44 *45 * Return: _qed_status_t.46 */47int qed_init_alloc(struct qed_hwfn *p_hwfn);48 49/**50 * qed_init_free(): Init HW function deallocate.51 *52 * @p_hwfn: HW device data.53 *54 * Return: Void.55 */56void qed_init_free(struct qed_hwfn *p_hwfn);57 58/**59 * qed_init_store_rt_reg(): Store a configuration value in the RT array.60 *61 * @p_hwfn: HW device data.62 * @rt_offset: RT offset.63 * @val: Val.64 *65 * Return: Void.66 */67void qed_init_store_rt_reg(struct qed_hwfn *p_hwfn,68 u32 rt_offset,69 u32 val);70 71#define STORE_RT_REG(hwfn, offset, val) \72 qed_init_store_rt_reg(hwfn, offset, val)73 74#define OVERWRITE_RT_REG(hwfn, offset, val) \75 qed_init_store_rt_reg(hwfn, offset, val)76 77void qed_init_store_rt_agg(struct qed_hwfn *p_hwfn,78 u32 rt_offset,79 u32 *val,80 size_t size);81 82#define STORE_RT_REG_AGG(hwfn, offset, val) \83 qed_init_store_rt_agg(hwfn, offset, (u32 *)&(val), sizeof(val))84 85/**86 * qed_gtt_init(): Initialize GTT global windows and set admin window87 * related params of GTT/PTT to default values.88 *89 * @p_hwfn: HW device data.90 *91 * Return Void.92 */93void qed_gtt_init(struct qed_hwfn *p_hwfn);94#endif95