124 lines · c
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */2// Copyright (c) 2017 Synopsys, Inc. and/or its affiliates.3// stmmac Support for 5.xx Ethernet QoS cores4 5#ifndef __DWMAC5_H__6#define __DWMAC5_H__7 8#define MAC_DPP_FSM_INT_STATUS 0x000001409#define MAC_AXI_SLV_DPE_ADDR_STATUS 0x0000014410#define MAC_FSM_CONTROL 0x0000014811#define PRTYEN BIT(1)12#define TMOUTEN BIT(0)13 14#define MAC_FPE_CTRL_STS 0x0000023415#define TRSP BIT(19)16#define TVER BIT(18)17#define RRSP BIT(17)18#define RVER BIT(16)19#define SRSP BIT(2)20#define SVER BIT(1)21#define EFPE BIT(0)22 23#define MAC_PPS_CONTROL 0x00000b7024#define PPS_MAXIDX(x) ((((x) + 1) * 8) - 1)25#define PPS_MINIDX(x) ((x) * 8)26#define PPSx_MASK(x) GENMASK(PPS_MAXIDX(x), PPS_MINIDX(x))27#define MCGRENx(x) BIT(PPS_MAXIDX(x))28#define TRGTMODSELx(x, val) \29 GENMASK(PPS_MAXIDX(x) - 1, PPS_MAXIDX(x) - 2) & \30 ((val) << (PPS_MAXIDX(x) - 2))31#define PPSCMDx(x, val) \32 GENMASK(PPS_MINIDX(x) + 3, PPS_MINIDX(x)) & \33 ((val) << PPS_MINIDX(x))34#define PPSEN0 BIT(4)35#define MAC_PPSx_TARGET_TIME_SEC(x) (0x00000b80 + ((x) * 0x10))36#define MAC_PPSx_TARGET_TIME_NSEC(x) (0x00000b84 + ((x) * 0x10))37#define TRGTBUSY0 BIT(31)38#define TTSL0 GENMASK(30, 0)39#define MAC_PPSx_INTERVAL(x) (0x00000b88 + ((x) * 0x10))40#define MAC_PPSx_WIDTH(x) (0x00000b8c + ((x) * 0x10))41 42#define MTL_FPE_CTRL_STS 0x00000c9043/* Preemption Classification */44#define DWMAC5_PREEMPTION_CLASS GENMASK(15, 8)45/* Additional Fragment Size of preempted frames */46#define DWMAC5_ADD_FRAG_SZ GENMASK(1, 0)47 48#define MTL_RXP_CONTROL_STATUS 0x00000ca049#define RXPI BIT(31)50#define NPE GENMASK(23, 16)51#define NVE GENMASK(7, 0)52#define MTL_RXP_IACC_CTRL_STATUS 0x00000cb053#define STARTBUSY BIT(31)54#define RXPEIEC GENMASK(22, 21)55#define RXPEIEE BIT(20)56#define WRRDN BIT(16)57#define ADDR GENMASK(15, 0)58#define MTL_RXP_IACC_DATA 0x00000cb459#define MTL_ECC_CONTROL 0x00000cc060#define MEEAO BIT(8)61#define TSOEE BIT(4)62#define MRXPEE BIT(3)63#define MESTEE BIT(2)64#define MRXEE BIT(1)65#define MTXEE BIT(0)66 67#define MTL_SAFETY_INT_STATUS 0x00000cc468#define MCSIS BIT(31)69#define MEUIS BIT(1)70#define MECIS BIT(0)71#define MTL_ECC_INT_ENABLE 0x00000cc872#define RPCEIE BIT(12)73#define ECEIE BIT(8)74#define RXCEIE BIT(4)75#define TXCEIE BIT(0)76#define MTL_ECC_INT_STATUS 0x00000ccc77#define MTL_DPP_CONTROL 0x00000ce078#define EPSI BIT(2)79#define OPE BIT(1)80#define EDPP BIT(0)81 82#define DMA_SAFETY_INT_STATUS 0x0000108083#define MSUIS BIT(29)84#define MSCIS BIT(28)85#define DEUIS BIT(1)86#define DECIS BIT(0)87#define DMA_ECC_INT_ENABLE 0x0000108488#define TCEIE BIT(0)89#define DMA_ECC_INT_STATUS 0x0000108890 91/* EQoS version 5.xx VLAN Tag Filter Fail Packets Queuing */92#define GMAC_RXQ_CTRL4 0x0000009493#define GMAC_RXQCTRL_VFFQ_MASK GENMASK(19, 17)94#define GMAC_RXQCTRL_VFFQ_SHIFT 1795#define GMAC_RXQCTRL_VFFQE BIT(16)96 97#define GMAC_INT_FPE_EN BIT(17)98 99int dwmac5_safety_feat_config(void __iomem *ioaddr, unsigned int asp,100 struct stmmac_safety_feature_cfg *safety_cfg);101int dwmac5_safety_feat_irq_status(struct net_device *ndev,102 void __iomem *ioaddr, unsigned int asp,103 struct stmmac_safety_stats *stats);104int dwmac5_safety_feat_dump(struct stmmac_safety_stats *stats,105 int index, unsigned long *count, const char **desc);106int dwmac5_rxp_config(void __iomem *ioaddr, struct stmmac_tc_entry *entries,107 unsigned int count);108int dwmac5_flex_pps_config(void __iomem *ioaddr, int index,109 struct stmmac_pps_cfg *cfg, bool enable,110 u32 sub_second_inc, u32 systime_flags);111void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg,112 u32 num_txq, u32 num_rxq,113 bool tx_enable, bool pmac_enable);114void dwmac5_fpe_send_mpacket(void __iomem *ioaddr,115 struct stmmac_fpe_cfg *cfg,116 enum stmmac_mpacket_type type);117int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev);118int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr);119void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size);120int dwmac5_fpe_map_preemption_class(struct net_device *ndev,121 struct netlink_ext_ack *extack, u32 pclass);122 123#endif /* __DWMAC5_H__ */124