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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Texas Instruments N-Port Ethernet Switch Address Lookup Engine APIs4 *5 * Copyright (C) 2012 Texas Instruments6 *7 */8#ifndef __TI_CPSW_ALE_H__9#define __TI_CPSW_ALE_H__10 11struct reg_fields;12 13struct cpsw_ale_params {14 struct device *dev;15 void __iomem *ale_regs;16 unsigned long ale_ageout; /* in secs */17 unsigned long ale_entries;18 unsigned long num_policers;19 unsigned long ale_ports;20 /* NU Switch has specific handling as number of bits in ALE entries21 * are different than other versions of ALE. Also there are specific22 * registers for unknown vlan specific fields. So use nu_switch_ale23 * to identify this hardware.24 */25 bool nu_switch_ale;26 const struct reg_field *reg_fields;27 int num_fields;28 const char *dev_id;29 unsigned long bus_freq;30};31 32struct ale_entry_fld;33struct regmap;34 35enum ale_fields {36 MINOR_VER,37 MAJOR_VER,38 ALE_ENTRIES,39 ALE_POLICERS,40 POL_PORT_MEN,41 POL_TRUNK_ID,42 POL_PORT_NUM,43 POL_PRI_MEN,44 POL_PRI_VAL,45 POL_OUI_MEN,46 POL_OUI_INDEX,47 POL_DST_MEN,48 POL_DST_INDEX,49 POL_SRC_MEN,50 POL_SRC_INDEX,51 POL_OVLAN_MEN,52 POL_OVLAN_INDEX,53 POL_IVLAN_MEN,54 POL_IVLAN_INDEX,55 POL_ETHERTYPE_MEN,56 POL_ETHERTYPE_INDEX,57 POL_IPSRC_MEN,58 POL_IPSRC_INDEX,59 POL_IPDST_MEN,60 POL_IPDST_INDEX,61 POL_EN,62 POL_RED_DROP_EN,63 POL_YELLOW_DROP_EN,64 POL_YELLOW_THRESH,65 POL_POL_MATCH_MODE,66 POL_PRIORITY_THREAD_EN,67 POL_MAC_ONLY_DEF_DIS,68 POL_TEST_CLR,69 POL_TEST_CLR_RED,70 POL_TEST_CLR_YELLOW,71 POL_TEST_CLR_SELECTED,72 POL_TEST_ENTRY,73 POL_STATUS_HIT,74 POL_STATUS_HIT_RED,75 POL_STATUS_HIT_YELLOW,76 ALE_DEFAULT_THREAD_EN,77 ALE_DEFAULT_THREAD_VAL,78 ALE_THREAD_CLASS_INDEX,79 ALE_THREAD_ENABLE,80 ALE_THREAD_VALUE,81 /* terminator */82 ALE_FIELDS_MAX,83};84 85struct cpsw_ale {86 struct cpsw_ale_params params;87 struct timer_list timer;88 struct regmap *regmap;89 struct regmap_field *fields[ALE_FIELDS_MAX];90 unsigned long ageout;91 u32 version;92 u32 features;93 /* These bits are different on NetCP NU Switch ALE */94 u32 port_mask_bits;95 u32 port_num_bits;96 u32 vlan_field_bits;97 unsigned long *p0_untag_vid_mask;98 const struct ale_entry_fld *vlan_entry_tbl;99};100 101enum cpsw_ale_control {102 /* global */103 ALE_ENABLE,104 ALE_CLEAR,105 ALE_AGEOUT,106 ALE_P0_UNI_FLOOD,107 ALE_VLAN_NOLEARN,108 ALE_NO_PORT_VLAN,109 ALE_OUI_DENY,110 ALE_BYPASS,111 ALE_RATE_LIMIT_TX,112 ALE_VLAN_AWARE,113 ALE_AUTH_ENABLE,114 ALE_RATE_LIMIT,115 /* port controls */116 ALE_PORT_STATE,117 ALE_PORT_DROP_UNTAGGED,118 ALE_PORT_DROP_UNKNOWN_VLAN,119 ALE_PORT_NOLEARN,120 ALE_PORT_NO_SA_UPDATE,121 ALE_PORT_UNKNOWN_VLAN_MEMBER,122 ALE_PORT_UNKNOWN_MCAST_FLOOD,123 ALE_PORT_UNKNOWN_REG_MCAST_FLOOD,124 ALE_PORT_UNTAGGED_EGRESS,125 ALE_PORT_MACONLY,126 ALE_PORT_MACONLY_CAF,127 ALE_PORT_BCAST_LIMIT,128 ALE_PORT_MCAST_LIMIT,129 ALE_DEFAULT_THREAD_ID,130 ALE_DEFAULT_THREAD_ENABLE,131 ALE_NUM_CONTROLS,132};133 134enum cpsw_ale_port_state {135 ALE_PORT_STATE_DISABLE = 0x00,136 ALE_PORT_STATE_BLOCK = 0x01,137 ALE_PORT_STATE_LEARN = 0x02,138 ALE_PORT_STATE_FORWARD = 0x03,139};140 141/* ALE unicast entry flags - passed into cpsw_ale_add_ucast() */142#define ALE_SECURE BIT(0)143#define ALE_BLOCKED BIT(1)144#define ALE_SUPER BIT(2)145#define ALE_VLAN BIT(3)146 147#define ALE_PORT_HOST BIT(0)148#define ALE_PORT_1 BIT(1)149#define ALE_PORT_2 BIT(2)150 151#define ALE_MCAST_FWD 0152#define ALE_MCAST_BLOCK_LEARN_FWD 1153#define ALE_MCAST_FWD_LEARN 2154#define ALE_MCAST_FWD_2 3155 156#define ALE_ENTRY_BITS 68157#define ALE_ENTRY_WORDS DIV_ROUND_UP(ALE_ENTRY_BITS, 32)158 159struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params);160 161void cpsw_ale_start(struct cpsw_ale *ale);162void cpsw_ale_stop(struct cpsw_ale *ale);163 164int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid);165int cpsw_ale_add_ucast(struct cpsw_ale *ale, const u8 *addr, int port,166 int flags, u16 vid);167int cpsw_ale_del_ucast(struct cpsw_ale *ale, const u8 *addr, int port,168 int flags, u16 vid);169int cpsw_ale_add_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask,170 int flags, u16 vid, int mcast_state);171int cpsw_ale_del_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask,172 int flags, u16 vid);173int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag,174 int reg_mcast, int unreg_mcast);175int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port);176void cpsw_ale_set_allmulti(struct cpsw_ale *ale, int allmulti, int port);177int cpsw_ale_rx_ratelimit_bc(struct cpsw_ale *ale, int port, unsigned int ratelimit_pps);178int cpsw_ale_rx_ratelimit_mc(struct cpsw_ale *ale, int port, unsigned int ratelimit_pps);179 180int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control);181int cpsw_ale_control_set(struct cpsw_ale *ale, int port,182 int control, int value);183void cpsw_ale_dump(struct cpsw_ale *ale, u32 *data);184void cpsw_ale_restore(struct cpsw_ale *ale, u32 *data);185u32 cpsw_ale_get_num_entries(struct cpsw_ale *ale);186 187static inline int cpsw_ale_get_vlan_p0_untag(struct cpsw_ale *ale, u16 vid)188{189 return test_bit(vid, ale->p0_untag_vid_mask);190}191 192int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask,193 int untag_mask, int reg_mcast, int unreg_mcast);194int cpsw_ale_vlan_del_modify(struct cpsw_ale *ale, u16 vid, int port_mask);195void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask,196 bool add);197void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch);198 199#endif200