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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * PTP 1588 clock using the IXP46X4 *5 * Copyright (C) 2010 OMICRON electronics GmbH6 */7 8#ifndef _IXP46X_TS_H_9#define _IXP46X_TS_H_10 11#define DEFAULT_ADDEND 0xF000002912#define TICKS_NS_SHIFT 413 14struct ixp46x_channel_ctl {15 u32 ch_control; /* 0x40 Time Synchronization Channel Control */16 u32 ch_event; /* 0x44 Time Synchronization Channel Event */17 u32 tx_snap_lo; /* 0x48 Transmit Snapshot Low Register */18 u32 tx_snap_hi; /* 0x4C Transmit Snapshot High Register */19 u32 rx_snap_lo; /* 0x50 Receive Snapshot Low Register */20 u32 rx_snap_hi; /* 0x54 Receive Snapshot High Register */21 u32 src_uuid_lo; /* 0x58 Source UUID0 Low Register */22 u32 src_uuid_hi; /* 0x5C Sequence Identifier/Source UUID0 High */23};24 25struct ixp46x_ts_regs {26 u32 control; /* 0x00 Time Sync Control Register */27 u32 event; /* 0x04 Time Sync Event Register */28 u32 addend; /* 0x08 Time Sync Addend Register */29 u32 accum; /* 0x0C Time Sync Accumulator Register */30 u32 test; /* 0x10 Time Sync Test Register */31 u32 unused; /* 0x14 */32 u32 rsystime_lo; /* 0x18 RawSystemTime_Low Register */33 u32 rsystime_hi; /* 0x1C RawSystemTime_High Register */34 u32 systime_lo; /* 0x20 SystemTime_Low Register */35 u32 systime_hi; /* 0x24 SystemTime_High Register */36 u32 trgt_lo; /* 0x28 TargetTime_Low Register */37 u32 trgt_hi; /* 0x2C TargetTime_High Register */38 u32 asms_lo; /* 0x30 Auxiliary Slave Mode Snapshot Low */39 u32 asms_hi; /* 0x34 Auxiliary Slave Mode Snapshot High */40 u32 amms_lo; /* 0x38 Auxiliary Master Mode Snapshot Low */41 u32 amms_hi; /* 0x3C Auxiliary Master Mode Snapshot High */42 43 struct ixp46x_channel_ctl channel[3];44};45 46/* 0x00 Time Sync Control Register Bits */47#define TSCR_AMM (1<<3)48#define TSCR_ASM (1<<2)49#define TSCR_TTM (1<<1)50#define TSCR_RST (1<<0)51 52/* 0x04 Time Sync Event Register Bits */53#define TSER_SNM (1<<3)54#define TSER_SNS (1<<2)55#define TTIPEND (1<<1)56 57/* 0x40 Time Synchronization Channel Control Register Bits */58#define MASTER_MODE (1<<0)59#define TIMESTAMP_ALL (1<<1)60 61/* 0x44 Time Synchronization Channel Event Register Bits */62#define TX_SNAPSHOT_LOCKED (1<<0)63#define RX_SNAPSHOT_LOCKED (1<<1)64 65#if IS_ENABLED(CONFIG_PTP_1588_CLOCK_IXP46X)66int ixp46x_ptp_find(struct ixp46x_ts_regs *__iomem *regs, int *phc_index);67#else68static inline int ixp46x_ptp_find(struct ixp46x_ts_regs *__iomem *regs, int *phc_index)69{70 *regs = NULL;71 *phc_index = -1;72 73 return -ENODEV;74}75#endif76 77#endif78