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1/*2 * http://www.cascoda.com/products/ca-821x/3 * Copyright (c) 2016, Cascoda, Ltd.4 * All rights reserved.5 *6 * This code is dual-licensed under both GPLv2 and 3-clause BSD. What follows is7 * the license notice for both respectively.8 *9 *******************************************************************************10 *11 * This program is free software; you can redistribute it and/or12 * modify it under the terms of the GNU General Public License13 * as published by the Free Software Foundation; either version 214 * of the License, or (at your option) any later version.15 *16 * This program is distributed in the hope that it will be useful,17 * but WITHOUT ANY WARRANTY; without even the implied warranty of18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the19 * GNU General Public License for more details.20 *21 *******************************************************************************22 *23 * Redistribution and use in source and binary forms, with or without24 * modification, are permitted provided that the following conditions are met:25 *26 * 1. Redistributions of source code must retain the above copyright notice,27 * this list of conditions and the following disclaimer.28 *29 * 2. Redistributions in binary form must reproduce the above copyright notice,30 * this list of conditions and the following disclaimer in the documentation31 * and/or other materials provided with the distribution.32 *33 * 3. Neither the name of the copyright holder nor the names of its contributors34 * may be used to endorse or promote products derived from this software without35 * specific prior written permission.36 *37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"38 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE39 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE40 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE41 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR42 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF43 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS44 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN45 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)46 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE47 * POSSIBILITY OF SUCH DAMAGE.48 */49 50#include <linux/cdev.h>51#include <linux/clk-provider.h>52#include <linux/debugfs.h>53#include <linux/delay.h>54#include <linux/gpio/consumer.h>55#include <linux/gpio.h>56#include <linux/ieee802154.h>57#include <linux/io.h>58#include <linux/kfifo.h>59#include <linux/of.h>60#include <linux/of_gpio.h>61#include <linux/module.h>62#include <linux/mutex.h>63#include <linux/poll.h>64#include <linux/skbuff.h>65#include <linux/slab.h>66#include <linux/spi/spi.h>67#include <linux/spinlock.h>68#include <linux/string.h>69#include <linux/workqueue.h>70#include <linux/interrupt.h>71 72#include <net/ieee802154_netdev.h>73#include <net/mac802154.h>74 75#define DRIVER_NAME "ca8210"76 77/* external clock frequencies */78#define ONE_MHZ 100000079#define TWO_MHZ (2 * ONE_MHZ)80#define FOUR_MHZ (4 * ONE_MHZ)81#define EIGHT_MHZ (8 * ONE_MHZ)82#define SIXTEEN_MHZ (16 * ONE_MHZ)83 84/* spi constants */85#define CA8210_SPI_BUF_SIZE 25686#define CA8210_SYNC_TIMEOUT 1000 /* Timeout for synchronous commands [ms] */87 88/* test interface constants */89#define CA8210_TEST_INT_FILE_NAME "ca8210_test"90#define CA8210_TEST_INT_FIFO_SIZE 25691 92/* HWME attribute IDs */93#define HWME_EDTHRESHOLD (0x04)94#define HWME_EDVALUE (0x06)95#define HWME_SYSCLKOUT (0x0F)96#define HWME_LQILIMIT (0x11)97 98/* TDME attribute IDs */99#define TDME_CHANNEL (0x00)100#define TDME_ATM_CONFIG (0x06)101 102#define MAX_HWME_ATTRIBUTE_SIZE 16103#define MAX_TDME_ATTRIBUTE_SIZE 2104 105/* PHY/MAC PIB Attribute Enumerations */106#define PHY_CURRENT_CHANNEL (0x00)107#define PHY_TRANSMIT_POWER (0x02)108#define PHY_CCA_MODE (0x03)109#define MAC_ASSOCIATION_PERMIT (0x41)110#define MAC_AUTO_REQUEST (0x42)111#define MAC_BATT_LIFE_EXT (0x43)112#define MAC_BATT_LIFE_EXT_PERIODS (0x44)113#define MAC_BEACON_PAYLOAD (0x45)114#define MAC_BEACON_PAYLOAD_LENGTH (0x46)115#define MAC_BEACON_ORDER (0x47)116#define MAC_GTS_PERMIT (0x4d)117#define MAC_MAX_CSMA_BACKOFFS (0x4e)118#define MAC_MIN_BE (0x4f)119#define MAC_PAN_ID (0x50)120#define MAC_PROMISCUOUS_MODE (0x51)121#define MAC_RX_ON_WHEN_IDLE (0x52)122#define MAC_SHORT_ADDRESS (0x53)123#define MAC_SUPERFRAME_ORDER (0x54)124#define MAC_ASSOCIATED_PAN_COORD (0x56)125#define MAC_MAX_BE (0x57)126#define MAC_MAX_FRAME_RETRIES (0x59)127#define MAC_RESPONSE_WAIT_TIME (0x5A)128#define MAC_SECURITY_ENABLED (0x5D)129 130#define MAC_AUTO_REQUEST_SECURITY_LEVEL (0x78)131#define MAC_AUTO_REQUEST_KEY_ID_MODE (0x79)132 133#define NS_IEEE_ADDRESS (0xFF) /* Non-standard IEEE address */134 135/* MAC Address Mode Definitions */136#define MAC_MODE_NO_ADDR (0x00)137#define MAC_MODE_SHORT_ADDR (0x02)138#define MAC_MODE_LONG_ADDR (0x03)139 140/* MAC constants */141#define MAX_BEACON_OVERHEAD (75)142#define MAX_BEACON_PAYLOAD_LENGTH (IEEE802154_MTU - MAX_BEACON_OVERHEAD)143 144#define MAX_ATTRIBUTE_SIZE (122)145#define MAX_DATA_SIZE (114)146 147#define CA8210_VALID_CHANNELS (0x07FFF800)148 149/* MAC workarounds for V1.1 and MPW silicon (V0.x) */150#define CA8210_MAC_WORKAROUNDS (0)151#define CA8210_MAC_MPW (0)152 153/* memory manipulation macros */154#define LS_BYTE(x) ((u8)((x) & 0xFF))155#define MS_BYTE(x) ((u8)(((x) >> 8) & 0xFF))156 157/* message ID codes in SPI commands */158/* downstream */159#define MCPS_DATA_REQUEST (0x00)160#define MLME_ASSOCIATE_REQUEST (0x02)161#define MLME_ASSOCIATE_RESPONSE (0x03)162#define MLME_DISASSOCIATE_REQUEST (0x04)163#define MLME_GET_REQUEST (0x05)164#define MLME_ORPHAN_RESPONSE (0x06)165#define MLME_RESET_REQUEST (0x07)166#define MLME_RX_ENABLE_REQUEST (0x08)167#define MLME_SCAN_REQUEST (0x09)168#define MLME_SET_REQUEST (0x0A)169#define MLME_START_REQUEST (0x0B)170#define MLME_POLL_REQUEST (0x0D)171#define HWME_SET_REQUEST (0x0E)172#define HWME_GET_REQUEST (0x0F)173#define TDME_SETSFR_REQUEST (0x11)174#define TDME_GETSFR_REQUEST (0x12)175#define TDME_SET_REQUEST (0x14)176/* upstream */177#define MCPS_DATA_INDICATION (0x00)178#define MCPS_DATA_CONFIRM (0x01)179#define MLME_RESET_CONFIRM (0x0A)180#define MLME_SET_CONFIRM (0x0E)181#define MLME_START_CONFIRM (0x0F)182#define HWME_SET_CONFIRM (0x12)183#define HWME_GET_CONFIRM (0x13)184#define HWME_WAKEUP_INDICATION (0x15)185#define TDME_SETSFR_CONFIRM (0x17)186 187/* SPI command IDs */188/* bit indicating a confirm or indication from slave to master */189#define SPI_S2M (0x20)190/* bit indicating a synchronous message */191#define SPI_SYN (0x40)192 193/* SPI command definitions */194#define SPI_IDLE (0xFF)195#define SPI_NACK (0xF0)196 197#define SPI_MCPS_DATA_REQUEST (MCPS_DATA_REQUEST)198#define SPI_MCPS_DATA_INDICATION (MCPS_DATA_INDICATION + SPI_S2M)199#define SPI_MCPS_DATA_CONFIRM (MCPS_DATA_CONFIRM + SPI_S2M)200 201#define SPI_MLME_ASSOCIATE_REQUEST (MLME_ASSOCIATE_REQUEST)202#define SPI_MLME_RESET_REQUEST (MLME_RESET_REQUEST + SPI_SYN)203#define SPI_MLME_SET_REQUEST (MLME_SET_REQUEST + SPI_SYN)204#define SPI_MLME_START_REQUEST (MLME_START_REQUEST + SPI_SYN)205#define SPI_MLME_RESET_CONFIRM (MLME_RESET_CONFIRM + SPI_S2M + SPI_SYN)206#define SPI_MLME_SET_CONFIRM (MLME_SET_CONFIRM + SPI_S2M + SPI_SYN)207#define SPI_MLME_START_CONFIRM (MLME_START_CONFIRM + SPI_S2M + SPI_SYN)208 209#define SPI_HWME_SET_REQUEST (HWME_SET_REQUEST + SPI_SYN)210#define SPI_HWME_GET_REQUEST (HWME_GET_REQUEST + SPI_SYN)211#define SPI_HWME_SET_CONFIRM (HWME_SET_CONFIRM + SPI_S2M + SPI_SYN)212#define SPI_HWME_GET_CONFIRM (HWME_GET_CONFIRM + SPI_S2M + SPI_SYN)213#define SPI_HWME_WAKEUP_INDICATION (HWME_WAKEUP_INDICATION + SPI_S2M)214 215#define SPI_TDME_SETSFR_REQUEST (TDME_SETSFR_REQUEST + SPI_SYN)216#define SPI_TDME_SET_REQUEST (TDME_SET_REQUEST + SPI_SYN)217#define SPI_TDME_SETSFR_CONFIRM (TDME_SETSFR_CONFIRM + SPI_S2M + SPI_SYN)218 219/* TDME SFR addresses */220/* Page 0 */221#define CA8210_SFR_PACFG (0xB1)222#define CA8210_SFR_MACCON (0xD8)223#define CA8210_SFR_PACFGIB (0xFE)224/* Page 1 */225#define CA8210_SFR_LOTXCAL (0xBF)226#define CA8210_SFR_PTHRH (0xD1)227#define CA8210_SFR_PRECFG (0xD3)228#define CA8210_SFR_LNAGX40 (0xE1)229#define CA8210_SFR_LNAGX41 (0xE2)230#define CA8210_SFR_LNAGX42 (0xE3)231#define CA8210_SFR_LNAGX43 (0xE4)232#define CA8210_SFR_LNAGX44 (0xE5)233#define CA8210_SFR_LNAGX45 (0xE6)234#define CA8210_SFR_LNAGX46 (0xE7)235#define CA8210_SFR_LNAGX47 (0xE9)236 237#define PACFGIB_DEFAULT_CURRENT (0x3F)238#define PTHRH_DEFAULT_THRESHOLD (0x5A)239#define LNAGX40_DEFAULT_GAIN (0x29) /* 10dB */240#define LNAGX41_DEFAULT_GAIN (0x54) /* 21dB */241#define LNAGX42_DEFAULT_GAIN (0x6C) /* 27dB */242#define LNAGX43_DEFAULT_GAIN (0x7A) /* 30dB */243#define LNAGX44_DEFAULT_GAIN (0x84) /* 33dB */244#define LNAGX45_DEFAULT_GAIN (0x8B) /* 34dB */245#define LNAGX46_DEFAULT_GAIN (0x92) /* 36dB */246#define LNAGX47_DEFAULT_GAIN (0x96) /* 37dB */247 248#define CA8210_IOCTL_HARD_RESET (0x00)249 250/* Structs/Enums */251 252/**253 * struct cas_control - spi transfer structure254 * @msg: spi_message for each exchange255 * @transfer: spi_transfer for each exchange256 * @tx_buf: source array for transmission257 * @tx_in_buf: array storing bytes received during transmission258 * @priv: pointer to private data259 *260 * This structure stores all the necessary data passed around during a single261 * spi exchange.262 */263struct cas_control {264 struct spi_message msg;265 struct spi_transfer transfer;266 267 u8 tx_buf[CA8210_SPI_BUF_SIZE];268 u8 tx_in_buf[CA8210_SPI_BUF_SIZE];269 270 struct ca8210_priv *priv;271};272 273/**274 * struct ca8210_test - ca8210 test interface structure275 * @ca8210_dfs_spi_int: pointer to the entry in the debug fs for this device276 * @up_fifo: fifo for upstream messages277 * @readq: read wait queue278 *279 * This structure stores all the data pertaining to the debug interface280 */281struct ca8210_test {282 struct dentry *ca8210_dfs_spi_int;283 struct kfifo up_fifo;284 wait_queue_head_t readq;285};286 287/**288 * struct ca8210_priv - ca8210 private data structure289 * @spi: pointer to the ca8210 spi device object290 * @hw: pointer to the ca8210 ieee802154_hw object291 * @hw_registered: true if hw has been registered with ieee802154292 * @lock: spinlock protecting the private data area293 * @mlme_workqueue: workqueue for triggering MLME Reset294 * @irq_workqueue: workqueue for irq processing295 * @tx_skb: current socket buffer to transmit296 * @nextmsduhandle: msdu handle to pass to the 15.4 MAC layer for the297 * next transmission298 * @clk: external clock provided by the ca8210299 * @last_dsn: sequence number of last data packet received, for300 * resend detection301 * @test: test interface data section for this instance302 * @async_tx_pending: true if an asynchronous transmission was started and303 * is not complete304 * @sync_command_response: pointer to buffer to fill with sync response305 * @ca8210_is_awake: nonzero if ca8210 is initialised, ready for comms306 * @sync_down: counts number of downstream synchronous commands307 * @sync_up: counts number of upstream synchronous commands308 * @spi_transfer_complete: completion object for a single spi_transfer309 * @sync_exchange_complete: completion object for a complete synchronous API310 * exchange311 * @promiscuous: whether the ca8210 is in promiscuous mode or not312 * @retries: records how many times the current pending spi313 * transfer has been retried314 */315struct ca8210_priv {316 struct spi_device *spi;317 struct ieee802154_hw *hw;318 bool hw_registered;319 spinlock_t lock;320 struct workqueue_struct *mlme_workqueue;321 struct workqueue_struct *irq_workqueue;322 struct sk_buff *tx_skb;323 u8 nextmsduhandle;324 struct clk *clk;325 int last_dsn;326 struct ca8210_test test;327 bool async_tx_pending;328 u8 *sync_command_response;329 struct completion ca8210_is_awake;330 int sync_down, sync_up;331 struct completion spi_transfer_complete, sync_exchange_complete;332 bool promiscuous;333 int retries;334};335 336/**337 * struct work_priv_container - link between a work object and the relevant338 * device's private data339 * @work: work object being executed340 * @priv: device's private data section341 *342 */343struct work_priv_container {344 struct work_struct work;345 struct ca8210_priv *priv;346};347 348/**349 * struct ca8210_platform_data - ca8210 platform data structure350 * @extclockenable: true if the external clock is to be enabled351 * @extclockfreq: frequency of the external clock352 * @extclockgpio: ca8210 output gpio of the external clock353 * @gpio_reset: gpio number of ca8210 reset line354 * @gpio_irq: gpio number of ca8210 interrupt line355 * @irq_id: identifier for the ca8210 irq356 *357 */358struct ca8210_platform_data {359 bool extclockenable;360 unsigned int extclockfreq;361 unsigned int extclockgpio;362 int gpio_reset;363 int gpio_irq;364 int irq_id;365};366 367/**368 * struct fulladdr - full MAC addressing information structure369 * @mode: address mode (none, short, extended)370 * @pan_id: 16-bit LE pan id371 * @address: LE address, variable length as specified by mode372 *373 */374struct fulladdr {375 u8 mode;376 u8 pan_id[2];377 u8 address[8];378};379 380/**381 * union macaddr: generic MAC address container382 * @short_address: 16-bit short address383 * @ieee_address: 64-bit extended address as LE byte array384 *385 */386union macaddr {387 u16 short_address;388 u8 ieee_address[8];389};390 391/**392 * struct secspec: security specification for SAP commands393 * @security_level: 0-7, controls level of authentication & encryption394 * @key_id_mode: 0-3, specifies how to obtain key395 * @key_source: extended key retrieval data396 * @key_index: single-byte key identifier397 *398 */399struct secspec {400 u8 security_level;401 u8 key_id_mode;402 u8 key_source[8];403 u8 key_index;404};405 406/* downlink functions parameter set definitions */407struct mcps_data_request_pset {408 u8 src_addr_mode;409 struct fulladdr dst;410 u8 msdu_length;411 u8 msdu_handle;412 u8 tx_options;413 u8 msdu[MAX_DATA_SIZE];414};415 416struct mlme_set_request_pset {417 u8 pib_attribute;418 u8 pib_attribute_index;419 u8 pib_attribute_length;420 u8 pib_attribute_value[MAX_ATTRIBUTE_SIZE];421};422 423struct hwme_set_request_pset {424 u8 hw_attribute;425 u8 hw_attribute_length;426 u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];427};428 429struct hwme_get_request_pset {430 u8 hw_attribute;431};432 433struct tdme_setsfr_request_pset {434 u8 sfr_page;435 u8 sfr_address;436 u8 sfr_value;437};438 439/* uplink functions parameter set definitions */440struct hwme_set_confirm_pset {441 u8 status;442 u8 hw_attribute;443};444 445struct hwme_get_confirm_pset {446 u8 status;447 u8 hw_attribute;448 u8 hw_attribute_length;449 u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];450};451 452struct tdme_setsfr_confirm_pset {453 u8 status;454 u8 sfr_page;455 u8 sfr_address;456};457 458struct mac_message {459 u8 command_id;460 u8 length;461 union {462 struct mcps_data_request_pset data_req;463 struct mlme_set_request_pset set_req;464 struct hwme_set_request_pset hwme_set_req;465 struct hwme_get_request_pset hwme_get_req;466 struct tdme_setsfr_request_pset tdme_set_sfr_req;467 struct hwme_set_confirm_pset hwme_set_cnf;468 struct hwme_get_confirm_pset hwme_get_cnf;469 struct tdme_setsfr_confirm_pset tdme_set_sfr_cnf;470 u8 u8param;471 u8 status;472 u8 payload[148];473 } pdata;474};475 476union pa_cfg_sfr {477 struct {478 u8 bias_current_trim : 3;479 u8 /* reserved */ : 1;480 u8 buffer_capacitor_trim : 3;481 u8 boost : 1;482 };483 u8 paib;484};485 486struct preamble_cfg_sfr {487 u8 timeout_symbols : 3;488 u8 acquisition_symbols : 3;489 u8 search_symbols : 2;490};491 492static int (*cascoda_api_upstream)(493 const u8 *buf,494 size_t len,495 void *device_ref496);497 498/**499 * link_to_linux_err() - Translates an 802.15.4 return code into the closest500 * linux error501 * @link_status: 802.15.4 status code502 *503 * Return: 0 or Linux error code504 */505static int link_to_linux_err(int link_status)506{507 if (link_status < 0) {508 /* status is already a Linux code */509 return link_status;510 }511 switch (link_status) {512 case IEEE802154_SUCCESS:513 case IEEE802154_REALIGNMENT:514 return 0;515 case IEEE802154_IMPROPER_KEY_TYPE:516 return -EKEYREJECTED;517 case IEEE802154_IMPROPER_SECURITY_LEVEL:518 case IEEE802154_UNSUPPORTED_LEGACY:519 case IEEE802154_DENIED:520 return -EACCES;521 case IEEE802154_BEACON_LOST:522 case IEEE802154_NO_ACK:523 case IEEE802154_NO_BEACON:524 return -ENETUNREACH;525 case IEEE802154_CHANNEL_ACCESS_FAILURE:526 case IEEE802154_TX_ACTIVE:527 case IEEE802154_SCAN_IN_PROGRESS:528 return -EBUSY;529 case IEEE802154_DISABLE_TRX_FAILURE:530 case IEEE802154_OUT_OF_CAP:531 return -EAGAIN;532 case IEEE802154_FRAME_TOO_LONG:533 return -EMSGSIZE;534 case IEEE802154_INVALID_GTS:535 case IEEE802154_PAST_TIME:536 return -EBADSLT;537 case IEEE802154_INVALID_HANDLE:538 return -EBADMSG;539 case IEEE802154_INVALID_PARAMETER:540 case IEEE802154_UNSUPPORTED_ATTRIBUTE:541 case IEEE802154_ON_TIME_TOO_LONG:542 case IEEE802154_INVALID_INDEX:543 return -EINVAL;544 case IEEE802154_NO_DATA:545 return -ENODATA;546 case IEEE802154_NO_SHORT_ADDRESS:547 return -EFAULT;548 case IEEE802154_PAN_ID_CONFLICT:549 return -EADDRINUSE;550 case IEEE802154_TRANSACTION_EXPIRED:551 return -ETIME;552 case IEEE802154_TRANSACTION_OVERFLOW:553 return -ENOBUFS;554 case IEEE802154_UNAVAILABLE_KEY:555 return -ENOKEY;556 case IEEE802154_INVALID_ADDRESS:557 return -ENXIO;558 case IEEE802154_TRACKING_OFF:559 case IEEE802154_SUPERFRAME_OVERLAP:560 return -EREMOTEIO;561 case IEEE802154_LIMIT_REACHED:562 return -EDQUOT;563 case IEEE802154_READ_ONLY:564 return -EROFS;565 default:566 return -EPROTO;567 }568}569 570/**571 * ca8210_test_int_driver_write() - Writes a message to the test interface to be572 * read by the userspace573 * @buf: Buffer containing upstream message574 * @len: length of message to write575 * @spi: SPI device of message originator576 *577 * Return: 0 or linux error code578 */579static int ca8210_test_int_driver_write(580 const u8 *buf,581 size_t len,582 void *spi583)584{585 struct ca8210_priv *priv = spi_get_drvdata(spi);586 struct ca8210_test *test = &priv->test;587 char *fifo_buffer;588 int i;589 590 dev_dbg(591 &priv->spi->dev,592 "test_interface: Buffering upstream message:\n"593 );594 for (i = 0; i < len; i++)595 dev_dbg(&priv->spi->dev, "%#03x\n", buf[i]);596 597 fifo_buffer = kmemdup(buf, len, GFP_KERNEL);598 if (!fifo_buffer)599 return -ENOMEM;600 kfifo_in(&test->up_fifo, &fifo_buffer, 4);601 wake_up_interruptible(&priv->test.readq);602 603 return 0;604}605 606/* SPI Operation */607 608static int ca8210_net_rx(609 struct ieee802154_hw *hw,610 u8 *command,611 size_t len612);613static u8 mlme_reset_request_sync(614 u8 set_default_pib,615 void *device_ref616);617static int ca8210_spi_transfer(618 struct spi_device *spi,619 const u8 *buf,620 size_t len621);622 623/**624 * ca8210_reset_send() - Hard resets the ca8210 for a given time625 * @spi: Pointer to target ca8210 spi device626 * @ms: Milliseconds to hold the reset line low for627 */628static void ca8210_reset_send(struct spi_device *spi, unsigned int ms)629{630 struct ca8210_platform_data *pdata = spi->dev.platform_data;631 struct ca8210_priv *priv = spi_get_drvdata(spi);632 long status;633 634 gpio_set_value(pdata->gpio_reset, 0);635 reinit_completion(&priv->ca8210_is_awake);636 msleep(ms);637 gpio_set_value(pdata->gpio_reset, 1);638 priv->promiscuous = false;639 640 /* Wait until wakeup indication seen */641 status = wait_for_completion_interruptible_timeout(642 &priv->ca8210_is_awake,643 msecs_to_jiffies(CA8210_SYNC_TIMEOUT)644 );645 if (status == 0) {646 dev_crit(647 &spi->dev,648 "Fatal: No wakeup from ca8210 after reset!\n"649 );650 }651 652 dev_dbg(&spi->dev, "Reset the device\n");653}654 655/**656 * ca8210_mlme_reset_worker() - Resets the MLME, Called when the MAC OVERFLOW657 * condition happens.658 * @work: Pointer to work being executed659 */660static void ca8210_mlme_reset_worker(struct work_struct *work)661{662 struct work_priv_container *wpc = container_of(663 work,664 struct work_priv_container,665 work666 );667 struct ca8210_priv *priv = wpc->priv;668 669 mlme_reset_request_sync(0, priv->spi);670 kfree(wpc);671}672 673/**674 * ca8210_rx_done() - Calls various message dispatches responding to a received675 * command676 * @cas_ctl: Pointer to the cas_control object for the relevant spi transfer677 *678 * Presents a received SAP command from the ca8210 to the Cascoda EVBME, test679 * interface and network driver.680 */681static void ca8210_rx_done(struct cas_control *cas_ctl)682{683 u8 *buf;684 unsigned int len;685 struct work_priv_container *mlme_reset_wpc;686 struct ca8210_priv *priv = cas_ctl->priv;687 688 buf = cas_ctl->tx_in_buf;689 len = buf[1] + 2;690 if (len > CA8210_SPI_BUF_SIZE) {691 dev_crit(692 &priv->spi->dev,693 "Received packet len (%u) erroneously long\n",694 len695 );696 goto finish;697 }698 699 if (buf[0] & SPI_SYN) {700 if (priv->sync_command_response) {701 memcpy(priv->sync_command_response, buf, len);702 complete(&priv->sync_exchange_complete);703 } else {704 if (cascoda_api_upstream)705 cascoda_api_upstream(buf, len, priv->spi);706 priv->sync_up++;707 }708 } else {709 if (cascoda_api_upstream)710 cascoda_api_upstream(buf, len, priv->spi);711 }712 713 ca8210_net_rx(priv->hw, buf, len);714 if (buf[0] == SPI_MCPS_DATA_CONFIRM) {715 if (buf[3] == IEEE802154_TRANSACTION_OVERFLOW) {716 dev_info(717 &priv->spi->dev,718 "Waiting for transaction overflow to stabilise...\n");719 msleep(2000);720 dev_info(721 &priv->spi->dev,722 "Resetting MAC...\n");723 724 mlme_reset_wpc = kmalloc(sizeof(*mlme_reset_wpc),725 GFP_KERNEL);726 if (!mlme_reset_wpc)727 goto finish;728 INIT_WORK(729 &mlme_reset_wpc->work,730 ca8210_mlme_reset_worker731 );732 mlme_reset_wpc->priv = priv;733 queue_work(priv->mlme_workqueue, &mlme_reset_wpc->work);734 }735 } else if (buf[0] == SPI_HWME_WAKEUP_INDICATION) {736 dev_notice(737 &priv->spi->dev,738 "Wakeup indication received, reason:\n"739 );740 switch (buf[2]) {741 case 0:742 dev_notice(743 &priv->spi->dev,744 "Transceiver woken up from Power Up / System Reset\n"745 );746 break;747 case 1:748 dev_notice(749 &priv->spi->dev,750 "Watchdog Timer Time-Out\n"751 );752 break;753 case 2:754 dev_notice(755 &priv->spi->dev,756 "Transceiver woken up from Power-Off by Sleep Timer Time-Out\n");757 break;758 case 3:759 dev_notice(760 &priv->spi->dev,761 "Transceiver woken up from Power-Off by GPIO Activity\n"762 );763 break;764 case 4:765 dev_notice(766 &priv->spi->dev,767 "Transceiver woken up from Standby by Sleep Timer Time-Out\n"768 );769 break;770 case 5:771 dev_notice(772 &priv->spi->dev,773 "Transceiver woken up from Standby by GPIO Activity\n"774 );775 break;776 case 6:777 dev_notice(778 &priv->spi->dev,779 "Sleep-Timer Time-Out in Active Mode\n"780 );781 break;782 default:783 dev_warn(&priv->spi->dev, "Wakeup reason unknown\n");784 break;785 }786 complete(&priv->ca8210_is_awake);787 }788 789finish:;790}791 792static void ca8210_remove(struct spi_device *spi_device);793 794/**795 * ca8210_spi_transfer_complete() - Called when a single spi transfer has796 * completed797 * @context: Pointer to the cas_control object for the finished transfer798 */799static void ca8210_spi_transfer_complete(void *context)800{801 struct cas_control *cas_ctl = context;802 struct ca8210_priv *priv = cas_ctl->priv;803 bool duplex_rx = false;804 int i;805 u8 retry_buffer[CA8210_SPI_BUF_SIZE];806 807 if (808 cas_ctl->tx_in_buf[0] == SPI_NACK ||809 (cas_ctl->tx_in_buf[0] == SPI_IDLE &&810 cas_ctl->tx_in_buf[1] == SPI_NACK)811 ) {812 /* ca8210 is busy */813 dev_info(&priv->spi->dev, "ca8210 was busy during attempted write\n");814 if (cas_ctl->tx_buf[0] == SPI_IDLE) {815 dev_warn(816 &priv->spi->dev,817 "IRQ servicing NACKd, dropping transfer\n"818 );819 kfree(cas_ctl);820 return;821 }822 if (priv->retries > 3) {823 dev_err(&priv->spi->dev, "too many retries!\n");824 kfree(cas_ctl);825 ca8210_remove(priv->spi);826 return;827 }828 memcpy(retry_buffer, cas_ctl->tx_buf, CA8210_SPI_BUF_SIZE);829 kfree(cas_ctl);830 ca8210_spi_transfer(831 priv->spi,832 retry_buffer,833 CA8210_SPI_BUF_SIZE834 );835 priv->retries++;836 dev_info(&priv->spi->dev, "retried spi write\n");837 return;838 } else if (839 cas_ctl->tx_in_buf[0] != SPI_IDLE &&840 cas_ctl->tx_in_buf[0] != SPI_NACK841 ) {842 duplex_rx = true;843 }844 845 if (duplex_rx) {846 dev_dbg(&priv->spi->dev, "READ CMD DURING TX\n");847 for (i = 0; i < cas_ctl->tx_in_buf[1] + 2; i++)848 dev_dbg(849 &priv->spi->dev,850 "%#03x\n",851 cas_ctl->tx_in_buf[i]852 );853 ca8210_rx_done(cas_ctl);854 }855 complete(&priv->spi_transfer_complete);856 kfree(cas_ctl);857 priv->retries = 0;858}859 860/**861 * ca8210_spi_transfer() - Initiate duplex spi transfer with ca8210862 * @spi: Pointer to spi device for transfer863 * @buf: Octet array to send864 * @len: length of the buffer being sent865 *866 * Return: 0 or linux error code867 */868static int ca8210_spi_transfer(869 struct spi_device *spi,870 const u8 *buf,871 size_t len872)873{874 int i, status = 0;875 struct ca8210_priv *priv;876 struct cas_control *cas_ctl;877 878 if (!spi) {879 pr_crit("NULL spi device passed to %s\n", __func__);880 return -ENODEV;881 }882 883 priv = spi_get_drvdata(spi);884 reinit_completion(&priv->spi_transfer_complete);885 886 dev_dbg(&spi->dev, "%s called\n", __func__);887 888 cas_ctl = kzalloc(sizeof(*cas_ctl), GFP_ATOMIC);889 if (!cas_ctl)890 return -ENOMEM;891 892 cas_ctl->priv = priv;893 memset(cas_ctl->tx_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);894 memset(cas_ctl->tx_in_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);895 memcpy(cas_ctl->tx_buf, buf, len);896 897 for (i = 0; i < len; i++)898 dev_dbg(&spi->dev, "%#03x\n", cas_ctl->tx_buf[i]);899 900 spi_message_init(&cas_ctl->msg);901 902 cas_ctl->transfer.tx_nbits = 1; /* 1 MOSI line */903 cas_ctl->transfer.rx_nbits = 1; /* 1 MISO line */904 cas_ctl->transfer.speed_hz = 0; /* Use device setting */905 cas_ctl->transfer.bits_per_word = 0; /* Use device setting */906 cas_ctl->transfer.tx_buf = cas_ctl->tx_buf;907 cas_ctl->transfer.rx_buf = cas_ctl->tx_in_buf;908 cas_ctl->transfer.delay.value = 0;909 cas_ctl->transfer.delay.unit = SPI_DELAY_UNIT_USECS;910 cas_ctl->transfer.cs_change = 0;911 cas_ctl->transfer.len = sizeof(struct mac_message);912 cas_ctl->msg.complete = ca8210_spi_transfer_complete;913 cas_ctl->msg.context = cas_ctl;914 915 spi_message_add_tail(916 &cas_ctl->transfer,917 &cas_ctl->msg918 );919 920 status = spi_async(spi, &cas_ctl->msg);921 if (status < 0) {922 dev_crit(923 &spi->dev,924 "status %d from spi_sync in write\n",925 status926 );927 }928 929 return status;930}931 932/**933 * ca8210_spi_exchange() - Exchange API/SAP commands with the radio934 * @buf: Octet array of command being sent downstream935 * @len: length of buf936 * @response: buffer for storing synchronous response937 * @device_ref: spi_device pointer for ca8210938 *939 * Effectively calls ca8210_spi_transfer to write buf[] to the spi, then for940 * synchronous commands waits for the corresponding response to be read from941 * the spi before returning. The response is written to the response parameter.942 *943 * Return: 0 or linux error code944 */945static int ca8210_spi_exchange(946 const u8 *buf,947 size_t len,948 u8 *response,949 void *device_ref950)951{952 int status = 0;953 struct spi_device *spi = device_ref;954 struct ca8210_priv *priv = spi->dev.driver_data;955 long wait_remaining;956 957 if ((buf[0] & SPI_SYN) && response) { /* if sync wait for confirm */958 reinit_completion(&priv->sync_exchange_complete);959 priv->sync_command_response = response;960 }961 962 do {963 reinit_completion(&priv->spi_transfer_complete);964 status = ca8210_spi_transfer(priv->spi, buf, len);965 if (status) {966 dev_warn(967 &spi->dev,968 "spi write failed, returned %d\n",969 status970 );971 if (status == -EBUSY)972 continue;973 if (((buf[0] & SPI_SYN) && response))974 complete(&priv->sync_exchange_complete);975 goto cleanup;976 }977 978 wait_remaining = wait_for_completion_interruptible_timeout(979 &priv->spi_transfer_complete,980 msecs_to_jiffies(1000)981 );982 if (wait_remaining == -ERESTARTSYS) {983 status = -ERESTARTSYS;984 } else if (wait_remaining == 0) {985 dev_err(986 &spi->dev,987 "SPI downstream transfer timed out!\n"988 );989 status = -ETIME;990 goto cleanup;991 }992 } while (status < 0);993 994 if (!((buf[0] & SPI_SYN) && response))995 goto cleanup;996 997 wait_remaining = wait_for_completion_interruptible_timeout(998 &priv->sync_exchange_complete,999 msecs_to_jiffies(CA8210_SYNC_TIMEOUT)1000 );1001 if (wait_remaining == -ERESTARTSYS) {1002 status = -ERESTARTSYS;1003 } else if (wait_remaining == 0) {1004 dev_err(1005 &spi->dev,1006 "Synchronous confirm timeout\n"1007 );1008 status = -ETIME;1009 }1010 1011cleanup:1012 priv->sync_command_response = NULL;1013 return status;1014}1015 1016/**1017 * ca8210_interrupt_handler() - Called when an irq is received from the ca82101018 * @irq: Id of the irq being handled1019 * @dev_id: Pointer passed by the system, pointing to the ca8210's private data1020 *1021 * This function is called when the irq line from the ca8210 is asserted,1022 * signifying that the ca8210 has a message to send upstream to us. Starts the1023 * asynchronous spi read.1024 *1025 * Return: irq return code1026 */1027static irqreturn_t ca8210_interrupt_handler(int irq, void *dev_id)1028{1029 struct ca8210_priv *priv = dev_id;1030 int status;1031 1032 dev_dbg(&priv->spi->dev, "irq: Interrupt occurred\n");1033 do {1034 status = ca8210_spi_transfer(priv->spi, NULL, 0);1035 if (status && (status != -EBUSY)) {1036 dev_warn(1037 &priv->spi->dev,1038 "spi read failed, returned %d\n",1039 status1040 );1041 }1042 } while (status == -EBUSY);1043 return IRQ_HANDLED;1044}1045 1046static int (*cascoda_api_downstream)(1047 const u8 *buf,1048 size_t len,1049 u8 *response,1050 void *device_ref1051) = ca8210_spi_exchange;1052 1053/* Cascoda API / 15.4 SAP Primitives */1054 1055/**1056 * tdme_setsfr_request_sync() - TDME_SETSFR_request/confirm according to API1057 * @sfr_page: SFR Page1058 * @sfr_address: SFR Address1059 * @sfr_value: SFR Value1060 * @device_ref: Nondescript pointer to target device1061 *1062 * Return: 802.15.4 status code of TDME-SETSFR.confirm1063 */1064static u8 tdme_setsfr_request_sync(1065 u8 sfr_page,1066 u8 sfr_address,1067 u8 sfr_value,1068 void *device_ref1069)1070{1071 int ret;1072 struct mac_message command, response;1073 struct spi_device *spi = device_ref;1074 1075 command.command_id = SPI_TDME_SETSFR_REQUEST;1076 command.length = 3;1077 command.pdata.tdme_set_sfr_req.sfr_page = sfr_page;1078 command.pdata.tdme_set_sfr_req.sfr_address = sfr_address;1079 command.pdata.tdme_set_sfr_req.sfr_value = sfr_value;1080 response.command_id = SPI_IDLE;1081 ret = cascoda_api_downstream(1082 &command.command_id,1083 command.length + 2,1084 &response.command_id,1085 device_ref1086 );1087 if (ret) {1088 dev_crit(&spi->dev, "cascoda_api_downstream returned %d", ret);1089 return IEEE802154_SYSTEM_ERROR;1090 }1091 1092 if (response.command_id != SPI_TDME_SETSFR_CONFIRM) {1093 dev_crit(1094 &spi->dev,1095 "sync response to SPI_TDME_SETSFR_REQUEST was not SPI_TDME_SETSFR_CONFIRM, it was %d\n",1096 response.command_id1097 );1098 return IEEE802154_SYSTEM_ERROR;1099 }1100 1101 return response.pdata.tdme_set_sfr_cnf.status;1102}1103 1104/**1105 * tdme_chipinit() - TDME Chip Register Default Initialisation Macro1106 * @device_ref: Nondescript pointer to target device1107 *1108 * Return: 802.15.4 status code of API calls1109 */1110static u8 tdme_chipinit(void *device_ref)1111{1112 u8 status = IEEE802154_SUCCESS;1113 u8 sfr_address;1114 struct spi_device *spi = device_ref;1115 struct preamble_cfg_sfr pre_cfg_value = {1116 .timeout_symbols = 3,1117 .acquisition_symbols = 3,1118 .search_symbols = 1,1119 };1120 /* LNA Gain Settings */1121 status = tdme_setsfr_request_sync(1122 1, (sfr_address = CA8210_SFR_LNAGX40),1123 LNAGX40_DEFAULT_GAIN, device_ref);1124 if (status)1125 goto finish;1126 status = tdme_setsfr_request_sync(1127 1, (sfr_address = CA8210_SFR_LNAGX41),1128 LNAGX41_DEFAULT_GAIN, device_ref);1129 if (status)1130 goto finish;1131 status = tdme_setsfr_request_sync(1132 1, (sfr_address = CA8210_SFR_LNAGX42),1133 LNAGX42_DEFAULT_GAIN, device_ref);1134 if (status)1135 goto finish;1136 status = tdme_setsfr_request_sync(1137 1, (sfr_address = CA8210_SFR_LNAGX43),1138 LNAGX43_DEFAULT_GAIN, device_ref);1139 if (status)1140 goto finish;1141 status = tdme_setsfr_request_sync(1142 1, (sfr_address = CA8210_SFR_LNAGX44),1143 LNAGX44_DEFAULT_GAIN, device_ref);1144 if (status)1145 goto finish;1146 status = tdme_setsfr_request_sync(1147 1, (sfr_address = CA8210_SFR_LNAGX45),1148 LNAGX45_DEFAULT_GAIN, device_ref);1149 if (status)1150 goto finish;1151 status = tdme_setsfr_request_sync(1152 1, (sfr_address = CA8210_SFR_LNAGX46),1153 LNAGX46_DEFAULT_GAIN, device_ref);1154 if (status)1155 goto finish;1156 status = tdme_setsfr_request_sync(1157 1, (sfr_address = CA8210_SFR_LNAGX47),1158 LNAGX47_DEFAULT_GAIN, device_ref);1159 if (status)1160 goto finish;1161 /* Preamble Timing Config */1162 status = tdme_setsfr_request_sync(1163 1, (sfr_address = CA8210_SFR_PRECFG),1164 *((u8 *)&pre_cfg_value), device_ref);1165 if (status)1166 goto finish;1167 /* Preamble Threshold High */1168 status = tdme_setsfr_request_sync(1169 1, (sfr_address = CA8210_SFR_PTHRH),1170 PTHRH_DEFAULT_THRESHOLD, device_ref);1171 if (status)1172 goto finish;1173 /* Tx Output Power 8 dBm */1174 status = tdme_setsfr_request_sync(1175 0, (sfr_address = CA8210_SFR_PACFGIB),1176 PACFGIB_DEFAULT_CURRENT, device_ref);1177 if (status)1178 goto finish;1179 1180finish:1181 if (status != IEEE802154_SUCCESS) {1182 dev_err(1183 &spi->dev,1184 "failed to set sfr at %#03x, status = %#03x\n",1185 sfr_address,1186 status1187 );1188 }1189 return status;1190}1191 1192/**1193 * tdme_channelinit() - TDME Channel Register Default Initialisation Macro (Tx)1194 * @channel: 802.15.4 channel to initialise chip for1195 * @device_ref: Nondescript pointer to target device1196 *1197 * Return: 802.15.4 status code of API calls1198 */1199static u8 tdme_channelinit(u8 channel, void *device_ref)1200{1201 /* Transceiver front-end local oscillator tx two-point calibration1202 * value. Tuned for the hardware.1203 */1204 u8 txcalval;1205 1206 if (channel >= 25)1207 txcalval = 0xA7;1208 else if (channel >= 23)1209 txcalval = 0xA8;1210 else if (channel >= 22)1211 txcalval = 0xA9;1212 else if (channel >= 20)1213 txcalval = 0xAA;1214 else if (channel >= 17)1215 txcalval = 0xAB;1216 else if (channel >= 16)1217 txcalval = 0xAC;1218 else if (channel >= 14)1219 txcalval = 0xAD;1220 else if (channel >= 12)1221 txcalval = 0xAE;1222 else1223 txcalval = 0xAF;1224 1225 return tdme_setsfr_request_sync(1226 1,1227 CA8210_SFR_LOTXCAL,1228 txcalval,1229 device_ref1230 ); /* LO Tx Cal */1231}1232 1233/**1234 * tdme_checkpibattribute() - Checks Attribute Values that are not checked in1235 * MAC1236 * @pib_attribute: Attribute Number1237 * @pib_attribute_length: Attribute length1238 * @pib_attribute_value: Pointer to Attribute Value1239 *1240 * Return: 802.15.4 status code of checks1241 */1242static u8 tdme_checkpibattribute(1243 u8 pib_attribute,1244 u8 pib_attribute_length,1245 const void *pib_attribute_value1246)1247{1248 u8 status = IEEE802154_SUCCESS;1249 u8 value;1250 1251 value = *((u8 *)pib_attribute_value);1252 1253 switch (pib_attribute) {1254 /* PHY */1255 case PHY_TRANSMIT_POWER:1256 if (value > 0x3F)1257 status = IEEE802154_INVALID_PARAMETER;1258 break;1259 case PHY_CCA_MODE:1260 if (value > 0x03)1261 status = IEEE802154_INVALID_PARAMETER;1262 break;1263 /* MAC */1264 case MAC_BATT_LIFE_EXT_PERIODS:1265 if (value < 6 || value > 41)1266 status = IEEE802154_INVALID_PARAMETER;1267 break;1268 case MAC_BEACON_PAYLOAD:1269 if (pib_attribute_length > MAX_BEACON_PAYLOAD_LENGTH)1270 status = IEEE802154_INVALID_PARAMETER;1271 break;1272 case MAC_BEACON_PAYLOAD_LENGTH:1273 if (value > MAX_BEACON_PAYLOAD_LENGTH)1274 status = IEEE802154_INVALID_PARAMETER;1275 break;1276 case MAC_BEACON_ORDER:1277 if (value > 15)1278 status = IEEE802154_INVALID_PARAMETER;1279 break;1280 case MAC_MAX_BE:1281 if (value < 3 || value > 8)1282 status = IEEE802154_INVALID_PARAMETER;1283 break;1284 case MAC_MAX_CSMA_BACKOFFS:1285 if (value > 5)1286 status = IEEE802154_INVALID_PARAMETER;1287 break;1288 case MAC_MAX_FRAME_RETRIES:1289 if (value > 7)1290 status = IEEE802154_INVALID_PARAMETER;1291 break;1292 case MAC_MIN_BE:1293 if (value > 8)1294 status = IEEE802154_INVALID_PARAMETER;1295 break;1296 case MAC_RESPONSE_WAIT_TIME:1297 if (value < 2 || value > 64)1298 status = IEEE802154_INVALID_PARAMETER;1299 break;1300 case MAC_SUPERFRAME_ORDER:1301 if (value > 15)1302 status = IEEE802154_INVALID_PARAMETER;1303 break;1304 /* boolean */1305 case MAC_ASSOCIATED_PAN_COORD:1306 case MAC_ASSOCIATION_PERMIT:1307 case MAC_AUTO_REQUEST:1308 case MAC_BATT_LIFE_EXT:1309 case MAC_GTS_PERMIT:1310 case MAC_PROMISCUOUS_MODE:1311 case MAC_RX_ON_WHEN_IDLE:1312 case MAC_SECURITY_ENABLED:1313 if (value > 1)1314 status = IEEE802154_INVALID_PARAMETER;1315 break;1316 /* MAC SEC */1317 case MAC_AUTO_REQUEST_SECURITY_LEVEL:1318 if (value > 7)1319 status = IEEE802154_INVALID_PARAMETER;1320 break;1321 case MAC_AUTO_REQUEST_KEY_ID_MODE:1322 if (value > 3)1323 status = IEEE802154_INVALID_PARAMETER;1324 break;1325 default:1326 break;1327 }1328 1329 return status;1330}1331 1332/**1333 * tdme_settxpower() - Sets the tx power for MLME_SET phyTransmitPower1334 * @txp: Transmit Power1335 * @device_ref: Nondescript pointer to target device1336 *1337 * Normalised to 802.15.4 Definition (6-bit, signed):1338 * Bit 7-6: not used1339 * Bit 5-0: tx power (-32 - +31 dB)1340 *1341 * Return: 802.15.4 status code of api calls1342 */1343static u8 tdme_settxpower(u8 txp, void *device_ref)1344{1345 u8 status;1346 s8 txp_val;1347 u8 txp_ext;1348 union pa_cfg_sfr pa_cfg_val;1349 1350 /* extend from 6 to 8 bit */1351 txp_ext = 0x3F & txp;1352 if (txp_ext & 0x20)1353 txp_ext += 0xC0;1354 txp_val = (s8)txp_ext;1355 1356 if (CA8210_MAC_MPW) {1357 if (txp_val > 0) {1358 /* 8 dBm: ptrim = 5, itrim = +3 => +4 dBm */1359 pa_cfg_val.bias_current_trim = 3;1360 pa_cfg_val.buffer_capacitor_trim = 5;1361 pa_cfg_val.boost = 1;1362 } else {1363 /* 0 dBm: ptrim = 7, itrim = +3 => -6 dBm */1364 pa_cfg_val.bias_current_trim = 3;1365 pa_cfg_val.buffer_capacitor_trim = 7;1366 pa_cfg_val.boost = 0;1367 }1368 /* write PACFG */1369 status = tdme_setsfr_request_sync(1370 0,1371 CA8210_SFR_PACFG,1372 pa_cfg_val.paib,1373 device_ref1374 );1375 } else {1376 /* Look-Up Table for Setting Current and Frequency Trim values1377 * for desired Output Power1378 */1379 if (txp_val > 8) {1380 pa_cfg_val.paib = 0x3F;1381 } else if (txp_val == 8) {1382 pa_cfg_val.paib = 0x32;1383 } else if (txp_val == 7) {1384 pa_cfg_val.paib = 0x22;1385 } else if (txp_val == 6) {1386 pa_cfg_val.paib = 0x18;1387 } else if (txp_val == 5) {1388 pa_cfg_val.paib = 0x10;1389 } else if (txp_val == 4) {1390 pa_cfg_val.paib = 0x0C;1391 } else if (txp_val == 3) {1392 pa_cfg_val.paib = 0x08;1393 } else if (txp_val == 2) {1394 pa_cfg_val.paib = 0x05;1395 } else if (txp_val == 1) {1396 pa_cfg_val.paib = 0x03;1397 } else if (txp_val == 0) {1398 pa_cfg_val.paib = 0x01;1399 } else { /* < 0 */1400 pa_cfg_val.paib = 0x00;1401 }1402 /* write PACFGIB */1403 status = tdme_setsfr_request_sync(1404 0,1405 CA8210_SFR_PACFGIB,1406 pa_cfg_val.paib,1407 device_ref1408 );1409 }1410 1411 return status;1412}1413 1414/**1415 * mcps_data_request() - mcps_data_request (Send Data) according to API Spec1416 * @src_addr_mode: Source Addressing Mode1417 * @dst_address_mode: Destination Addressing Mode1418 * @dst_pan_id: Destination PAN ID1419 * @dst_addr: Pointer to Destination Address1420 * @msdu_length: length of Data1421 * @msdu: Pointer to Data1422 * @msdu_handle: Handle of Data1423 * @tx_options: Tx Options Bit Field1424 * @security: Pointer to Security Structure or NULL1425 * @device_ref: Nondescript pointer to target device1426 *1427 * Return: 802.15.4 status code of action1428 */1429static u8 mcps_data_request(1430 u8 src_addr_mode,1431 u8 dst_address_mode,1432 u16 dst_pan_id,1433 union macaddr *dst_addr,1434 u8 msdu_length,1435 u8 *msdu,1436 u8 msdu_handle,1437 u8 tx_options,1438 struct secspec *security,1439 void *device_ref1440)1441{1442 struct secspec *psec;1443 struct mac_message command;1444 1445 command.command_id = SPI_MCPS_DATA_REQUEST;1446 command.pdata.data_req.src_addr_mode = src_addr_mode;1447 command.pdata.data_req.dst.mode = dst_address_mode;1448 if (dst_address_mode != MAC_MODE_NO_ADDR) {1449 command.pdata.data_req.dst.pan_id[0] = LS_BYTE(dst_pan_id);1450 command.pdata.data_req.dst.pan_id[1] = MS_BYTE(dst_pan_id);1451 if (dst_address_mode == MAC_MODE_SHORT_ADDR) {1452 command.pdata.data_req.dst.address[0] = LS_BYTE(1453 dst_addr->short_address1454 );1455 command.pdata.data_req.dst.address[1] = MS_BYTE(1456 dst_addr->short_address1457 );1458 } else { /* MAC_MODE_LONG_ADDR*/1459 memcpy(1460 command.pdata.data_req.dst.address,1461 dst_addr->ieee_address,1462 81463 );1464 }1465 }1466 command.pdata.data_req.msdu_length = msdu_length;1467 command.pdata.data_req.msdu_handle = msdu_handle;1468 command.pdata.data_req.tx_options = tx_options;1469 memcpy(command.pdata.data_req.msdu, msdu, msdu_length);1470 psec = (struct secspec *)(command.pdata.data_req.msdu + msdu_length);1471 command.length = sizeof(struct mcps_data_request_pset) -1472 MAX_DATA_SIZE + msdu_length;1473 if (!security || security->security_level == 0) {1474 psec->security_level = 0;1475 command.length += 1;1476 } else {1477 *psec = *security;1478 command.length += sizeof(struct secspec);1479 }1480 1481 if (ca8210_spi_transfer(device_ref, &command.command_id,1482 command.length + 2))1483 return IEEE802154_SYSTEM_ERROR;1484 1485 return IEEE802154_SUCCESS;1486}1487 1488/**1489 * mlme_reset_request_sync() - MLME_RESET_request/confirm according to API Spec1490 * @set_default_pib: Set defaults in PIB1491 * @device_ref: Nondescript pointer to target device1492 *1493 * Return: 802.15.4 status code of MLME-RESET.confirm1494 */1495static u8 mlme_reset_request_sync(1496 u8 set_default_pib,1497 void *device_ref1498)1499{1500 u8 status;1501 struct mac_message command, response;1502 struct spi_device *spi = device_ref;1503 1504 command.command_id = SPI_MLME_RESET_REQUEST;1505 command.length = 1;1506 command.pdata.u8param = set_default_pib;1507 1508 if (cascoda_api_downstream(1509 &command.command_id,1510 command.length + 2,1511 &response.command_id,1512 device_ref)) {1513 dev_err(&spi->dev, "cascoda_api_downstream failed\n");1514 return IEEE802154_SYSTEM_ERROR;1515 }1516 1517 if (response.command_id != SPI_MLME_RESET_CONFIRM)1518 return IEEE802154_SYSTEM_ERROR;1519 1520 status = response.pdata.status;1521 1522 /* reset COORD Bit for Channel Filtering as Coordinator */1523 if (CA8210_MAC_WORKAROUNDS && set_default_pib && !status) {1524 status = tdme_setsfr_request_sync(1525 0,1526 CA8210_SFR_MACCON,1527 0,1528 device_ref1529 );1530 }1531 1532 return status;1533}1534 1535/**1536 * mlme_set_request_sync() - MLME_SET_request/confirm according to API Spec1537 * @pib_attribute: Attribute Number1538 * @pib_attribute_index: Index within Attribute if an Array1539 * @pib_attribute_length: Attribute length1540 * @pib_attribute_value: Pointer to Attribute Value1541 * @device_ref: Nondescript pointer to target device1542 *1543 * Return: 802.15.4 status code of MLME-SET.confirm1544 */1545static u8 mlme_set_request_sync(1546 u8 pib_attribute,1547 u8 pib_attribute_index,1548 u8 pib_attribute_length,1549 const void *pib_attribute_value,1550 void *device_ref1551)1552{1553 u8 status;1554 struct mac_message command, response;1555 1556 /* pre-check the validity of pib_attribute values that are not checked1557 * in MAC1558 */1559 if (tdme_checkpibattribute(1560 pib_attribute, pib_attribute_length, pib_attribute_value)) {1561 return IEEE802154_INVALID_PARAMETER;1562 }1563 1564 if (pib_attribute == PHY_CURRENT_CHANNEL) {1565 status = tdme_channelinit(1566 *((u8 *)pib_attribute_value),1567 device_ref1568 );1569 if (status)1570 return status;1571 }1572 1573 if (pib_attribute == PHY_TRANSMIT_POWER) {1574 return tdme_settxpower(1575 *((u8 *)pib_attribute_value),1576 device_ref1577 );1578 }1579 1580 command.command_id = SPI_MLME_SET_REQUEST;1581 command.length = sizeof(struct mlme_set_request_pset) -1582 MAX_ATTRIBUTE_SIZE + pib_attribute_length;1583 command.pdata.set_req.pib_attribute = pib_attribute;1584 command.pdata.set_req.pib_attribute_index = pib_attribute_index;1585 command.pdata.set_req.pib_attribute_length = pib_attribute_length;1586 memcpy(1587 command.pdata.set_req.pib_attribute_value,1588 pib_attribute_value,1589 pib_attribute_length1590 );1591 1592 if (cascoda_api_downstream(1593 &command.command_id,1594 command.length + 2,1595 &response.command_id,1596 device_ref)) {1597 return IEEE802154_SYSTEM_ERROR;1598 }1599 1600 if (response.command_id != SPI_MLME_SET_CONFIRM)1601 return IEEE802154_SYSTEM_ERROR;1602 1603 return response.pdata.status;1604}1605 1606/**1607 * hwme_set_request_sync() - HWME_SET_request/confirm according to API Spec1608 * @hw_attribute: Attribute Number1609 * @hw_attribute_length: Attribute length1610 * @hw_attribute_value: Pointer to Attribute Value1611 * @device_ref: Nondescript pointer to target device1612 *1613 * Return: 802.15.4 status code of HWME-SET.confirm1614 */1615static u8 hwme_set_request_sync(1616 u8 hw_attribute,1617 u8 hw_attribute_length,1618 u8 *hw_attribute_value,1619 void *device_ref1620)1621{1622 struct mac_message command, response;1623 1624 command.command_id = SPI_HWME_SET_REQUEST;1625 command.length = 2 + hw_attribute_length;1626 command.pdata.hwme_set_req.hw_attribute = hw_attribute;1627 command.pdata.hwme_set_req.hw_attribute_length = hw_attribute_length;1628 memcpy(1629 command.pdata.hwme_set_req.hw_attribute_value,1630 hw_attribute_value,1631 hw_attribute_length1632 );1633 1634 if (cascoda_api_downstream(1635 &command.command_id,1636 command.length + 2,1637 &response.command_id,1638 device_ref)) {1639 return IEEE802154_SYSTEM_ERROR;1640 }1641 1642 if (response.command_id != SPI_HWME_SET_CONFIRM)1643 return IEEE802154_SYSTEM_ERROR;1644 1645 return response.pdata.hwme_set_cnf.status;1646}1647 1648/**1649 * hwme_get_request_sync() - HWME_GET_request/confirm according to API Spec1650 * @hw_attribute: Attribute Number1651 * @hw_attribute_length: Attribute length1652 * @hw_attribute_value: Pointer to Attribute Value1653 * @device_ref: Nondescript pointer to target device1654 *1655 * Return: 802.15.4 status code of HWME-GET.confirm1656 */1657static u8 hwme_get_request_sync(1658 u8 hw_attribute,1659 u8 *hw_attribute_length,1660 u8 *hw_attribute_value,1661 void *device_ref1662)1663{1664 struct mac_message command, response;1665 1666 command.command_id = SPI_HWME_GET_REQUEST;1667 command.length = 1;1668 command.pdata.hwme_get_req.hw_attribute = hw_attribute;1669 1670 if (cascoda_api_downstream(1671 &command.command_id,1672 command.length + 2,1673 &response.command_id,1674 device_ref)) {1675 return IEEE802154_SYSTEM_ERROR;1676 }1677 1678 if (response.command_id != SPI_HWME_GET_CONFIRM)1679 return IEEE802154_SYSTEM_ERROR;1680 1681 if (response.pdata.hwme_get_cnf.status == IEEE802154_SUCCESS) {1682 *hw_attribute_length =1683 response.pdata.hwme_get_cnf.hw_attribute_length;1684 memcpy(1685 hw_attribute_value,1686 response.pdata.hwme_get_cnf.hw_attribute_value,1687 *hw_attribute_length1688 );1689 }1690 1691 return response.pdata.hwme_get_cnf.status;1692}1693 1694/* Network driver operation */1695 1696/**1697 * ca8210_async_xmit_complete() - Called to announce that an asynchronous1698 * transmission has finished1699 * @hw: ieee802154_hw of ca8210 that has finished exchange1700 * @msduhandle: Identifier of transmission that has completed1701 * @status: Returned 802.15.4 status code of the transmission1702 *1703 * Return: 0 or linux error code1704 */1705static int ca8210_async_xmit_complete(1706 struct ieee802154_hw *hw,1707 u8 msduhandle,1708 u8 status)1709{1710 struct ca8210_priv *priv = hw->priv;1711 1712 if (priv->nextmsduhandle != msduhandle) {1713 dev_err(1714 &priv->spi->dev,1715 "Unexpected msdu_handle on data confirm, Expected %d, got %d\n",1716 priv->nextmsduhandle,1717 msduhandle1718 );1719 return -EIO;1720 }1721 1722 priv->async_tx_pending = false;1723 priv->nextmsduhandle++;1724 1725 if (status) {1726 dev_err(1727 &priv->spi->dev,1728 "Link transmission unsuccessful, status = %d\n",1729 status1730 );1731 if (status != IEEE802154_TRANSACTION_OVERFLOW) {1732 ieee802154_xmit_error(priv->hw, priv->tx_skb, status);1733 return 0;1734 }1735 }1736 ieee802154_xmit_complete(priv->hw, priv->tx_skb, true);1737 1738 return 0;1739}1740 1741/**1742 * ca8210_skb_rx() - Contructs a properly framed socket buffer from a received1743 * MCPS_DATA_indication1744 * @hw: ieee802154_hw that MCPS_DATA_indication was received by1745 * @len: length of MCPS_DATA_indication1746 * @data_ind: Octet array of MCPS_DATA_indication1747 *1748 * Called by the spi driver whenever a SAP command is received, this function1749 * will ascertain whether the command is of interest to the network driver and1750 * take necessary action.1751 *1752 * Return: 0 or linux error code1753 */1754static int ca8210_skb_rx(1755 struct ieee802154_hw *hw,1756 size_t len,1757 u8 *data_ind1758)1759{1760 struct ieee802154_hdr hdr;1761 int msdulen;1762 int hlen;1763 u8 mpdulinkquality = data_ind[23];1764 struct sk_buff *skb;1765 struct ca8210_priv *priv = hw->priv;1766 1767 /* Allocate mtu size buffer for every rx packet */1768 skb = dev_alloc_skb(IEEE802154_MTU + sizeof(hdr));1769 if (!skb)1770 return -ENOMEM;1771 1772 skb_reserve(skb, sizeof(hdr));1773 1774 msdulen = data_ind[22]; /* msdu_length */1775 if (msdulen > IEEE802154_MTU) {1776 dev_err(1777 &priv->spi->dev,1778 "received erroneously large msdu length!\n"1779 );1780 kfree_skb(skb);1781 return -EMSGSIZE;1782 }1783 dev_dbg(&priv->spi->dev, "skb buffer length = %d\n", msdulen);1784 1785 if (priv->promiscuous)1786 goto copy_payload;1787 1788 /* Populate hdr */1789 hdr.sec.level = data_ind[29 + msdulen];1790 dev_dbg(&priv->spi->dev, "security level: %#03x\n", hdr.sec.level);1791 if (hdr.sec.level > 0) {1792 hdr.sec.key_id_mode = data_ind[30 + msdulen];1793 memcpy(&hdr.sec.extended_src, &data_ind[31 + msdulen], 8);1794 hdr.sec.key_id = data_ind[39 + msdulen];1795 }1796 hdr.source.mode = data_ind[0];1797 dev_dbg(&priv->spi->dev, "srcAddrMode: %#03x\n", hdr.source.mode);1798 hdr.source.pan_id = *(u16 *)&data_ind[1];1799 dev_dbg(&priv->spi->dev, "srcPanId: %#06x\n", hdr.source.pan_id);1800 memcpy(&hdr.source.extended_addr, &data_ind[3], 8);1801 hdr.dest.mode = data_ind[11];1802 dev_dbg(&priv->spi->dev, "dstAddrMode: %#03x\n", hdr.dest.mode);1803 hdr.dest.pan_id = *(u16 *)&data_ind[12];1804 dev_dbg(&priv->spi->dev, "dstPanId: %#06x\n", hdr.dest.pan_id);1805 memcpy(&hdr.dest.extended_addr, &data_ind[14], 8);1806 1807 /* Fill in FC implicitly */1808 hdr.fc.type = 1; /* Data frame */1809 if (hdr.sec.level)1810 hdr.fc.security_enabled = 1;1811 else1812 hdr.fc.security_enabled = 0;1813 if (data_ind[1] != data_ind[12] || data_ind[2] != data_ind[13])1814 hdr.fc.intra_pan = 1;1815 else1816 hdr.fc.intra_pan = 0;1817 hdr.fc.dest_addr_mode = hdr.dest.mode;1818 hdr.fc.source_addr_mode = hdr.source.mode;1819 1820 /* Add hdr to front of buffer */1821 hlen = ieee802154_hdr_push(skb, &hdr);1822 1823 if (hlen < 0) {1824 dev_crit(&priv->spi->dev, "failed to push mac hdr onto skb!\n");1825 kfree_skb(skb);1826 return hlen;1827 }1828 1829 skb_reset_mac_header(skb);1830 skb->mac_len = hlen;1831 1832copy_payload:1833 /* Add <msdulen> bytes of space to the back of the buffer */1834 /* Copy msdu to skb */1835 skb_put_data(skb, &data_ind[29], msdulen);1836 1837 ieee802154_rx_irqsafe(hw, skb, mpdulinkquality);1838 return 0;1839}1840 1841/**1842 * ca8210_net_rx() - Acts upon received SAP commands relevant to the network1843 * driver1844 * @hw: ieee802154_hw that command was received by1845 * @command: Octet array of received command1846 * @len: length of the received command1847 *1848 * Called by the spi driver whenever a SAP command is received, this function1849 * will ascertain whether the command is of interest to the network driver and1850 * take necessary action.1851 *1852 * Return: 0 or linux error code1853 */1854static int ca8210_net_rx(struct ieee802154_hw *hw, u8 *command, size_t len)1855{1856 struct ca8210_priv *priv = hw->priv;1857 unsigned long flags;1858 u8 status;1859 1860 dev_dbg(&priv->spi->dev, "%s: CmdID = %d\n", __func__, command[0]);1861 1862 if (command[0] == SPI_MCPS_DATA_INDICATION) {1863 /* Received data */1864 spin_lock_irqsave(&priv->lock, flags);1865 if (command[26] == priv->last_dsn) {1866 dev_dbg(1867 &priv->spi->dev,1868 "DSN %d resend received, ignoring...\n",1869 command[26]1870 );1871 spin_unlock_irqrestore(&priv->lock, flags);1872 return 0;1873 }1874 priv->last_dsn = command[26];1875 spin_unlock_irqrestore(&priv->lock, flags);1876 return ca8210_skb_rx(hw, len - 2, command + 2);1877 } else if (command[0] == SPI_MCPS_DATA_CONFIRM) {1878 status = command[3];1879 if (priv->async_tx_pending) {1880 return ca8210_async_xmit_complete(1881 hw,1882 command[2],1883 status1884 );1885 }1886 }1887 1888 return 0;1889}1890 1891/**1892 * ca8210_skb_tx() - Transmits a given socket buffer using the ca82101893 * @skb: Socket buffer to transmit1894 * @msduhandle: Data identifier to pass to the 802.15.4 MAC1895 * @priv: Pointer to private data section of target ca82101896 *1897 * Return: 0 or linux error code1898 */1899static int ca8210_skb_tx(1900 struct sk_buff *skb,1901 u8 msduhandle,1902 struct ca8210_priv *priv1903)1904{1905 struct ieee802154_hdr header = { };1906 struct secspec secspec;1907 int mac_len, status;1908 1909 dev_dbg(&priv->spi->dev, "%s called\n", __func__);1910 1911 /* Get addressing info from skb - ieee802154 layer creates a full1912 * packet1913 */1914 mac_len = ieee802154_hdr_peek_addrs(skb, &header);1915 if (mac_len < 0)1916 return mac_len;1917 1918 secspec.security_level = header.sec.level;1919 secspec.key_id_mode = header.sec.key_id_mode;1920 if (secspec.key_id_mode == 2)1921 memcpy(secspec.key_source, &header.sec.short_src, 4);1922 else if (secspec.key_id_mode == 3)1923 memcpy(secspec.key_source, &header.sec.extended_src, 8);1924 secspec.key_index = header.sec.key_id;1925 1926 /* Pass to Cascoda API */1927 status = mcps_data_request(1928 header.source.mode,1929 header.dest.mode,1930 header.dest.pan_id,1931 (union macaddr *)&header.dest.extended_addr,1932 skb->len - mac_len,1933 &skb->data[mac_len],1934 msduhandle,1935 header.fc.ack_request,1936 &secspec,1937 priv->spi1938 );1939 return link_to_linux_err(status);1940}1941 1942/**1943 * ca8210_start() - Starts the network driver1944 * @hw: ieee802154_hw of ca8210 being started1945 *1946 * Return: 0 or linux error code1947 */1948static int ca8210_start(struct ieee802154_hw *hw)1949{1950 int status;1951 u8 rx_on_when_idle;1952 u8 lqi_threshold = 0;1953 struct ca8210_priv *priv = hw->priv;1954 1955 priv->last_dsn = -1;1956 /* Turn receiver on when idle for now just to test rx */1957 rx_on_when_idle = 1;1958 status = mlme_set_request_sync(1959 MAC_RX_ON_WHEN_IDLE,1960 0,1961 1,1962 &rx_on_when_idle,1963 priv->spi1964 );1965 if (status) {1966 dev_crit(1967 &priv->spi->dev,1968 "Setting rx_on_when_idle failed, status = %d\n",1969 status1970 );1971 return link_to_linux_err(status);1972 }1973 status = hwme_set_request_sync(1974 HWME_LQILIMIT,1975 1,1976 &lqi_threshold,1977 priv->spi1978 );1979 if (status) {1980 dev_crit(1981 &priv->spi->dev,1982 "Setting lqilimit failed, status = %d\n",1983 status1984 );1985 return link_to_linux_err(status);1986 }1987 1988 return 0;1989}1990 1991/**1992 * ca8210_stop() - Stops the network driver1993 * @hw: ieee802154_hw of ca8210 being stopped1994 *1995 * Return: 0 or linux error code1996 */1997static void ca8210_stop(struct ieee802154_hw *hw)1998{1999}2000 2001/**2002 * ca8210_xmit_async() - Asynchronously transmits a given socket buffer using2003 * the ca82102004 * @hw: ieee802154_hw of ca8210 to transmit from2005 * @skb: Socket buffer to transmit2006 *2007 * Return: 0 or linux error code2008 */2009static int ca8210_xmit_async(struct ieee802154_hw *hw, struct sk_buff *skb)2010{2011 struct ca8210_priv *priv = hw->priv;2012 int status;2013 2014 dev_dbg(&priv->spi->dev, "calling %s\n", __func__);2015 2016 priv->tx_skb = skb;2017 priv->async_tx_pending = true;2018 status = ca8210_skb_tx(skb, priv->nextmsduhandle, priv);2019 return status;2020}2021 2022/**2023 * ca8210_get_ed() - Returns the measured energy on the current channel at this2024 * instant in time2025 * @hw: ieee802154_hw of target ca82102026 * @level: Measured Energy Detect level2027 *2028 * Return: 0 or linux error code2029 */2030static int ca8210_get_ed(struct ieee802154_hw *hw, u8 *level)2031{2032 u8 lenvar;2033 struct ca8210_priv *priv = hw->priv;2034 2035 return link_to_linux_err(2036 hwme_get_request_sync(HWME_EDVALUE, &lenvar, level, priv->spi)2037 );2038}2039 2040/**2041 * ca8210_set_channel() - Sets the current operating 802.15.4 channel of the2042 * ca82102043 * @hw: ieee802154_hw of target ca82102044 * @page: Channel page to set2045 * @channel: Channel number to set2046 *2047 * Return: 0 or linux error code2048 */2049static int ca8210_set_channel(2050 struct ieee802154_hw *hw,2051 u8 page,2052 u8 channel2053)2054{2055 u8 status;2056 struct ca8210_priv *priv = hw->priv;2057 2058 status = mlme_set_request_sync(2059 PHY_CURRENT_CHANNEL,2060 0,2061 1,2062 &channel,2063 priv->spi2064 );2065 if (status) {2066 dev_err(2067 &priv->spi->dev,2068 "error setting channel, MLME-SET.confirm status = %d\n",2069 status2070 );2071 }2072 return link_to_linux_err(status);2073}2074 2075/**2076 * ca8210_set_hw_addr_filt() - Sets the address filtering parameters of the2077 * ca82102078 * @hw: ieee802154_hw of target ca82102079 * @filt: Filtering parameters2080 * @changed: Bitmap representing which parameters to change2081 *2082 * Effectively just sets the actual addressing information identifying this node2083 * as all filtering is performed by the ca8210 as detailed in the IEEE 802.15.42084 * 2006 specification.2085 *2086 * Return: 0 or linux error code2087 */2088static int ca8210_set_hw_addr_filt(2089 struct ieee802154_hw *hw,2090 struct ieee802154_hw_addr_filt *filt,2091 unsigned long changed2092)2093{2094 u8 status = 0;2095 struct ca8210_priv *priv = hw->priv;2096 2097 if (changed & IEEE802154_AFILT_PANID_CHANGED) {2098 status = mlme_set_request_sync(2099 MAC_PAN_ID,2100 0,2101 2,2102 &filt->pan_id, priv->spi2103 );2104 if (status) {2105 dev_err(2106 &priv->spi->dev,2107 "error setting pan id, MLME-SET.confirm status = %d",2108 status2109 );2110 return link_to_linux_err(status);2111 }2112 }2113 if (changed & IEEE802154_AFILT_SADDR_CHANGED) {2114 status = mlme_set_request_sync(2115 MAC_SHORT_ADDRESS,2116 0,2117 2,2118 &filt->short_addr, priv->spi2119 );2120 if (status) {2121 dev_err(2122 &priv->spi->dev,2123 "error setting short address, MLME-SET.confirm status = %d",2124 status2125 );2126 return link_to_linux_err(status);2127 }2128 }2129 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {2130 status = mlme_set_request_sync(2131 NS_IEEE_ADDRESS,2132 0,2133 8,2134 &filt->ieee_addr,2135 priv->spi2136 );2137 if (status) {2138 dev_err(2139 &priv->spi->dev,2140 "error setting ieee address, MLME-SET.confirm status = %d",2141 status2142 );2143 return link_to_linux_err(status);2144 }2145 }2146 /* TODO: Should use MLME_START to set coord bit? */2147 return 0;2148}2149 2150/**2151 * ca8210_set_tx_power() - Sets the transmit power of the ca82102152 * @hw: ieee802154_hw of target ca82102153 * @mbm: Transmit power in mBm (dBm*100)2154 *2155 * Return: 0 or linux error code2156 */2157static int ca8210_set_tx_power(struct ieee802154_hw *hw, s32 mbm)2158{2159 struct ca8210_priv *priv = hw->priv;2160 2161 mbm /= 100;2162 return link_to_linux_err(2163 mlme_set_request_sync(PHY_TRANSMIT_POWER, 0, 1, &mbm, priv->spi)2164 );2165}2166 2167/**2168 * ca8210_set_cca_mode() - Sets the clear channel assessment mode of the ca82102169 * @hw: ieee802154_hw of target ca82102170 * @cca: CCA mode to set2171 *2172 * Return: 0 or linux error code2173 */2174static int ca8210_set_cca_mode(2175 struct ieee802154_hw *hw,2176 const struct wpan_phy_cca *cca2177)2178{2179 u8 status;2180 u8 cca_mode;2181 struct ca8210_priv *priv = hw->priv;2182 2183 cca_mode = cca->mode & 3;2184 if (cca_mode == 3 && cca->opt == NL802154_CCA_OPT_ENERGY_CARRIER_OR) {2185 /* cca_mode 0 == CS OR ED, 3 == CS AND ED */2186 cca_mode = 0;2187 }2188 status = mlme_set_request_sync(2189 PHY_CCA_MODE,2190 0,2191 1,2192 &cca_mode,2193 priv->spi2194 );2195 if (status) {2196 dev_err(2197 &priv->spi->dev,2198 "error setting cca mode, MLME-SET.confirm status = %d",2199 status2200 );2201 }2202 return link_to_linux_err(status);2203}2204 2205/**2206 * ca8210_set_cca_ed_level() - Sets the CCA ED level of the ca82102207 * @hw: ieee802154_hw of target ca82102208 * @level: ED level to set (in mbm)2209 *2210 * Sets the minimum threshold of measured energy above which the ca8210 will2211 * back off and retry a transmission.2212 *2213 * Return: 0 or linux error code2214 */2215static int ca8210_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)2216{2217 u8 status;2218 u8 ed_threshold = (level / 100) * 2 + 256;2219 struct ca8210_priv *priv = hw->priv;2220 2221 status = hwme_set_request_sync(2222 HWME_EDTHRESHOLD,2223 1,2224 &ed_threshold,2225 priv->spi2226 );2227 if (status) {2228 dev_err(2229 &priv->spi->dev,2230 "error setting ed threshold, HWME-SET.confirm status = %d",2231 status2232 );2233 }2234 return link_to_linux_err(status);2235}2236 2237/**2238 * ca8210_set_csma_params() - Sets the CSMA parameters of the ca82102239 * @hw: ieee802154_hw of target ca82102240 * @min_be: Minimum backoff exponent when backing off a transmission2241 * @max_be: Maximum backoff exponent when backing off a transmission2242 * @retries: Number of times to retry after backing off2243 *2244 * Return: 0 or linux error code2245 */2246static int ca8210_set_csma_params(2247 struct ieee802154_hw *hw,2248 u8 min_be,2249 u8 max_be,2250 u8 retries2251)2252{2253 u8 status;2254 struct ca8210_priv *priv = hw->priv;2255 2256 status = mlme_set_request_sync(MAC_MIN_BE, 0, 1, &min_be, priv->spi);2257 if (status) {2258 dev_err(2259 &priv->spi->dev,2260 "error setting min be, MLME-SET.confirm status = %d",2261 status2262 );2263 return link_to_linux_err(status);2264 }2265 status = mlme_set_request_sync(MAC_MAX_BE, 0, 1, &max_be, priv->spi);2266 if (status) {2267 dev_err(2268 &priv->spi->dev,2269 "error setting max be, MLME-SET.confirm status = %d",2270 status2271 );2272 return link_to_linux_err(status);2273 }2274 status = mlme_set_request_sync(2275 MAC_MAX_CSMA_BACKOFFS,2276 0,2277 1,2278 &retries,2279 priv->spi2280 );2281 if (status) {2282 dev_err(2283 &priv->spi->dev,2284 "error setting max csma backoffs, MLME-SET.confirm status = %d",2285 status2286 );2287 }2288 return link_to_linux_err(status);2289}2290 2291/**2292 * ca8210_set_frame_retries() - Sets the maximum frame retries of the ca82102293 * @hw: ieee802154_hw of target ca82102294 * @retries: Number of retries2295 *2296 * Sets the number of times to retry a transmission if no acknowledgment was2297 * received from the other end when one was requested.2298 *2299 * Return: 0 or linux error code2300 */2301static int ca8210_set_frame_retries(struct ieee802154_hw *hw, s8 retries)2302{2303 u8 status;2304 struct ca8210_priv *priv = hw->priv;2305 2306 status = mlme_set_request_sync(2307 MAC_MAX_FRAME_RETRIES,2308 0,2309 1,2310 &retries,2311 priv->spi2312 );2313 if (status) {2314 dev_err(2315 &priv->spi->dev,2316 "error setting frame retries, MLME-SET.confirm status = %d",2317 status2318 );2319 }2320 return link_to_linux_err(status);2321}2322 2323static int ca8210_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)2324{2325 u8 status;2326 struct ca8210_priv *priv = hw->priv;2327 2328 status = mlme_set_request_sync(2329 MAC_PROMISCUOUS_MODE,2330 0,2331 1,2332 (const void *)&on,2333 priv->spi2334 );2335 if (status) {2336 dev_err(2337 &priv->spi->dev,2338 "error setting promiscuous mode, MLME-SET.confirm status = %d",2339 status2340 );2341 } else {2342 priv->promiscuous = on;2343 }2344 return link_to_linux_err(status);2345}2346 2347static const struct ieee802154_ops ca8210_phy_ops = {2348 .start = ca8210_start,2349 .stop = ca8210_stop,2350 .xmit_async = ca8210_xmit_async,2351 .ed = ca8210_get_ed,2352 .set_channel = ca8210_set_channel,2353 .set_hw_addr_filt = ca8210_set_hw_addr_filt,2354 .set_txpower = ca8210_set_tx_power,2355 .set_cca_mode = ca8210_set_cca_mode,2356 .set_cca_ed_level = ca8210_set_cca_ed_level,2357 .set_csma_params = ca8210_set_csma_params,2358 .set_frame_retries = ca8210_set_frame_retries,2359 .set_promiscuous_mode = ca8210_set_promiscuous_mode2360};2361 2362/* Test/EVBME Interface */2363 2364/**2365 * ca8210_test_int_open() - Opens the test interface to the userspace2366 * @inodp: inode representation of file interface2367 * @filp: file interface2368 *2369 * Return: 0 or linux error code2370 */2371static int ca8210_test_int_open(struct inode *inodp, struct file *filp)2372{2373 struct ca8210_priv *priv = inodp->i_private;2374 2375 filp->private_data = priv;2376 return 0;2377}2378 2379/**2380 * ca8210_test_check_upstream() - Checks a command received from the upstream2381 * testing interface for required action2382 * @buf: Buffer containing command to check2383 * @device_ref: Nondescript pointer to target device2384 *2385 * Return: 0 or linux error code2386 */2387static int ca8210_test_check_upstream(u8 *buf, void *device_ref)2388{2389 int ret;2390 u8 response[CA8210_SPI_BUF_SIZE];2391 2392 if (buf[0] == SPI_MLME_SET_REQUEST) {2393 ret = tdme_checkpibattribute(buf[2], buf[4], buf + 5);2394 if (ret) {2395 response[0] = SPI_MLME_SET_CONFIRM;2396 response[1] = 3;2397 response[2] = IEEE802154_INVALID_PARAMETER;2398 response[3] = buf[2];2399 response[4] = buf[3];2400 if (cascoda_api_upstream)2401 cascoda_api_upstream(response, 5, device_ref);2402 return ret;2403 }2404 }2405 if (buf[0] == SPI_MLME_ASSOCIATE_REQUEST) {2406 return tdme_channelinit(buf[2], device_ref);2407 } else if (buf[0] == SPI_MLME_START_REQUEST) {2408 return tdme_channelinit(buf[4], device_ref);2409 } else if (2410 (buf[0] == SPI_MLME_SET_REQUEST) &&2411 (buf[2] == PHY_CURRENT_CHANNEL)2412 ) {2413 return tdme_channelinit(buf[5], device_ref);2414 } else if (2415 (buf[0] == SPI_TDME_SET_REQUEST) &&2416 (buf[2] == TDME_CHANNEL)2417 ) {2418 return tdme_channelinit(buf[4], device_ref);2419 } else if (2420 (CA8210_MAC_WORKAROUNDS) &&2421 (buf[0] == SPI_MLME_RESET_REQUEST) &&2422 (buf[2] == 1)2423 ) {2424 /* reset COORD Bit for Channel Filtering as Coordinator */2425 return tdme_setsfr_request_sync(2426 0,2427 CA8210_SFR_MACCON,2428 0,2429 device_ref2430 );2431 }2432 return 0;2433} /* End of EVBMECheckSerialCommand() */2434 2435/**2436 * ca8210_test_int_user_write() - Called by a process in userspace to send a2437 * message to the ca8210 drivers2438 * @filp: file interface2439 * @in_buf: Buffer containing message to write2440 * @len: length of message2441 * @off: file offset2442 *2443 * Return: 0 or linux error code2444 */2445static ssize_t ca8210_test_int_user_write(2446 struct file *filp,2447 const char __user *in_buf,2448 size_t len,2449 loff_t *off2450)2451{2452 int ret;2453 struct ca8210_priv *priv = filp->private_data;2454 u8 command[CA8210_SPI_BUF_SIZE];2455 2456 memset(command, SPI_IDLE, 6);2457 if (len > CA8210_SPI_BUF_SIZE || len < 2) {2458 dev_warn(2459 &priv->spi->dev,2460 "userspace requested erroneous write length (%zu)\n",2461 len2462 );2463 return -EBADE;2464 }2465 2466 ret = copy_from_user(command, in_buf, len);2467 if (ret) {2468 dev_err(2469 &priv->spi->dev,2470 "%d bytes could not be copied from userspace\n",2471 ret2472 );2473 return -EIO;2474 }2475 if (len != command[1] + 2) {2476 dev_err(2477 &priv->spi->dev,2478 "write len does not match packet length field\n"2479 );2480 return -EBADE;2481 }2482 2483 ret = ca8210_test_check_upstream(command, priv->spi);2484 if (ret == 0) {2485 ret = ca8210_spi_exchange(2486 command,2487 command[1] + 2,2488 NULL,2489 priv->spi2490 );2491 if (ret < 0) {2492 /* effectively 0 bytes were written successfully */2493 dev_err(2494 &priv->spi->dev,2495 "spi exchange failed\n"2496 );2497 return ret;2498 }2499 if (command[0] & SPI_SYN)2500 priv->sync_down++;2501 }2502 2503 return len;2504}2505 2506/**2507 * ca8210_test_int_user_read() - Called by a process in userspace to read a2508 * message from the ca8210 drivers2509 * @filp: file interface2510 * @buf: Buffer to write message to2511 * @len: length of message to read (ignored)2512 * @offp: file offset2513 *2514 * If the O_NONBLOCK flag was set when opening the file then this function will2515 * not block, i.e. it will return if the fifo is empty. Otherwise the function2516 * will block, i.e. wait until new data arrives.2517 *2518 * Return: number of bytes read2519 */2520static ssize_t ca8210_test_int_user_read(2521 struct file *filp,2522 char __user *buf,2523 size_t len,2524 loff_t *offp2525)2526{2527 int i, cmdlen;2528 struct ca8210_priv *priv = filp->private_data;2529 unsigned char *fifo_buffer;2530 unsigned long bytes_not_copied;2531 2532 if (filp->f_flags & O_NONBLOCK) {2533 /* Non-blocking mode */2534 if (kfifo_is_empty(&priv->test.up_fifo))2535 return 0;2536 } else {2537 /* Blocking mode */2538 wait_event_interruptible(2539 priv->test.readq,2540 !kfifo_is_empty(&priv->test.up_fifo)2541 );2542 }2543 2544 if (kfifo_out(&priv->test.up_fifo, &fifo_buffer, 4) != 4) {2545 dev_err(2546 &priv->spi->dev,2547 "test_interface: Wrong number of elements popped from upstream fifo\n"2548 );2549 return 0;2550 }2551 cmdlen = fifo_buffer[1];2552 bytes_not_copied = cmdlen + 2;2553 2554 bytes_not_copied = copy_to_user(buf, fifo_buffer, bytes_not_copied);2555 if (bytes_not_copied > 0) {2556 dev_err(2557 &priv->spi->dev,2558 "%lu bytes could not be copied to user space!\n",2559 bytes_not_copied2560 );2561 }2562 2563 dev_dbg(&priv->spi->dev, "test_interface: Cmd len = %d\n", cmdlen);2564 2565 dev_dbg(&priv->spi->dev, "test_interface: Read\n");2566 for (i = 0; i < cmdlen + 2; i++)2567 dev_dbg(&priv->spi->dev, "%#03x\n", fifo_buffer[i]);2568 2569 kfree(fifo_buffer);2570 2571 return cmdlen + 2;2572}2573 2574/**2575 * ca8210_test_int_ioctl() - Called by a process in userspace to enact an2576 * arbitrary action2577 * @filp: file interface2578 * @ioctl_num: which action to enact2579 * @ioctl_param: arbitrary parameter for the action2580 *2581 * Return: status2582 */2583static long ca8210_test_int_ioctl(2584 struct file *filp,2585 unsigned int ioctl_num,2586 unsigned long ioctl_param2587)2588{2589 struct ca8210_priv *priv = filp->private_data;2590 2591 switch (ioctl_num) {2592 case CA8210_IOCTL_HARD_RESET:2593 ca8210_reset_send(priv->spi, ioctl_param);2594 break;2595 default:2596 break;2597 }2598 return 0;2599}2600 2601/**2602 * ca8210_test_int_poll() - Called by a process in userspace to determine which2603 * actions are currently possible for the file2604 * @filp: file interface2605 * @ptable: poll table2606 *2607 * Return: set of poll return flags2608 */2609static __poll_t ca8210_test_int_poll(2610 struct file *filp,2611 struct poll_table_struct *ptable2612)2613{2614 __poll_t return_flags = 0;2615 struct ca8210_priv *priv = filp->private_data;2616 2617 poll_wait(filp, &priv->test.readq, ptable);2618 if (!kfifo_is_empty(&priv->test.up_fifo))2619 return_flags |= (EPOLLIN | EPOLLRDNORM);2620 if (wait_event_interruptible(2621 priv->test.readq,2622 !kfifo_is_empty(&priv->test.up_fifo))) {2623 return EPOLLERR;2624 }2625 return return_flags;2626}2627 2628static const struct file_operations test_int_fops = {2629 .read = ca8210_test_int_user_read,2630 .write = ca8210_test_int_user_write,2631 .open = ca8210_test_int_open,2632 .release = NULL,2633 .unlocked_ioctl = ca8210_test_int_ioctl,2634 .poll = ca8210_test_int_poll2635};2636 2637/* Init/Deinit */2638 2639/**2640 * ca8210_get_platform_data() - Populate a ca8210_platform_data object2641 * @spi_device: Pointer to ca8210 spi device object to get data for2642 * @pdata: Pointer to ca8210_platform_data object to populate2643 *2644 * Return: 0 or linux error code2645 */2646static int ca8210_get_platform_data(2647 struct spi_device *spi_device,2648 struct ca8210_platform_data *pdata2649)2650{2651 int ret = 0;2652 2653 if (!spi_device->dev.of_node)2654 return -EINVAL;2655 2656 pdata->extclockenable = of_property_read_bool(2657 spi_device->dev.of_node,2658 "extclock-enable"2659 );2660 if (pdata->extclockenable) {2661 ret = of_property_read_u32(2662 spi_device->dev.of_node,2663 "extclock-freq",2664 &pdata->extclockfreq2665 );2666 if (ret < 0)2667 return ret;2668 2669 ret = of_property_read_u32(2670 spi_device->dev.of_node,2671 "extclock-gpio",2672 &pdata->extclockgpio2673 );2674 }2675 2676 return ret;2677}2678 2679/**2680 * ca8210_config_extern_clk() - Configure the external clock provided by the2681 * ca82102682 * @pdata: Pointer to ca8210_platform_data containing clock parameters2683 * @spi: Pointer to target ca8210 spi device2684 * @on: True to turn the clock on, false to turn off2685 *2686 * The external clock is configured with a frequency and output pin taken from2687 * the platform data.2688 *2689 * Return: 0 or linux error code2690 */2691static int ca8210_config_extern_clk(2692 struct ca8210_platform_data *pdata,2693 struct spi_device *spi,2694 bool on2695)2696{2697 u8 clkparam[2];2698 2699 if (on) {2700 dev_info(&spi->dev, "Switching external clock on\n");2701 switch (pdata->extclockfreq) {2702 case SIXTEEN_MHZ:2703 clkparam[0] = 1;2704 break;2705 case EIGHT_MHZ:2706 clkparam[0] = 2;2707 break;2708 case FOUR_MHZ:2709 clkparam[0] = 3;2710 break;2711 case TWO_MHZ:2712 clkparam[0] = 4;2713 break;2714 case ONE_MHZ:2715 clkparam[0] = 5;2716 break;2717 default:2718 dev_crit(&spi->dev, "Invalid extclock-freq\n");2719 return -EINVAL;2720 }2721 clkparam[1] = pdata->extclockgpio;2722 } else {2723 dev_info(&spi->dev, "Switching external clock off\n");2724 clkparam[0] = 0; /* off */2725 clkparam[1] = 0;2726 }2727 return link_to_linux_err(2728 hwme_set_request_sync(HWME_SYSCLKOUT, 2, clkparam, spi)2729 );2730}2731 2732/**2733 * ca8210_register_ext_clock() - Register ca8210's external clock with kernel2734 * @spi: Pointer to target ca8210 spi device2735 *2736 * Return: 0 or linux error code2737 */2738static int ca8210_register_ext_clock(struct spi_device *spi)2739{2740 struct device_node *np = spi->dev.of_node;2741 struct ca8210_priv *priv = spi_get_drvdata(spi);2742 struct ca8210_platform_data *pdata = spi->dev.platform_data;2743 2744 if (!np)2745 return -EFAULT;2746 2747 priv->clk = clk_register_fixed_rate(2748 &spi->dev,2749 np->name,2750 NULL,2751 0,2752 pdata->extclockfreq2753 );2754 2755 if (IS_ERR(priv->clk)) {2756 dev_crit(&spi->dev, "Failed to register external clk\n");2757 return PTR_ERR(priv->clk);2758 }2759 2760 return of_clk_add_provider(np, of_clk_src_simple_get, priv->clk);2761}2762 2763/**2764 * ca8210_unregister_ext_clock() - Unregister ca8210's external clock with2765 * kernel2766 * @spi: Pointer to target ca8210 spi device2767 */2768static void ca8210_unregister_ext_clock(struct spi_device *spi)2769{2770 struct ca8210_priv *priv = spi_get_drvdata(spi);2771 2772 if (IS_ERR_OR_NULL(priv->clk))2773 return;2774 2775 of_clk_del_provider(spi->dev.of_node);2776 clk_unregister(priv->clk);2777 dev_info(&spi->dev, "External clock unregistered\n");2778}2779 2780/**2781 * ca8210_reset_init() - Initialise the reset input to the ca82102782 * @spi: Pointer to target ca8210 spi device2783 *2784 * Return: 0 or linux error code2785 */2786static int ca8210_reset_init(struct spi_device *spi)2787{2788 int ret;2789 struct ca8210_platform_data *pdata = spi->dev.platform_data;2790 2791 pdata->gpio_reset = of_get_named_gpio(2792 spi->dev.of_node,2793 "reset-gpio",2794 02795 );2796 2797 ret = gpio_direction_output(pdata->gpio_reset, 1);2798 if (ret < 0) {2799 dev_crit(2800 &spi->dev,2801 "Reset GPIO %d did not set to output mode\n",2802 pdata->gpio_reset2803 );2804 }2805 2806 return ret;2807}2808 2809/**2810 * ca8210_interrupt_init() - Initialise the irq output from the ca82102811 * @spi: Pointer to target ca8210 spi device2812 *2813 * Return: 0 or linux error code2814 */2815static int ca8210_interrupt_init(struct spi_device *spi)2816{2817 int ret;2818 struct ca8210_platform_data *pdata = spi->dev.platform_data;2819 2820 pdata->gpio_irq = of_get_named_gpio(2821 spi->dev.of_node,2822 "irq-gpio",2823 02824 );2825 2826 pdata->irq_id = gpio_to_irq(pdata->gpio_irq);2827 if (pdata->irq_id < 0) {2828 dev_crit(2829 &spi->dev,2830 "Could not get irq for gpio pin %d\n",2831 pdata->gpio_irq2832 );2833 gpio_free(pdata->gpio_irq);2834 return pdata->irq_id;2835 }2836 2837 ret = request_irq(2838 pdata->irq_id,2839 ca8210_interrupt_handler,2840 IRQF_TRIGGER_FALLING,2841 "ca8210-irq",2842 spi_get_drvdata(spi)2843 );2844 if (ret) {2845 dev_crit(&spi->dev, "request_irq %d failed\n", pdata->irq_id);2846 gpio_free(pdata->gpio_irq);2847 }2848 2849 return ret;2850}2851 2852/**2853 * ca8210_dev_com_init() - Initialise the spi communication component2854 * @priv: Pointer to private data structure2855 *2856 * Return: 0 or linux error code2857 */2858static int ca8210_dev_com_init(struct ca8210_priv *priv)2859{2860 priv->mlme_workqueue = alloc_ordered_workqueue("MLME work queue", 0);2861 if (!priv->mlme_workqueue) {2862 dev_crit(&priv->spi->dev, "alloc of mlme_workqueue failed!\n");2863 return -ENOMEM;2864 }2865 2866 priv->irq_workqueue = alloc_ordered_workqueue("ca8210 irq worker", 0);2867 if (!priv->irq_workqueue) {2868 dev_crit(&priv->spi->dev, "alloc of irq_workqueue failed!\n");2869 destroy_workqueue(priv->mlme_workqueue);2870 return -ENOMEM;2871 }2872 2873 return 0;2874}2875 2876/**2877 * ca8210_dev_com_clear() - Deinitialise the spi communication component2878 * @priv: Pointer to private data structure2879 */2880static void ca8210_dev_com_clear(struct ca8210_priv *priv)2881{2882 destroy_workqueue(priv->mlme_workqueue);2883 destroy_workqueue(priv->irq_workqueue);2884}2885 2886#define CA8210_MAX_TX_POWERS (9)2887static const s32 ca8210_tx_powers[CA8210_MAX_TX_POWERS] = {2888 800, 700, 600, 500, 400, 300, 200, 100, 02889};2890 2891#define CA8210_MAX_ED_LEVELS (21)2892static const s32 ca8210_ed_levels[CA8210_MAX_ED_LEVELS] = {2893 -10300, -10250, -10200, -10150, -10100, -10050, -10000, -9950, -9900,2894 -9850, -9800, -9750, -9700, -9650, -9600, -9550, -9500, -9450, -9400,2895 -9350, -93002896};2897 2898/**2899 * ca8210_hw_setup() - Populate the ieee802154_hw phy attributes with the2900 * ca8210's defaults2901 * @ca8210_hw: Pointer to ieee802154_hw to populate2902 */2903static void ca8210_hw_setup(struct ieee802154_hw *ca8210_hw)2904{2905 /* Support channels 11-26 */2906 ca8210_hw->phy->supported.channels[0] = CA8210_VALID_CHANNELS;2907 ca8210_hw->phy->supported.tx_powers_size = CA8210_MAX_TX_POWERS;2908 ca8210_hw->phy->supported.tx_powers = ca8210_tx_powers;2909 ca8210_hw->phy->supported.cca_ed_levels_size = CA8210_MAX_ED_LEVELS;2910 ca8210_hw->phy->supported.cca_ed_levels = ca8210_ed_levels;2911 ca8210_hw->phy->current_channel = 18;2912 ca8210_hw->phy->current_page = 0;2913 ca8210_hw->phy->transmit_power = 800;2914 ca8210_hw->phy->cca.mode = NL802154_CCA_ENERGY_CARRIER;2915 ca8210_hw->phy->cca.opt = NL802154_CCA_OPT_ENERGY_CARRIER_AND;2916 ca8210_hw->phy->cca_ed_level = -9800;2917 ca8210_hw->phy->symbol_duration = 16;2918 ca8210_hw->phy->lifs_period = 40 * ca8210_hw->phy->symbol_duration;2919 ca8210_hw->phy->sifs_period = 12 * ca8210_hw->phy->symbol_duration;2920 ca8210_hw->flags =2921 IEEE802154_HW_AFILT |2922 IEEE802154_HW_OMIT_CKSUM |2923 IEEE802154_HW_FRAME_RETRIES |2924 IEEE802154_HW_PROMISCUOUS |2925 IEEE802154_HW_CSMA_PARAMS;2926 ca8210_hw->phy->flags =2927 WPAN_PHY_FLAG_TXPOWER |2928 WPAN_PHY_FLAG_CCA_ED_LEVEL |2929 WPAN_PHY_FLAG_CCA_MODE |2930 WPAN_PHY_FLAG_DATAGRAMS_ONLY;2931}2932 2933/**2934 * ca8210_test_interface_init() - Initialise the test file interface2935 * @priv: Pointer to private data structure2936 *2937 * Provided as an alternative to the standard linux network interface, the test2938 * interface exposes a file in the filesystem (ca8210_test) that allows2939 * 802.15.4 SAP Commands and Cascoda EVBME commands to be sent directly to2940 * the stack.2941 *2942 * Return: 0 or linux error code2943 */2944static int ca8210_test_interface_init(struct ca8210_priv *priv)2945{2946 struct ca8210_test *test = &priv->test;2947 char node_name[32];2948 2949 snprintf(2950 node_name,2951 sizeof(node_name),2952 "ca8210@%d_%d",2953 priv->spi->controller->bus_num,2954 spi_get_chipselect(priv->spi, 0)2955 );2956 2957 test->ca8210_dfs_spi_int = debugfs_create_file(2958 node_name,2959 0600, /* S_IRUSR | S_IWUSR */2960 NULL,2961 priv,2962 &test_int_fops2963 );2964 2965 debugfs_create_symlink("ca8210", NULL, node_name);2966 init_waitqueue_head(&test->readq);2967 return kfifo_alloc(2968 &test->up_fifo,2969 CA8210_TEST_INT_FIFO_SIZE,2970 GFP_KERNEL2971 );2972}2973 2974/**2975 * ca8210_test_interface_clear() - Deinitialise the test file interface2976 * @priv: Pointer to private data structure2977 */2978static void ca8210_test_interface_clear(struct ca8210_priv *priv)2979{2980 struct ca8210_test *test = &priv->test;2981 2982 debugfs_remove(test->ca8210_dfs_spi_int);2983 kfifo_free(&test->up_fifo);2984 dev_info(&priv->spi->dev, "Test interface removed\n");2985}2986 2987/**2988 * ca8210_remove() - Shut down a ca8210 upon being disconnected2989 * @spi_device: Pointer to spi device data structure2990 *2991 * Return: 0 or linux error code2992 */2993static void ca8210_remove(struct spi_device *spi_device)2994{2995 struct ca8210_priv *priv;2996 struct ca8210_platform_data *pdata;2997 2998 dev_info(&spi_device->dev, "Removing ca8210\n");2999 3000 pdata = spi_device->dev.platform_data;3001 if (pdata) {3002 if (pdata->extclockenable) {3003 ca8210_unregister_ext_clock(spi_device);3004 ca8210_config_extern_clk(pdata, spi_device, 0);3005 }3006 free_irq(pdata->irq_id, spi_device->dev.driver_data);3007 kfree(pdata);3008 spi_device->dev.platform_data = NULL;3009 }3010 /* get spi_device private data */3011 priv = spi_get_drvdata(spi_device);3012 if (priv) {3013 dev_info(3014 &spi_device->dev,3015 "sync_down = %d, sync_up = %d\n",3016 priv->sync_down,3017 priv->sync_up3018 );3019 ca8210_dev_com_clear(spi_device->dev.driver_data);3020 if (priv->hw) {3021 if (priv->hw_registered)3022 ieee802154_unregister_hw(priv->hw);3023 ieee802154_free_hw(priv->hw);3024 priv->hw = NULL;3025 dev_info(3026 &spi_device->dev,3027 "Unregistered & freed ieee802154_hw.\n"3028 );3029 }3030 if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS))3031 ca8210_test_interface_clear(priv);3032 }3033}3034 3035/**3036 * ca8210_probe() - Set up a connected ca8210 upon being detected by the system3037 * @spi_device: Pointer to spi device data structure3038 *3039 * Return: 0 or linux error code3040 */3041static int ca8210_probe(struct spi_device *spi_device)3042{3043 struct ca8210_priv *priv;3044 struct ieee802154_hw *hw;3045 struct ca8210_platform_data *pdata;3046 int ret;3047 3048 dev_info(&spi_device->dev, "Inserting ca8210\n");3049 3050 /* allocate ieee802154_hw and private data */3051 hw = ieee802154_alloc_hw(sizeof(struct ca8210_priv), &ca8210_phy_ops);3052 if (!hw) {3053 dev_crit(&spi_device->dev, "ieee802154_alloc_hw failed\n");3054 ret = -ENOMEM;3055 goto error;3056 }3057 3058 priv = hw->priv;3059 priv->hw = hw;3060 priv->spi = spi_device;3061 hw->parent = &spi_device->dev;3062 spin_lock_init(&priv->lock);3063 priv->async_tx_pending = false;3064 priv->hw_registered = false;3065 priv->sync_up = 0;3066 priv->sync_down = 0;3067 priv->promiscuous = false;3068 priv->retries = 0;3069 init_completion(&priv->ca8210_is_awake);3070 init_completion(&priv->spi_transfer_complete);3071 init_completion(&priv->sync_exchange_complete);3072 spi_set_drvdata(priv->spi, priv);3073 if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS)) {3074 cascoda_api_upstream = ca8210_test_int_driver_write;3075 ca8210_test_interface_init(priv);3076 } else {3077 cascoda_api_upstream = NULL;3078 }3079 ca8210_hw_setup(hw);3080 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);3081 3082 pdata = kmalloc(sizeof(*pdata), GFP_KERNEL);3083 if (!pdata) {3084 ret = -ENOMEM;3085 goto error;3086 }3087 3088 priv->spi->dev.platform_data = pdata;3089 ret = ca8210_get_platform_data(priv->spi, pdata);3090 if (ret) {3091 dev_crit(&spi_device->dev, "ca8210_get_platform_data failed\n");3092 goto error;3093 }3094 3095 ret = ca8210_dev_com_init(priv);3096 if (ret) {3097 dev_crit(&spi_device->dev, "ca8210_dev_com_init failed\n");3098 goto error;3099 }3100 ret = ca8210_reset_init(priv->spi);3101 if (ret) {3102 dev_crit(&spi_device->dev, "ca8210_reset_init failed\n");3103 goto error;3104 }3105 3106 ret = ca8210_interrupt_init(priv->spi);3107 if (ret) {3108 dev_crit(&spi_device->dev, "ca8210_interrupt_init failed\n");3109 goto error;3110 }3111 3112 msleep(100);3113 3114 ca8210_reset_send(priv->spi, 1);3115 3116 ret = tdme_chipinit(priv->spi);3117 if (ret) {3118 dev_crit(&spi_device->dev, "tdme_chipinit failed\n");3119 goto error;3120 }3121 3122 if (pdata->extclockenable) {3123 ret = ca8210_config_extern_clk(pdata, priv->spi, 1);3124 if (ret) {3125 dev_crit(3126 &spi_device->dev,3127 "ca8210_config_extern_clk failed\n"3128 );3129 goto error;3130 }3131 ret = ca8210_register_ext_clock(priv->spi);3132 if (ret) {3133 dev_crit(3134 &spi_device->dev,3135 "ca8210_register_ext_clock failed\n"3136 );3137 goto error;3138 }3139 }3140 3141 ret = ieee802154_register_hw(hw);3142 if (ret) {3143 dev_crit(&spi_device->dev, "ieee802154_register_hw failed\n");3144 goto error;3145 }3146 priv->hw_registered = true;3147 3148 return 0;3149error:3150 msleep(100); /* wait for pending spi transfers to complete */3151 ca8210_remove(spi_device);3152 return link_to_linux_err(ret);3153}3154 3155static const struct of_device_id ca8210_of_ids[] = {3156 {.compatible = "cascoda,ca8210", },3157 {},3158};3159MODULE_DEVICE_TABLE(of, ca8210_of_ids);3160 3161static struct spi_driver ca8210_spi_driver = {3162 .driver = {3163 .name = DRIVER_NAME,3164 .of_match_table = ca8210_of_ids,3165 },3166 .probe = ca8210_probe,3167 .remove = ca8210_remove3168};3169 3170module_spi_driver(ca8210_spi_driver);3171 3172MODULE_AUTHOR("Harry Morris <h.morris@cascoda.com>");3173MODULE_DESCRIPTION("CA-8210 SoftMAC driver");3174MODULE_LICENSE("Dual BSD/GPL");3175MODULE_VERSION("1.0");3176