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1// SPDX-License-Identifier: GPL-2.02 3/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.4 * Copyright (C) 2018-2024 Linaro Ltd.5 */6 7#include <linux/bug.h>8#include <linux/firmware.h>9#include <linux/io.h>10#include <linux/module.h>11#include <linux/of.h>12#include <linux/of_address.h>13#include <linux/platform_device.h>14#include <linux/pm_runtime.h>15#include <linux/types.h>16 17#include <linux/firmware/qcom/qcom_scm.h>18#include <linux/soc/qcom/mdt_loader.h>19 20#include "ipa.h"21#include "ipa_cmd.h"22#include "ipa_data.h"23#include "ipa_endpoint.h"24#include "ipa_interrupt.h"25#include "ipa_mem.h"26#include "ipa_modem.h"27#include "ipa_power.h"28#include "ipa_reg.h"29#include "ipa_resource.h"30#include "ipa_smp2p.h"31#include "ipa_sysfs.h"32#include "ipa_table.h"33#include "ipa_uc.h"34#include "ipa_version.h"35 36/**37 * DOC: The IP Accelerator38 *39 * This driver supports the Qualcomm IP Accelerator (IPA), which is a40 * networking component found in many Qualcomm SoCs. The IPA is connected41 * to the application processor (AP), but is also connected (and partially42 * controlled by) other "execution environments" (EEs), such as a modem.43 *44 * The IPA is the conduit between the AP and the modem that carries network45 * traffic. This driver presents a network interface representing the46 * connection of the modem to external (e.g. LTE) networks.47 *48 * The IPA provides protocol checksum calculation, offloading this work49 * from the AP. The IPA offers additional functionality, including routing,50 * filtering, and NAT support, but that more advanced functionality is not51 * currently supported. Despite that, some resources--including routing52 * tables and filter tables--are defined in this driver because they must53 * be initialized even when the advanced hardware features are not used.54 *55 * There are two distinct layers that implement the IPA hardware, and this56 * is reflected in the organization of the driver. The generic software57 * interface (GSI) is an integral component of the IPA, providing a58 * well-defined communication layer between the AP subsystem and the IPA59 * core. The GSI implements a set of "channels" used for communication60 * between the AP and the IPA.61 *62 * The IPA layer uses GSI channels to implement its "endpoints". And while63 * a GSI channel carries data between the AP and the IPA, a pair of IPA64 * endpoints is used to carry traffic between two EEs. Specifically, the main65 * modem network interface is implemented by two pairs of endpoints: a TX66 * endpoint on the AP coupled with an RX endpoint on the modem; and another67 * RX endpoint on the AP receiving data from a TX endpoint on the modem.68 */69 70/* The name of the GSI firmware file relative to /lib/firmware */71#define IPA_FW_PATH_DEFAULT "ipa_fws.mdt"72#define IPA_PAS_ID 1573 74/* Shift of 19.2 MHz timestamp to achieve lower resolution timestamps */75/* IPA v5.5+ does not specify Qtime timestamp config for DPL */76#define DPL_TIMESTAMP_SHIFT 14 /* ~1.172 kHz, ~853 usec per tick */77#define TAG_TIMESTAMP_SHIFT 1478#define NAT_TIMESTAMP_SHIFT 24 /* ~1.144 Hz, ~874 msec per tick */79 80/* Divider for 19.2 MHz crystal oscillator clock to get common timer clock */81#define IPA_XO_CLOCK_DIVIDER 192 /* 1 is subtracted where used */82 83/**84 * enum ipa_firmware_loader: How GSI firmware gets loaded85 *86 * @IPA_LOADER_DEFER: System not ready; try again later87 * @IPA_LOADER_SELF: AP loads GSI firmware88 * @IPA_LOADER_MODEM: Modem loads GSI firmware, signals when done89 * @IPA_LOADER_SKIP: Neither AP nor modem need to load GSI firmware90 * @IPA_LOADER_INVALID: GSI firmware loader specification is invalid91 */92enum ipa_firmware_loader {93 IPA_LOADER_DEFER,94 IPA_LOADER_SELF,95 IPA_LOADER_MODEM,96 IPA_LOADER_SKIP,97 IPA_LOADER_INVALID,98};99 100/**101 * ipa_setup() - Set up IPA hardware102 * @ipa: IPA pointer103 *104 * Perform initialization that requires issuing immediate commands on105 * the command TX endpoint. If the modem is doing GSI firmware load106 * and initialization, this function will be called when an SMP2P107 * interrupt has been signaled by the modem. Otherwise it will be108 * called from ipa_probe() after GSI firmware has been successfully109 * loaded, authenticated, and started by Trust Zone.110 */111int ipa_setup(struct ipa *ipa)112{113 struct ipa_endpoint *exception_endpoint;114 struct ipa_endpoint *command_endpoint;115 struct device *dev = ipa->dev;116 int ret;117 118 ret = gsi_setup(&ipa->gsi);119 if (ret)120 return ret;121 122 ipa_endpoint_setup(ipa);123 124 /* We need to use the AP command TX endpoint to perform other125 * initialization, so we enable first.126 */127 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX];128 ret = ipa_endpoint_enable_one(command_endpoint);129 if (ret)130 goto err_endpoint_teardown;131 132 ret = ipa_mem_setup(ipa); /* No matching teardown required */133 if (ret)134 goto err_command_disable;135 136 ret = ipa_table_setup(ipa); /* No matching teardown required */137 if (ret)138 goto err_command_disable;139 140 /* Enable the exception handling endpoint, and tell the hardware141 * to use it by default.142 */143 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX];144 ret = ipa_endpoint_enable_one(exception_endpoint);145 if (ret)146 goto err_command_disable;147 148 ipa_endpoint_default_route_set(ipa, exception_endpoint->endpoint_id);149 150 /* We're all set. Now prepare for communication with the modem */151 ret = ipa_qmi_setup(ipa);152 if (ret)153 goto err_default_route_clear;154 155 ipa->setup_complete = true;156 157 dev_info(dev, "IPA driver setup completed successfully\n");158 159 return 0;160 161err_default_route_clear:162 ipa_endpoint_default_route_clear(ipa);163 ipa_endpoint_disable_one(exception_endpoint);164err_command_disable:165 ipa_endpoint_disable_one(command_endpoint);166err_endpoint_teardown:167 ipa_endpoint_teardown(ipa);168 gsi_teardown(&ipa->gsi);169 170 return ret;171}172 173/**174 * ipa_teardown() - Inverse of ipa_setup()175 * @ipa: IPA pointer176 */177static void ipa_teardown(struct ipa *ipa)178{179 struct ipa_endpoint *exception_endpoint;180 struct ipa_endpoint *command_endpoint;181 182 /* We're going to tear everything down, as if setup never completed */183 ipa->setup_complete = false;184 185 ipa_qmi_teardown(ipa);186 ipa_endpoint_default_route_clear(ipa);187 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX];188 ipa_endpoint_disable_one(exception_endpoint);189 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX];190 ipa_endpoint_disable_one(command_endpoint);191 ipa_endpoint_teardown(ipa);192 gsi_teardown(&ipa->gsi);193}194 195static void196ipa_hardware_config_bcr(struct ipa *ipa, const struct ipa_data *data)197{198 const struct reg *reg;199 u32 val;200 201 /* IPA v4.5+ has no backward compatibility register */202 if (ipa->version >= IPA_VERSION_4_5)203 return;204 205 reg = ipa_reg(ipa, IPA_BCR);206 val = data->backward_compat;207 iowrite32(val, ipa->reg_virt + reg_offset(reg));208}209 210static void ipa_hardware_config_tx(struct ipa *ipa)211{212 enum ipa_version version = ipa->version;213 const struct reg *reg;214 u32 offset;215 u32 val;216 217 if (version <= IPA_VERSION_4_0 || version >= IPA_VERSION_4_5)218 return;219 220 /* Disable PA mask to allow HOLB drop */221 reg = ipa_reg(ipa, IPA_TX_CFG);222 offset = reg_offset(reg);223 224 val = ioread32(ipa->reg_virt + offset);225 226 val &= ~reg_bit(reg, PA_MASK_EN);227 228 iowrite32(val, ipa->reg_virt + offset);229}230 231static void ipa_hardware_config_clkon(struct ipa *ipa)232{233 enum ipa_version version = ipa->version;234 const struct reg *reg;235 u32 val;236 237 if (version >= IPA_VERSION_4_5)238 return;239 240 if (version < IPA_VERSION_4_0 && version != IPA_VERSION_3_1)241 return;242 243 /* Implement some hardware workarounds */244 reg = ipa_reg(ipa, CLKON_CFG);245 if (version == IPA_VERSION_3_1) {246 /* Disable MISC clock gating */247 val = reg_bit(reg, CLKON_MISC);248 } else { /* IPA v4.0+ */249 /* Enable open global clocks in the CLKON configuration */250 val = reg_bit(reg, CLKON_GLOBAL);251 val |= reg_bit(reg, GLOBAL_2X_CLK);252 }253 254 iowrite32(val, ipa->reg_virt + reg_offset(reg));255}256 257/* Configure bus access behavior for IPA components */258static void ipa_hardware_config_comp(struct ipa *ipa)259{260 const struct reg *reg;261 u32 offset;262 u32 val;263 264 /* Nothing to configure prior to IPA v4.0 */265 if (ipa->version < IPA_VERSION_4_0)266 return;267 268 reg = ipa_reg(ipa, COMP_CFG);269 offset = reg_offset(reg);270 271 val = ioread32(ipa->reg_virt + offset);272 273 if (ipa->version == IPA_VERSION_4_0) {274 val &= ~reg_bit(reg, IPA_QMB_SELECT_CONS_EN);275 val &= ~reg_bit(reg, IPA_QMB_SELECT_PROD_EN);276 val &= ~reg_bit(reg, IPA_QMB_SELECT_GLOBAL_EN);277 } else if (ipa->version < IPA_VERSION_4_5) {278 val |= reg_bit(reg, GSI_MULTI_AXI_MASTERS_DIS);279 } else {280 /* For IPA v4.5+ FULL_FLUSH_WAIT_RS_CLOSURE_EN is 0 */281 }282 283 val |= reg_bit(reg, GSI_MULTI_INORDER_RD_DIS);284 val |= reg_bit(reg, GSI_MULTI_INORDER_WR_DIS);285 286 iowrite32(val, ipa->reg_virt + offset);287}288 289/* Configure DDR and (possibly) PCIe max read/write QSB values */290static void291ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data)292{293 const struct ipa_qsb_data *data0;294 const struct ipa_qsb_data *data1;295 const struct reg *reg;296 u32 val;297 298 /* QMB 0 represents DDR; QMB 1 (if present) represents PCIe */299 data0 = &data->qsb_data[IPA_QSB_MASTER_DDR];300 if (data->qsb_count > 1)301 data1 = &data->qsb_data[IPA_QSB_MASTER_PCIE];302 303 /* Max outstanding write accesses for QSB masters */304 reg = ipa_reg(ipa, QSB_MAX_WRITES);305 306 val = reg_encode(reg, GEN_QMB_0_MAX_WRITES, data0->max_writes);307 if (data->qsb_count > 1)308 val |= reg_encode(reg, GEN_QMB_1_MAX_WRITES, data1->max_writes);309 310 iowrite32(val, ipa->reg_virt + reg_offset(reg));311 312 /* Max outstanding read accesses for QSB masters */313 reg = ipa_reg(ipa, QSB_MAX_READS);314 315 val = reg_encode(reg, GEN_QMB_0_MAX_READS, data0->max_reads);316 if (ipa->version >= IPA_VERSION_4_0)317 val |= reg_encode(reg, GEN_QMB_0_MAX_READS_BEATS,318 data0->max_reads_beats);319 if (data->qsb_count > 1) {320 val = reg_encode(reg, GEN_QMB_1_MAX_READS, data1->max_reads);321 if (ipa->version >= IPA_VERSION_4_0)322 val |= reg_encode(reg, GEN_QMB_1_MAX_READS_BEATS,323 data1->max_reads_beats);324 }325 326 iowrite32(val, ipa->reg_virt + reg_offset(reg));327}328 329/* The internal inactivity timer clock is used for the aggregation timer */330#define TIMER_FREQUENCY 32000 /* 32 KHz inactivity timer clock */331 332/* Compute the value to use in the COUNTER_CFG register AGGR_GRANULARITY333 * field to represent the given number of microseconds. The value is one334 * less than the number of timer ticks in the requested period. 0 is not335 * a valid granularity value (so for example @usec must be at least 16 for336 * a TIMER_FREQUENCY of 32000).337 */338static __always_inline u32 ipa_aggr_granularity_val(u32 usec)339{340 return DIV_ROUND_CLOSEST(usec * TIMER_FREQUENCY, USEC_PER_SEC) - 1;341}342 343/* IPA uses unified Qtime starting at IPA v4.5, implementing various344 * timestamps and timers independent of the IPA core clock rate. The345 * Qtimer is based on a 56-bit timestamp incremented at each tick of346 * a 19.2 MHz SoC crystal oscillator (XO clock).347 *348 * For IPA timestamps (tag, NAT, data path logging) a lower resolution349 * timestamp is achieved by shifting the Qtimer timestamp value right350 * some number of bits to produce the low-order bits of the coarser351 * granularity timestamp.352 *353 * For timers, a common timer clock is derived from the XO clock using354 * a divider (we use 192, to produce a 100kHz timer clock). From355 * this common clock, three "pulse generators" are used to produce356 * timer ticks at a configurable frequency. IPA timers (such as357 * those used for aggregation or head-of-line block handling) now358 * define their period based on one of these pulse generators.359 */360static void ipa_qtime_config(struct ipa *ipa)361{362 const struct reg *reg;363 u32 offset;364 u32 val;365 366 /* Timer clock divider must be disabled when we change the rate */367 reg = ipa_reg(ipa, TIMERS_XO_CLK_DIV_CFG);368 iowrite32(0, ipa->reg_virt + reg_offset(reg));369 370 reg = ipa_reg(ipa, QTIME_TIMESTAMP_CFG);371 if (ipa->version < IPA_VERSION_5_5) {372 /* Set DPL time stamp resolution to use Qtime (not 1 msec) */373 val = reg_encode(reg, DPL_TIMESTAMP_LSB, DPL_TIMESTAMP_SHIFT);374 val |= reg_bit(reg, DPL_TIMESTAMP_SEL);375 }376 /* Configure tag and NAT Qtime timestamp resolution as well */377 val = reg_encode(reg, TAG_TIMESTAMP_LSB, TAG_TIMESTAMP_SHIFT);378 val = reg_encode(reg, NAT_TIMESTAMP_LSB, NAT_TIMESTAMP_SHIFT);379 380 iowrite32(val, ipa->reg_virt + reg_offset(reg));381 382 /* Set granularity of pulse generators used for other timers */383 reg = ipa_reg(ipa, TIMERS_PULSE_GRAN_CFG);384 val = reg_encode(reg, PULSE_GRAN_0, IPA_GRAN_100_US);385 val |= reg_encode(reg, PULSE_GRAN_1, IPA_GRAN_1_MS);386 if (ipa->version >= IPA_VERSION_5_0) {387 val |= reg_encode(reg, PULSE_GRAN_2, IPA_GRAN_10_MS);388 val |= reg_encode(reg, PULSE_GRAN_3, IPA_GRAN_10_MS);389 } else {390 val |= reg_encode(reg, PULSE_GRAN_2, IPA_GRAN_1_MS);391 }392 393 iowrite32(val, ipa->reg_virt + reg_offset(reg));394 395 /* Actual divider is 1 more than value supplied here */396 reg = ipa_reg(ipa, TIMERS_XO_CLK_DIV_CFG);397 offset = reg_offset(reg);398 399 val = reg_encode(reg, DIV_VALUE, IPA_XO_CLOCK_DIVIDER - 1);400 401 iowrite32(val, ipa->reg_virt + offset);402 403 /* Divider value is set; re-enable the common timer clock divider */404 val |= reg_bit(reg, DIV_ENABLE);405 406 iowrite32(val, ipa->reg_virt + offset);407}408 409/* Before IPA v4.5 timing is controlled by a counter register */410static void ipa_hardware_config_counter(struct ipa *ipa)411{412 u32 granularity = ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY);413 const struct reg *reg;414 u32 val;415 416 reg = ipa_reg(ipa, COUNTER_CFG);417 /* If defined, EOT_COAL_GRANULARITY is 0 */418 val = reg_encode(reg, AGGR_GRANULARITY, granularity);419 iowrite32(val, ipa->reg_virt + reg_offset(reg));420}421 422static void ipa_hardware_config_timing(struct ipa *ipa)423{424 if (ipa->version < IPA_VERSION_4_5)425 ipa_hardware_config_counter(ipa);426 else427 ipa_qtime_config(ipa);428}429 430static void ipa_hardware_config_hashing(struct ipa *ipa)431{432 const struct reg *reg;433 434 /* Other than IPA v4.2, all versions enable "hashing". Starting435 * with IPA v5.0, the filter and router tables are implemented436 * differently, but the default configuration enables this feature437 * (now referred to as "cacheing"), so there's nothing to do here.438 */439 if (ipa->version != IPA_VERSION_4_2)440 return;441 442 /* IPA v4.2 does not support hashed tables, so disable them */443 reg = ipa_reg(ipa, FILT_ROUT_HASH_EN);444 445 /* IPV6_ROUTER_HASH, IPV6_FILTER_HASH, IPV4_ROUTER_HASH,446 * IPV4_FILTER_HASH are all zero.447 */448 iowrite32(0, ipa->reg_virt + reg_offset(reg));449}450 451static void ipa_idle_indication_cfg(struct ipa *ipa,452 u32 enter_idle_debounce_thresh,453 bool const_non_idle_enable)454{455 const struct reg *reg;456 u32 val;457 458 if (ipa->version < IPA_VERSION_3_5_1)459 return;460 461 reg = ipa_reg(ipa, IDLE_INDICATION_CFG);462 val = reg_encode(reg, ENTER_IDLE_DEBOUNCE_THRESH,463 enter_idle_debounce_thresh);464 if (const_non_idle_enable)465 val |= reg_bit(reg, CONST_NON_IDLE_ENABLE);466 467 iowrite32(val, ipa->reg_virt + reg_offset(reg));468}469 470/**471 * ipa_hardware_dcd_config() - Enable dynamic clock division on IPA472 * @ipa: IPA pointer473 *474 * Configures when the IPA signals it is idle to the global clock475 * controller, which can respond by scaling down the clock to save476 * power.477 */478static void ipa_hardware_dcd_config(struct ipa *ipa)479{480 /* Recommended values for IPA 3.5 and later according to IPA HPG */481 ipa_idle_indication_cfg(ipa, 256, false);482}483 484static void ipa_hardware_dcd_deconfig(struct ipa *ipa)485{486 /* Power-on reset values */487 ipa_idle_indication_cfg(ipa, 0, true);488}489 490/**491 * ipa_hardware_config() - Primitive hardware initialization492 * @ipa: IPA pointer493 * @data: IPA configuration data494 */495static void ipa_hardware_config(struct ipa *ipa, const struct ipa_data *data)496{497 ipa_hardware_config_bcr(ipa, data);498 ipa_hardware_config_tx(ipa);499 ipa_hardware_config_clkon(ipa);500 ipa_hardware_config_comp(ipa);501 ipa_hardware_config_qsb(ipa, data);502 ipa_hardware_config_timing(ipa);503 ipa_hardware_config_hashing(ipa);504 ipa_hardware_dcd_config(ipa);505}506 507/**508 * ipa_hardware_deconfig() - Inverse of ipa_hardware_config()509 * @ipa: IPA pointer510 *511 * This restores the power-on reset values (even if they aren't different)512 */513static void ipa_hardware_deconfig(struct ipa *ipa)514{515 /* Mostly we just leave things as we set them. */516 ipa_hardware_dcd_deconfig(ipa);517}518 519/**520 * ipa_config() - Configure IPA hardware521 * @ipa: IPA pointer522 * @data: IPA configuration data523 *524 * Perform initialization requiring IPA power to be enabled.525 */526static int ipa_config(struct ipa *ipa, const struct ipa_data *data)527{528 int ret;529 530 ipa_hardware_config(ipa, data);531 532 ret = ipa_mem_config(ipa);533 if (ret)534 goto err_hardware_deconfig;535 536 ret = ipa_interrupt_config(ipa);537 if (ret)538 goto err_mem_deconfig;539 540 ipa_uc_config(ipa);541 542 ret = ipa_endpoint_config(ipa);543 if (ret)544 goto err_uc_deconfig;545 546 ipa_table_config(ipa); /* No deconfig required */547 548 /* Assign resource limitation to each group; no deconfig required */549 ret = ipa_resource_config(ipa, data->resource_data);550 if (ret)551 goto err_endpoint_deconfig;552 553 ret = ipa_modem_config(ipa);554 if (ret)555 goto err_endpoint_deconfig;556 557 return 0;558 559err_endpoint_deconfig:560 ipa_endpoint_deconfig(ipa);561err_uc_deconfig:562 ipa_uc_deconfig(ipa);563 ipa_interrupt_deconfig(ipa);564err_mem_deconfig:565 ipa_mem_deconfig(ipa);566err_hardware_deconfig:567 ipa_hardware_deconfig(ipa);568 569 return ret;570}571 572/**573 * ipa_deconfig() - Inverse of ipa_config()574 * @ipa: IPA pointer575 */576static void ipa_deconfig(struct ipa *ipa)577{578 ipa_modem_deconfig(ipa);579 ipa_endpoint_deconfig(ipa);580 ipa_uc_deconfig(ipa);581 ipa_interrupt_deconfig(ipa);582 ipa_mem_deconfig(ipa);583 ipa_hardware_deconfig(ipa);584}585 586static int ipa_firmware_load(struct device *dev)587{588 const struct firmware *fw;589 struct device_node *node;590 struct resource res;591 phys_addr_t phys;592 const char *path;593 ssize_t size;594 void *virt;595 int ret;596 597 node = of_parse_phandle(dev->of_node, "memory-region", 0);598 if (!node) {599 dev_err(dev, "DT error getting \"memory-region\" property\n");600 return -EINVAL;601 }602 603 ret = of_address_to_resource(node, 0, &res);604 of_node_put(node);605 if (ret) {606 dev_err(dev, "error %d getting \"memory-region\" resource\n",607 ret);608 return ret;609 }610 611 /* Use name from DTB if specified; use default for *any* error */612 ret = of_property_read_string(dev->of_node, "firmware-name", &path);613 if (ret) {614 dev_dbg(dev, "error %d getting \"firmware-name\" resource\n",615 ret);616 path = IPA_FW_PATH_DEFAULT;617 }618 619 ret = request_firmware(&fw, path, dev);620 if (ret) {621 dev_err(dev, "error %d requesting \"%s\"\n", ret, path);622 return ret;623 }624 625 phys = res.start;626 size = (size_t)resource_size(&res);627 virt = memremap(phys, size, MEMREMAP_WC);628 if (!virt) {629 dev_err(dev, "unable to remap firmware memory\n");630 ret = -ENOMEM;631 goto out_release_firmware;632 }633 634 ret = qcom_mdt_load(dev, fw, path, IPA_PAS_ID, virt, phys, size, NULL);635 if (ret)636 dev_err(dev, "error %d loading \"%s\"\n", ret, path);637 else if ((ret = qcom_scm_pas_auth_and_reset(IPA_PAS_ID)))638 dev_err(dev, "error %d authenticating \"%s\"\n", ret, path);639 640 memunmap(virt);641out_release_firmware:642 release_firmware(fw);643 644 return ret;645}646 647static const struct of_device_id ipa_match[] = {648 {649 .compatible = "qcom,msm8998-ipa",650 .data = &ipa_data_v3_1,651 },652 {653 .compatible = "qcom,sdm845-ipa",654 .data = &ipa_data_v3_5_1,655 },656 {657 .compatible = "qcom,sc7180-ipa",658 .data = &ipa_data_v4_2,659 },660 {661 .compatible = "qcom,sdx55-ipa",662 .data = &ipa_data_v4_5,663 },664 {665 .compatible = "qcom,sm6350-ipa",666 .data = &ipa_data_v4_7,667 },668 {669 .compatible = "qcom,sm8350-ipa",670 .data = &ipa_data_v4_9,671 },672 {673 .compatible = "qcom,sc7280-ipa",674 .data = &ipa_data_v4_11,675 },676 {677 .compatible = "qcom,sdx65-ipa",678 .data = &ipa_data_v5_0,679 },680 {681 .compatible = "qcom,sm8550-ipa",682 .data = &ipa_data_v5_5,683 },684 { },685};686MODULE_DEVICE_TABLE(of, ipa_match);687 688/* Check things that can be validated at build time. This just689 * groups these things BUILD_BUG_ON() calls don't clutter the rest690 * of the code.691 * */692static void ipa_validate_build(void)693{694 /* At one time we assumed a 64-bit build, allowing some do_div()695 * calls to be replaced by simple division or modulo operations.696 * We currently only perform divide and modulo operations on u32,697 * u16, or size_t objects, and of those only size_t has any chance698 * of being a 64-bit value. (It should be guaranteed 32 bits wide699 * on a 32-bit build, but there is no harm in verifying that.)700 */701 BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT) && sizeof(size_t) != 4);702 703 /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */704 BUILD_BUG_ON(GSI_EE_AP != 0);705 706 /* There's no point if we have no channels or event rings */707 BUILD_BUG_ON(!GSI_CHANNEL_COUNT_MAX);708 BUILD_BUG_ON(!GSI_EVT_RING_COUNT_MAX);709 710 /* GSI hardware design limits */711 BUILD_BUG_ON(GSI_CHANNEL_COUNT_MAX > 32);712 BUILD_BUG_ON(GSI_EVT_RING_COUNT_MAX > 31);713 714 /* The number of TREs in a transaction is limited by the channel's715 * TLV FIFO size. A transaction structure uses 8-bit fields716 * to represents the number of TREs it has allocated and used.717 */718 BUILD_BUG_ON(GSI_TLV_MAX > U8_MAX);719 720 /* This is used as a divisor */721 BUILD_BUG_ON(!IPA_AGGR_GRANULARITY);722 723 /* Aggregation granularity value can't be 0, and must fit */724 BUILD_BUG_ON(!ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY));725}726 727static enum ipa_firmware_loader ipa_firmware_loader(struct device *dev)728{729 bool modem_init;730 const char *str;731 int ret;732 733 /* Look up the old and new properties by name */734 modem_init = of_property_read_bool(dev->of_node, "modem-init");735 ret = of_property_read_string(dev->of_node, "qcom,gsi-loader", &str);736 737 /* If the new property doesn't exist, it's legacy behavior */738 if (ret == -EINVAL) {739 if (modem_init)740 return IPA_LOADER_MODEM;741 goto out_self;742 }743 744 /* Any other error on the new property means it's poorly defined */745 if (ret)746 return IPA_LOADER_INVALID;747 748 /* New property value exists; if old one does too, that's invalid */749 if (modem_init)750 return IPA_LOADER_INVALID;751 752 /* Modem loads GSI firmware for "modem" */753 if (!strcmp(str, "modem"))754 return IPA_LOADER_MODEM;755 756 /* No GSI firmware load is needed for "skip" */757 if (!strcmp(str, "skip"))758 return IPA_LOADER_SKIP;759 760 /* Any value other than "self" is an error */761 if (strcmp(str, "self"))762 return IPA_LOADER_INVALID;763out_self:764 /* We need Trust Zone to load firmware; make sure it's available */765 if (qcom_scm_is_available())766 return IPA_LOADER_SELF;767 768 return IPA_LOADER_DEFER;769}770 771/**772 * ipa_probe() - IPA platform driver probe function773 * @pdev: Platform device pointer774 *775 * Return: 0 if successful, or a negative error code (possibly776 * EPROBE_DEFER)777 *778 * This is the main entry point for the IPA driver. Initialization proceeds779 * in several stages:780 * - The "init" stage involves activities that can be initialized without781 * access to the IPA hardware.782 * - The "config" stage requires IPA power to be active so IPA registers783 * can be accessed, but does not require the use of IPA immediate commands.784 * - The "setup" stage uses IPA immediate commands, and so requires the GSI785 * layer to be initialized.786 *787 * A Boolean Device Tree "modem-init" property determines whether GSI788 * initialization will be performed by the AP (Trust Zone) or the modem.789 * If the AP does GSI initialization, the setup phase is entered after790 * this has completed successfully. Otherwise the modem initializes791 * the GSI layer and signals it has finished by sending an SMP2P interrupt792 * to the AP; this triggers the start if IPA setup.793 */794static int ipa_probe(struct platform_device *pdev)795{796 struct device *dev = &pdev->dev;797 struct ipa_interrupt *interrupt;798 enum ipa_firmware_loader loader;799 const struct ipa_data *data;800 struct ipa_power *power;801 struct ipa *ipa;802 int ret;803 804 ipa_validate_build();805 806 /* Get configuration data early; needed for power initialization */807 data = of_device_get_match_data(dev);808 if (!data) {809 dev_err(dev, "matched hardware not supported\n");810 return -ENODEV;811 }812 813 if (!data->modem_route_count) {814 dev_err(dev, "modem_route_count cannot be zero\n");815 return -EINVAL;816 }817 818 loader = ipa_firmware_loader(dev);819 if (loader == IPA_LOADER_INVALID)820 return -EINVAL;821 if (loader == IPA_LOADER_DEFER)822 return -EPROBE_DEFER;823 824 /* The IPA interrupt might not be ready when we're probed, so this825 * might return -EPROBE_DEFER.826 */827 interrupt = ipa_interrupt_init(pdev);828 if (IS_ERR(interrupt))829 return PTR_ERR(interrupt);830 831 /* The clock and interconnects might not be ready when we're probed,832 * so this might return -EPROBE_DEFER.833 */834 power = ipa_power_init(dev, data->power_data);835 if (IS_ERR(power)) {836 ret = PTR_ERR(power);837 goto err_interrupt_exit;838 }839 840 /* No more EPROBE_DEFER. Allocate and initialize the IPA structure */841 ipa = kzalloc(sizeof(*ipa), GFP_KERNEL);842 if (!ipa) {843 ret = -ENOMEM;844 goto err_power_exit;845 }846 847 ipa->dev = dev;848 dev_set_drvdata(dev, ipa);849 ipa->interrupt = interrupt;850 ipa->power = power;851 ipa->version = data->version;852 ipa->modem_route_count = data->modem_route_count;853 init_completion(&ipa->completion);854 855 ret = ipa_reg_init(ipa, pdev);856 if (ret)857 goto err_kfree_ipa;858 859 ret = ipa_mem_init(ipa, pdev, data->mem_data);860 if (ret)861 goto err_reg_exit;862 863 ret = ipa_cmd_init(ipa);864 if (ret)865 goto err_mem_exit;866 867 ret = gsi_init(&ipa->gsi, pdev, ipa->version, data->endpoint_count,868 data->endpoint_data);869 if (ret)870 goto err_mem_exit;871 872 /* Result is a non-zero mask of endpoints that support filtering */873 ret = ipa_endpoint_init(ipa, data->endpoint_count, data->endpoint_data);874 if (ret)875 goto err_gsi_exit;876 877 ret = ipa_table_init(ipa);878 if (ret)879 goto err_endpoint_exit;880 881 ret = ipa_smp2p_init(ipa, pdev, loader == IPA_LOADER_MODEM);882 if (ret)883 goto err_table_exit;884 885 /* Power needs to be active for config and setup */886 ret = pm_runtime_get_sync(dev);887 if (WARN_ON(ret < 0))888 goto err_power_put;889 890 ret = ipa_config(ipa, data);891 if (ret)892 goto err_power_put;893 894 dev_info(dev, "IPA driver initialized");895 896 /* If the modem is loading GSI firmware, it will trigger a call to897 * ipa_setup() when it has finished. In that case we're done here.898 */899 if (loader == IPA_LOADER_MODEM)900 goto done;901 902 if (loader == IPA_LOADER_SELF) {903 /* The AP is loading GSI firmware; do so now */904 ret = ipa_firmware_load(dev);905 if (ret)906 goto err_deconfig;907 } /* Otherwise loader == IPA_LOADER_SKIP */908 909 /* GSI firmware is loaded; proceed to setup */910 ret = ipa_setup(ipa);911 if (ret)912 goto err_deconfig;913done:914 pm_runtime_mark_last_busy(dev);915 (void)pm_runtime_put_autosuspend(dev);916 917 return 0;918 919err_deconfig:920 ipa_deconfig(ipa);921err_power_put:922 pm_runtime_put_noidle(dev);923 ipa_smp2p_exit(ipa);924err_table_exit:925 ipa_table_exit(ipa);926err_endpoint_exit:927 ipa_endpoint_exit(ipa);928err_gsi_exit:929 gsi_exit(&ipa->gsi);930err_mem_exit:931 ipa_mem_exit(ipa);932err_reg_exit:933 ipa_reg_exit(ipa);934err_kfree_ipa:935 kfree(ipa);936err_power_exit:937 ipa_power_exit(power);938err_interrupt_exit:939 ipa_interrupt_exit(interrupt);940 941 return ret;942}943 944static void ipa_remove(struct platform_device *pdev)945{946 struct ipa_interrupt *interrupt;947 struct ipa_power *power;948 struct device *dev;949 struct ipa *ipa;950 int ret;951 952 ipa = dev_get_drvdata(&pdev->dev);953 dev = ipa->dev;954 WARN_ON(dev != &pdev->dev);955 956 power = ipa->power;957 interrupt = ipa->interrupt;958 959 /* Prevent the modem from triggering a call to ipa_setup(). This960 * also ensures a modem-initiated setup that's underway completes.961 */962 ipa_smp2p_irq_disable_setup(ipa);963 964 ret = pm_runtime_get_sync(dev);965 if (WARN_ON(ret < 0))966 goto out_power_put;967 968 if (ipa->setup_complete) {969 ret = ipa_modem_stop(ipa);970 /* If starting or stopping is in progress, try once more */971 if (ret == -EBUSY) {972 usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC);973 ret = ipa_modem_stop(ipa);974 }975 if (ret) {976 /*977 * Not cleaning up here properly might also yield a978 * crash later on. As the device is still unregistered979 * in this case, this might even yield a crash later on.980 */981 dev_err(dev, "Failed to stop modem (%pe), leaking resources\n",982 ERR_PTR(ret));983 return;984 }985 986 ipa_teardown(ipa);987 }988 989 ipa_deconfig(ipa);990out_power_put:991 pm_runtime_put_noidle(dev);992 ipa_smp2p_exit(ipa);993 ipa_table_exit(ipa);994 ipa_endpoint_exit(ipa);995 gsi_exit(&ipa->gsi);996 ipa_mem_exit(ipa);997 ipa_reg_exit(ipa);998 kfree(ipa);999 ipa_power_exit(power);1000 ipa_interrupt_exit(interrupt);1001 1002 dev_info(dev, "IPA driver removed");1003}1004 1005static const struct attribute_group *ipa_attribute_groups[] = {1006 &ipa_attribute_group,1007 &ipa_feature_attribute_group,1008 &ipa_endpoint_id_attribute_group,1009 &ipa_modem_attribute_group,1010 NULL,1011};1012 1013static struct platform_driver ipa_driver = {1014 .probe = ipa_probe,1015 .remove_new = ipa_remove,1016 .shutdown = ipa_remove,1017 .driver = {1018 .name = "ipa",1019 .pm = &ipa_pm_ops,1020 .of_match_table = ipa_match,1021 .dev_groups = ipa_attribute_groups,1022 },1023};1024 1025module_platform_driver(ipa_driver);1026 1027MODULE_LICENSE("GPL v2");1028MODULE_DESCRIPTION("Qualcomm IP Accelerator device driver");1029