320 lines · c
1// SPDX-License-Identifier: GPL-2.02 3/* Copyright (C) 2023-2024 Linaro Ltd. */4 5#include <linux/array_size.h>6#include <linux/bits.h>7#include <linux/types.h>8 9#include "../gsi_reg.h"10#include "../ipa_version.h"11#include "../reg.h"12 13REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk,14 0x0000c01c + 0x1000 * GSI_EE_AP);15 16REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk,17 0x0000c028 + 0x1000 * GSI_EE_AP);18 19static const u32 reg_ch_c_cntxt_0_fmask[] = {20 [CHTYPE_PROTOCOL] = GENMASK(6, 0),21 [CHTYPE_DIR] = BIT(7),22 [CH_EE] = GENMASK(11, 8),23 [CHID] = GENMASK(19, 12),24 [CHSTATE] = GENMASK(23, 20),25 [ELEMENT_SIZE] = GENMASK(31, 24),26};27 28REG_STRIDE_FIELDS(CH_C_CNTXT_0, ch_c_cntxt_0,29 0x00014000 + 0x12000 * GSI_EE_AP, 0x80);30 31static const u32 reg_ch_c_cntxt_1_fmask[] = {32 [CH_R_LENGTH] = GENMASK(23, 0),33 [ERINDEX] = GENMASK(31, 24),34};35 36REG_STRIDE_FIELDS(CH_C_CNTXT_1, ch_c_cntxt_1,37 0x00014004 + 0x12000 * GSI_EE_AP, 0x80);38 39REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x00014008 + 0x12000 * GSI_EE_AP, 0x80);40 41REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001400c + 0x12000 * GSI_EE_AP, 0x80);42 43static const u32 reg_ch_c_qos_fmask[] = {44 [WRR_WEIGHT] = GENMASK(3, 0),45 /* Bits 4-7 reserved */46 [MAX_PREFETCH] = BIT(8),47 [USE_DB_ENG] = BIT(9),48 [PREFETCH_MODE] = GENMASK(13, 10),49 /* Bits 14-15 reserved */50 [EMPTY_LVL_THRSHOLD] = GENMASK(23, 16),51 [DB_IN_BYTES] = BIT(24),52 [LOW_LATENCY_EN] = BIT(25),53 /* Bits 26-31 reserved */54};55 56REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x00014048 + 0x12000 * GSI_EE_AP, 0x80);57 58REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0,59 0x0001404c + 0x12000 * GSI_EE_AP, 0x80);60 61REG_STRIDE(CH_C_SCRATCH_1, ch_c_scratch_1,62 0x00014050 + 0x12000 * GSI_EE_AP, 0x80);63 64REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2,65 0x00014054 + 0x12000 * GSI_EE_AP, 0x80);66 67REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3,68 0x00014058 + 0x12000 * GSI_EE_AP, 0x80);69 70static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {71 [EV_CHTYPE] = GENMASK(6, 0),72 [EV_INTYPE] = BIT(7),73 [EV_EVCHID] = GENMASK(15, 8),74 [EV_EE] = GENMASK(19, 16),75 [EV_CHSTATE] = GENMASK(23, 20),76 [EV_ELEMENT_SIZE] = GENMASK(31, 24),77};78 79REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,80 0x0001c000 + 0x12000 * GSI_EE_AP, 0x80);81 82static const u32 reg_ev_ch_e_cntxt_1_fmask[] = {83 [R_LENGTH] = GENMASK(23, 0),84};85 86REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,87 0x0001c004 + 0x12000 * GSI_EE_AP, 0x80);88 89REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2,90 0x0001c008 + 0x12000 * GSI_EE_AP, 0x80);91 92REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3,93 0x0001c00c + 0x12000 * GSI_EE_AP, 0x80);94 95REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4,96 0x0001c010 + 0x12000 * GSI_EE_AP, 0x80);97 98static const u32 reg_ev_ch_e_cntxt_8_fmask[] = {99 [EV_MODT] = GENMASK(15, 0),100 [EV_MODC] = GENMASK(23, 16),101 [EV_MOD_CNT] = GENMASK(31, 24),102};103 104REG_STRIDE_FIELDS(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,105 0x0001c020 + 0x12000 * GSI_EE_AP, 0x80);106 107REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9,108 0x0001c024 + 0x12000 * GSI_EE_AP, 0x80);109 110REG_STRIDE(EV_CH_E_CNTXT_10, ev_ch_e_cntxt_10,111 0x0001c028 + 0x12000 * GSI_EE_AP, 0x80);112 113REG_STRIDE(EV_CH_E_CNTXT_11, ev_ch_e_cntxt_11,114 0x0001c02c + 0x12000 * GSI_EE_AP, 0x80);115 116REG_STRIDE(EV_CH_E_CNTXT_12, ev_ch_e_cntxt_12,117 0x0001c030 + 0x12000 * GSI_EE_AP, 0x80);118 119REG_STRIDE(EV_CH_E_CNTXT_13, ev_ch_e_cntxt_13,120 0x0001c034 + 0x12000 * GSI_EE_AP, 0x80);121 122REG_STRIDE(EV_CH_E_SCRATCH_0, ev_ch_e_scratch_0,123 0x0001c048 + 0x12000 * GSI_EE_AP, 0x80);124 125REG_STRIDE(EV_CH_E_SCRATCH_1, ev_ch_e_scratch_1,126 0x0001c04c + 0x12000 * GSI_EE_AP, 0x80);127 128REG_STRIDE(CH_C_DOORBELL_0, ch_c_doorbell_0,129 0x00024000 + 0x12000 * GSI_EE_AP, 0x08);130 131REG_STRIDE(EV_CH_E_DOORBELL_0, ev_ch_e_doorbell_0,132 0x00024800 + 0x12000 * GSI_EE_AP, 0x08);133 134static const u32 reg_gsi_status_fmask[] = {135 [ENABLED] = BIT(0),136 /* Bits 1-31 reserved */137};138 139REG_FIELDS(GSI_STATUS, gsi_status, 0x00025000 + 0x12000 * GSI_EE_AP);140 141static const u32 reg_ch_cmd_fmask[] = {142 [CH_CHID] = GENMASK(7, 0),143 /* Bits 8-23 reserved */144 [CH_OPCODE] = GENMASK(31, 24),145};146 147REG_FIELDS(CH_CMD, ch_cmd, 0x00025008 + 0x12000 * GSI_EE_AP);148 149static const u32 reg_ev_ch_cmd_fmask[] = {150 [EV_CHID] = GENMASK(7, 0),151 /* Bits 8-23 reserved */152 [EV_OPCODE] = GENMASK(31, 24),153};154 155REG_FIELDS(EV_CH_CMD, ev_ch_cmd, 0x00025010 + 0x12000 * GSI_EE_AP);156 157static const u32 reg_generic_cmd_fmask[] = {158 [GENERIC_OPCODE] = GENMASK(4, 0),159 [GENERIC_CHID] = GENMASK(9, 5),160 [GENERIC_EE] = GENMASK(13, 10),161 /* Bits 14-31 reserved */162};163 164REG_FIELDS(GENERIC_CMD, generic_cmd, 0x00025018 + 0x12000 * GSI_EE_AP);165 166static const u32 reg_hw_param_2_fmask[] = {167 [NUM_CH_PER_EE] = GENMASK(7, 0),168 [IRAM_SIZE] = GENMASK(12, 8),169 [GSI_CH_PEND_TRANSLATE] = BIT(13),170 [GSI_CH_FULL_LOGIC] = BIT(14),171 [GSI_USE_SDMA] = BIT(15),172 [GSI_SDMA_N_INT] = GENMASK(18, 16),173 [GSI_SDMA_MAX_BURST] = GENMASK(26, 19),174 [GSI_SDMA_N_IOVEC] = GENMASK(29, 27),175 [GSI_USE_RD_WR_ENG] = BIT(30),176 [GSI_USE_INTER_EE] = BIT(31),177};178 179REG_FIELDS(HW_PARAM_2, hw_param_2, 0x00025040 + 0x12000 * GSI_EE_AP);180 181static const u32 reg_hw_param_4_fmask[] = {182 [EV_PER_EE] = GENMASK(7, 0),183 [IRAM_PROTOCOL_COUNT] = GENMASK(15, 8),184 /* Bits 16-31 reserved */185};186 187REG_FIELDS(HW_PARAM_4, hw_param_4, 0x00025050 + 0x12000 * GSI_EE_AP);188 189REG(CNTXT_TYPE_IRQ, cntxt_type_irq, 0x00025080 + 0x12000 * GSI_EE_AP);190 191REG(CNTXT_TYPE_IRQ_MSK, cntxt_type_irq_msk, 0x00025088 + 0x12000 * GSI_EE_AP);192 193REG(CNTXT_SRC_CH_IRQ, cntxt_src_ch_irq, 0x00025090 + 0x12000 * GSI_EE_AP);194 195REG(CNTXT_SRC_CH_IRQ_MSK, cntxt_src_ch_irq_msk,196 0x00025094 + 0x12000 * GSI_EE_AP);197 198REG(CNTXT_SRC_CH_IRQ_CLR, cntxt_src_ch_irq_clr,199 0x00025098 + 0x12000 * GSI_EE_AP);200 201REG(CNTXT_SRC_EV_CH_IRQ, cntxt_src_ev_ch_irq, 0x0002509c + 0x12000 * GSI_EE_AP);202 203REG(CNTXT_SRC_EV_CH_IRQ_MSK, cntxt_src_ev_ch_irq_msk,204 0x000250a0 + 0x12000 * GSI_EE_AP);205 206REG(CNTXT_SRC_EV_CH_IRQ_CLR, cntxt_src_ev_ch_irq_clr,207 0x000250a4 + 0x12000 * GSI_EE_AP);208 209REG(CNTXT_SRC_IEOB_IRQ, cntxt_src_ieob_irq, 0x000250a8 + 0x12000 * GSI_EE_AP);210 211REG(CNTXT_SRC_IEOB_IRQ_MSK, cntxt_src_ieob_irq_msk,212 0x000250ac + 0x12000 * GSI_EE_AP);213 214REG(CNTXT_SRC_IEOB_IRQ_CLR, cntxt_src_ieob_irq_clr,215 0x000250b0 + 0x12000 * GSI_EE_AP);216 217REG(CNTXT_GLOB_IRQ_STTS, cntxt_glob_irq_stts, 0x00025200 + 0x12000 * GSI_EE_AP);218 219REG(CNTXT_GLOB_IRQ_EN, cntxt_glob_irq_en, 0x00025204 + 0x12000 * GSI_EE_AP);220 221REG(CNTXT_GLOB_IRQ_CLR, cntxt_glob_irq_clr, 0x00025208 + 0x12000 * GSI_EE_AP);222 223REG(CNTXT_GSI_IRQ_STTS, cntxt_gsi_irq_stts, 0x0002520c + 0x12000 * GSI_EE_AP);224 225REG(CNTXT_GSI_IRQ_EN, cntxt_gsi_irq_en, 0x00025210 + 0x12000 * GSI_EE_AP);226 227REG(CNTXT_GSI_IRQ_CLR, cntxt_gsi_irq_clr, 0x00025214 + 0x12000 * GSI_EE_AP);228 229static const u32 reg_cntxt_intset_fmask[] = {230 [INTYPE] = BIT(0)231 /* Bits 1-31 reserved */232};233 234REG_FIELDS(CNTXT_INTSET, cntxt_intset, 0x00025220 + 0x12000 * GSI_EE_AP);235 236static const u32 reg_error_log_fmask[] = {237 [ERR_ARG3] = GENMASK(3, 0),238 [ERR_ARG2] = GENMASK(7, 4),239 [ERR_ARG1] = GENMASK(11, 8),240 [ERR_CODE] = GENMASK(15, 12),241 /* Bits 16-18 reserved */242 [ERR_VIRT_IDX] = GENMASK(23, 19),243 [ERR_TYPE] = GENMASK(27, 24),244 [ERR_EE] = GENMASK(31, 28),245};246 247REG_FIELDS(ERROR_LOG, error_log, 0x00025240 + 0x12000 * GSI_EE_AP);248 249REG(ERROR_LOG_CLR, error_log_clr, 0x00025244 + 0x12000 * GSI_EE_AP);250 251static const u32 reg_cntxt_scratch_0_fmask[] = {252 [INTER_EE_RESULT] = GENMASK(2, 0),253 /* Bits 3-4 reserved */254 [GENERIC_EE_RESULT] = GENMASK(7, 5),255 /* Bits 8-31 reserved */256};257 258REG_FIELDS(CNTXT_SCRATCH_0, cntxt_scratch_0, 0x00025400 + 0x12000 * GSI_EE_AP);259 260static const struct reg *reg_array[] = {261 [INTER_EE_SRC_CH_IRQ_MSK] = ®_inter_ee_src_ch_irq_msk,262 [INTER_EE_SRC_EV_CH_IRQ_MSK] = ®_inter_ee_src_ev_ch_irq_msk,263 [CH_C_CNTXT_0] = ®_ch_c_cntxt_0,264 [CH_C_CNTXT_1] = ®_ch_c_cntxt_1,265 [CH_C_CNTXT_2] = ®_ch_c_cntxt_2,266 [CH_C_CNTXT_3] = ®_ch_c_cntxt_3,267 [CH_C_QOS] = ®_ch_c_qos,268 [CH_C_SCRATCH_0] = ®_ch_c_scratch_0,269 [CH_C_SCRATCH_1] = ®_ch_c_scratch_1,270 [CH_C_SCRATCH_2] = ®_ch_c_scratch_2,271 [CH_C_SCRATCH_3] = ®_ch_c_scratch_3,272 [EV_CH_E_CNTXT_0] = ®_ev_ch_e_cntxt_0,273 [EV_CH_E_CNTXT_1] = ®_ev_ch_e_cntxt_1,274 [EV_CH_E_CNTXT_2] = ®_ev_ch_e_cntxt_2,275 [EV_CH_E_CNTXT_3] = ®_ev_ch_e_cntxt_3,276 [EV_CH_E_CNTXT_4] = ®_ev_ch_e_cntxt_4,277 [EV_CH_E_CNTXT_8] = ®_ev_ch_e_cntxt_8,278 [EV_CH_E_CNTXT_9] = ®_ev_ch_e_cntxt_9,279 [EV_CH_E_CNTXT_10] = ®_ev_ch_e_cntxt_10,280 [EV_CH_E_CNTXT_11] = ®_ev_ch_e_cntxt_11,281 [EV_CH_E_CNTXT_12] = ®_ev_ch_e_cntxt_12,282 [EV_CH_E_CNTXT_13] = ®_ev_ch_e_cntxt_13,283 [EV_CH_E_SCRATCH_0] = ®_ev_ch_e_scratch_0,284 [EV_CH_E_SCRATCH_1] = ®_ev_ch_e_scratch_1,285 [CH_C_DOORBELL_0] = ®_ch_c_doorbell_0,286 [EV_CH_E_DOORBELL_0] = ®_ev_ch_e_doorbell_0,287 [GSI_STATUS] = ®_gsi_status,288 [CH_CMD] = ®_ch_cmd,289 [EV_CH_CMD] = ®_ev_ch_cmd,290 [GENERIC_CMD] = ®_generic_cmd,291 [HW_PARAM_2] = ®_hw_param_2,292 [HW_PARAM_4] = ®_hw_param_4,293 [CNTXT_TYPE_IRQ] = ®_cntxt_type_irq,294 [CNTXT_TYPE_IRQ_MSK] = ®_cntxt_type_irq_msk,295 [CNTXT_SRC_CH_IRQ] = ®_cntxt_src_ch_irq,296 [CNTXT_SRC_CH_IRQ_MSK] = ®_cntxt_src_ch_irq_msk,297 [CNTXT_SRC_CH_IRQ_CLR] = ®_cntxt_src_ch_irq_clr,298 [CNTXT_SRC_EV_CH_IRQ] = ®_cntxt_src_ev_ch_irq,299 [CNTXT_SRC_EV_CH_IRQ_MSK] = ®_cntxt_src_ev_ch_irq_msk,300 [CNTXT_SRC_EV_CH_IRQ_CLR] = ®_cntxt_src_ev_ch_irq_clr,301 [CNTXT_SRC_IEOB_IRQ] = ®_cntxt_src_ieob_irq,302 [CNTXT_SRC_IEOB_IRQ_MSK] = ®_cntxt_src_ieob_irq_msk,303 [CNTXT_SRC_IEOB_IRQ_CLR] = ®_cntxt_src_ieob_irq_clr,304 [CNTXT_GLOB_IRQ_STTS] = ®_cntxt_glob_irq_stts,305 [CNTXT_GLOB_IRQ_EN] = ®_cntxt_glob_irq_en,306 [CNTXT_GLOB_IRQ_CLR] = ®_cntxt_glob_irq_clr,307 [CNTXT_GSI_IRQ_STTS] = ®_cntxt_gsi_irq_stts,308 [CNTXT_GSI_IRQ_EN] = ®_cntxt_gsi_irq_en,309 [CNTXT_GSI_IRQ_CLR] = ®_cntxt_gsi_irq_clr,310 [CNTXT_INTSET] = ®_cntxt_intset,311 [ERROR_LOG] = ®_error_log,312 [ERROR_LOG_CLR] = ®_error_log_clr,313 [CNTXT_SCRATCH_0] = ®_cntxt_scratch_0,314};315 316const struct regs gsi_regs_v5_0 = {317 .reg_count = ARRAY_SIZE(reg_array),318 .reg = reg_array,319};320