32 lines · c
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */2/*3 * Driver for Microsemi VSC85xx PHYs4 *5 * Copyright (c) 2021 Microsemi Corporation6 */7 8#ifndef _MSCC_SERDES_PHY_H_9#define _MSCC_SERDES_PHY_H_10 11#define PHY_S6G_PLL5G_CFG2_GAIN_MASK GENMASK(9, 5)12#define PHY_S6G_PLL5G_CFG2_ENA_GAIN 113 14#define PHY_S6G_DES_PHY_CTRL_POS 1315#define PHY_S6G_DES_MBTR_CTRL_POS 1016#define PHY_S6G_DES_CPMD_SEL_POS 817#define PHY_S6G_DES_BW_HYST_POS 518#define PHY_S6G_DES_BW_ANA_POS 119#define PHY_S6G_DES_CFG 0x2120#define PHY_S6G_IB_CFG0 0x2221#define PHY_S6G_IB_CFG1 0x2322#define PHY_S6G_IB_CFG2 0x2423#define PHY_S6G_IB_CFG3 0x2524#define PHY_S6G_IB_CFG4 0x2625#define PHY_S6G_GP_CFG 0x2E26#define PHY_S6G_DFT_CFG0 0x3527#define PHY_S6G_IB_DFT_CFG2 0x3728 29int vsc85xx_sd6g_config_v2(struct phy_device *phydev);30 31#endif /* _MSCC_PHY_SERDES_H_ */32