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1// SPDX-License-Identifier: GPL-2.0+2/* Xilinx GMII2RGMII Converter driver3 *4 * Copyright (C) 2016 Xilinx, Inc.5 * Copyright (C) 2016 Andrew Lunn <andrew@lunn.ch>6 *7 * Author: Andrew Lunn <andrew@lunn.ch>8 * Author: Kedareswara rao Appana <appanad@xilinx.com>9 *10 * Description:11 * This driver is developed for Xilinx GMII2RGMII Converter12 */13#include <linux/module.h>14#include <linux/kernel.h>15#include <linux/mii.h>16#include <linux/mdio.h>17#include <linux/phy.h>18#include <linux/clk.h>19#include <linux/of_mdio.h>20 21#define XILINX_GMII2RGMII_REG 0x1022#define XILINX_GMII2RGMII_SPEED_MASK (BMCR_SPEED1000 | BMCR_SPEED100)23 24struct gmii2rgmii {25 struct phy_device *phy_dev;26 const struct phy_driver *phy_drv;27 struct phy_driver conv_phy_drv;28 struct mdio_device *mdio;29};30 31static void xgmiitorgmii_configure(struct gmii2rgmii *priv, int speed)32{33 struct mii_bus *bus = priv->mdio->bus;34 int addr = priv->mdio->addr;35 u16 val;36 37 val = mdiobus_read(bus, addr, XILINX_GMII2RGMII_REG);38 val &= ~XILINX_GMII2RGMII_SPEED_MASK;39 40 if (speed == SPEED_1000)41 val |= BMCR_SPEED1000;42 else if (speed == SPEED_100)43 val |= BMCR_SPEED100;44 else45 val |= BMCR_SPEED10;46 47 mdiobus_write(bus, addr, XILINX_GMII2RGMII_REG, val);48}49 50static int xgmiitorgmii_read_status(struct phy_device *phydev)51{52 struct gmii2rgmii *priv = mdiodev_get_drvdata(&phydev->mdio);53 int err;54 55 if (priv->phy_drv->read_status)56 err = priv->phy_drv->read_status(phydev);57 else58 err = genphy_read_status(phydev);59 if (err < 0)60 return err;61 62 xgmiitorgmii_configure(priv, phydev->speed);63 64 return 0;65}66 67static int xgmiitorgmii_set_loopback(struct phy_device *phydev, bool enable)68{69 struct gmii2rgmii *priv = mdiodev_get_drvdata(&phydev->mdio);70 int err;71 72 if (priv->phy_drv->set_loopback)73 err = priv->phy_drv->set_loopback(phydev, enable);74 else75 err = genphy_loopback(phydev, enable);76 if (err < 0)77 return err;78 79 xgmiitorgmii_configure(priv, phydev->speed);80 81 return 0;82}83 84static int xgmiitorgmii_probe(struct mdio_device *mdiodev)85{86 struct device *dev = &mdiodev->dev;87 struct device_node *np = dev->of_node, *phy_node;88 struct gmii2rgmii *priv;89 struct clk *clkin;90 91 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);92 if (!priv)93 return -ENOMEM;94 95 clkin = devm_clk_get_optional_enabled(dev, NULL);96 if (IS_ERR(clkin))97 return dev_err_probe(dev, PTR_ERR(clkin),98 "Failed to get and enable clock from Device Tree\n");99 100 phy_node = of_parse_phandle(np, "phy-handle", 0);101 if (!phy_node) {102 dev_err(dev, "Couldn't parse phy-handle\n");103 return -ENODEV;104 }105 106 priv->phy_dev = of_phy_find_device(phy_node);107 of_node_put(phy_node);108 if (!priv->phy_dev) {109 dev_info(dev, "Couldn't find phydev\n");110 return -EPROBE_DEFER;111 }112 113 if (!priv->phy_dev->drv) {114 dev_info(dev, "Attached phy not ready\n");115 put_device(&priv->phy_dev->mdio.dev);116 return -EPROBE_DEFER;117 }118 119 priv->mdio = mdiodev;120 priv->phy_drv = priv->phy_dev->drv;121 memcpy(&priv->conv_phy_drv, priv->phy_dev->drv,122 sizeof(struct phy_driver));123 priv->conv_phy_drv.read_status = xgmiitorgmii_read_status;124 priv->conv_phy_drv.set_loopback = xgmiitorgmii_set_loopback;125 mdiodev_set_drvdata(&priv->phy_dev->mdio, priv);126 priv->phy_dev->drv = &priv->conv_phy_drv;127 128 return 0;129}130 131static const struct of_device_id xgmiitorgmii_of_match[] = {132 { .compatible = "xlnx,gmii-to-rgmii-1.0" },133 {},134};135MODULE_DEVICE_TABLE(of, xgmiitorgmii_of_match);136 137static struct mdio_driver xgmiitorgmii_driver = {138 .probe = xgmiitorgmii_probe,139 .mdiodrv.driver = {140 .name = "xgmiitorgmii",141 .of_match_table = xgmiitorgmii_of_match,142 },143};144 145mdio_module_driver(xgmiitorgmii_driver);146 147MODULE_DESCRIPTION("Xilinx GMII2RGMII converter driver");148MODULE_LICENSE("GPL");149