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1/* CoreChip-sz SR9800 one chip USB 2.0 Ethernet Devices2 *3 * Author : Liu Junliang <liujunliang_ljl@163.com>4 *5 * Based on asix_common.c, asix_devices.c6 *7 * This file is licensed under the terms of the GNU General Public License8 * version 2. This program is licensed "as is" without any warranty of any9 * kind, whether express or implied.*10 */11 12#include <linux/module.h>13#include <linux/kmod.h>14#include <linux/init.h>15#include <linux/netdevice.h>16#include <linux/etherdevice.h>17#include <linux/ethtool.h>18#include <linux/workqueue.h>19#include <linux/mii.h>20#include <linux/usb.h>21#include <linux/crc32.h>22#include <linux/usb/usbnet.h>23#include <linux/slab.h>24#include <linux/if_vlan.h>25 26#include "sr9800.h"27 28static int sr_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,29 u16 size, void *data)30{31 int err;32 33 err = usbnet_read_cmd(dev, cmd, SR_REQ_RD_REG, value, index,34 data, size);35 if ((err != size) && (err >= 0))36 err = -EINVAL;37 38 return err;39}40 41static int sr_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,42 u16 size, void *data)43{44 int err;45 46 err = usbnet_write_cmd(dev, cmd, SR_REQ_WR_REG, value, index,47 data, size);48 if ((err != size) && (err >= 0))49 err = -EINVAL;50 51 return err;52}53 54static void55sr_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,56 u16 size, void *data)57{58 usbnet_write_cmd_async(dev, cmd, SR_REQ_WR_REG, value, index, data,59 size);60}61 62static int sr_rx_fixup(struct usbnet *dev, struct sk_buff *skb)63{64 int offset = 0;65 66 /* This check is no longer done by usbnet */67 if (skb->len < dev->net->hard_header_len)68 return 0;69 70 while (offset + sizeof(u32) < skb->len) {71 struct sk_buff *sr_skb;72 u16 size;73 u32 header = get_unaligned_le32(skb->data + offset);74 75 offset += sizeof(u32);76 /* get the packet length */77 size = (u16) (header & 0x7ff);78 if (size != ((~header >> 16) & 0x07ff)) {79 netdev_err(dev->net, "%s : Bad Header Length\n",80 __func__);81 return 0;82 }83 84 if ((size > dev->net->mtu + ETH_HLEN + VLAN_HLEN) ||85 (size + offset > skb->len)) {86 netdev_err(dev->net, "%s : Bad RX Length %d\n",87 __func__, size);88 return 0;89 }90 sr_skb = netdev_alloc_skb_ip_align(dev->net, size);91 if (!sr_skb)92 return 0;93 94 skb_put(sr_skb, size);95 memcpy(sr_skb->data, skb->data + offset, size);96 usbnet_skb_return(dev, sr_skb);97 98 offset += (size + 1) & 0xfffe;99 }100 101 if (skb->len != offset) {102 netdev_err(dev->net, "%s : Bad SKB Length %d\n", __func__,103 skb->len);104 return 0;105 }106 107 return 1;108}109 110static struct sk_buff *sr_tx_fixup(struct usbnet *dev, struct sk_buff *skb,111 gfp_t flags)112{113 int headroom = skb_headroom(skb);114 int tailroom = skb_tailroom(skb);115 u32 padbytes = 0xffff0000;116 u32 packet_len;117 int padlen;118 void *ptr;119 120 padlen = ((skb->len + 4) % (dev->maxpacket - 1)) ? 0 : 4;121 122 if ((!skb_cloned(skb)) && ((headroom + tailroom) >= (4 + padlen))) {123 if ((headroom < 4) || (tailroom < padlen)) {124 skb->data = memmove(skb->head + 4, skb->data,125 skb->len);126 skb_set_tail_pointer(skb, skb->len);127 }128 } else {129 struct sk_buff *skb2;130 skb2 = skb_copy_expand(skb, 4, padlen, flags);131 dev_kfree_skb_any(skb);132 skb = skb2;133 if (!skb)134 return NULL;135 }136 137 ptr = skb_push(skb, 4);138 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);139 put_unaligned_le32(packet_len, ptr);140 141 if (padlen) {142 put_unaligned_le32(padbytes, skb_tail_pointer(skb));143 skb_put(skb, sizeof(padbytes));144 }145 146 usbnet_set_skb_tx_stats(skb, 1, 0);147 return skb;148}149 150static void sr_status(struct usbnet *dev, struct urb *urb)151{152 struct sr9800_int_data *event;153 int link;154 155 if (urb->actual_length < 8)156 return;157 158 event = urb->transfer_buffer;159 link = event->link & 0x01;160 if (netif_carrier_ok(dev->net) != link) {161 usbnet_link_change(dev, link, 1);162 netdev_dbg(dev->net, "Link Status is: %d\n", link);163 }164 165 return;166}167 168static inline int sr_set_sw_mii(struct usbnet *dev)169{170 int ret;171 172 ret = sr_write_cmd(dev, SR_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);173 if (ret < 0)174 netdev_err(dev->net, "Failed to enable software MII access\n");175 return ret;176}177 178static inline int sr_set_hw_mii(struct usbnet *dev)179{180 int ret;181 182 ret = sr_write_cmd(dev, SR_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);183 if (ret < 0)184 netdev_err(dev->net, "Failed to enable hardware MII access\n");185 return ret;186}187 188static inline int sr_get_phy_addr(struct usbnet *dev)189{190 u8 buf[2];191 int ret;192 193 ret = sr_read_cmd(dev, SR_CMD_READ_PHY_ID, 0, 0, 2, buf);194 if (ret < 0) {195 netdev_err(dev->net, "%s : Error reading PHYID register:%02x\n",196 __func__, ret);197 goto out;198 }199 netdev_dbg(dev->net, "%s : returning 0x%04x\n", __func__,200 *((__le16 *)buf));201 202 ret = buf[1];203 204out:205 return ret;206}207 208static int sr_sw_reset(struct usbnet *dev, u8 flags)209{210 int ret;211 212 ret = sr_write_cmd(dev, SR_CMD_SW_RESET, flags, 0, 0, NULL);213 if (ret < 0)214 netdev_err(dev->net, "Failed to send software reset:%02x\n",215 ret);216 217 return ret;218}219 220static u16 sr_read_rx_ctl(struct usbnet *dev)221{222 __le16 v;223 int ret;224 225 ret = sr_read_cmd(dev, SR_CMD_READ_RX_CTL, 0, 0, 2, &v);226 if (ret < 0) {227 netdev_err(dev->net, "Error reading RX_CTL register:%02x\n",228 ret);229 goto out;230 }231 232 ret = le16_to_cpu(v);233out:234 return ret;235}236 237static int sr_write_rx_ctl(struct usbnet *dev, u16 mode)238{239 int ret;240 241 netdev_dbg(dev->net, "%s : mode = 0x%04x\n", __func__, mode);242 ret = sr_write_cmd(dev, SR_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);243 if (ret < 0)244 netdev_err(dev->net,245 "Failed to write RX_CTL mode to 0x%04x:%02x\n",246 mode, ret);247 248 return ret;249}250 251static u16 sr_read_medium_status(struct usbnet *dev)252{253 __le16 v;254 int ret;255 256 ret = sr_read_cmd(dev, SR_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);257 if (ret < 0) {258 netdev_err(dev->net,259 "Error reading Medium Status register:%02x\n", ret);260 return ret; /* TODO: callers not checking for error ret */261 }262 263 return le16_to_cpu(v);264}265 266static int sr_write_medium_mode(struct usbnet *dev, u16 mode)267{268 int ret;269 270 netdev_dbg(dev->net, "%s : mode = 0x%04x\n", __func__, mode);271 ret = sr_write_cmd(dev, SR_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);272 if (ret < 0)273 netdev_err(dev->net,274 "Failed to write Medium Mode mode to 0x%04x:%02x\n",275 mode, ret);276 return ret;277}278 279static int sr_write_gpio(struct usbnet *dev, u16 value, int sleep)280{281 int ret;282 283 netdev_dbg(dev->net, "%s : value = 0x%04x\n", __func__, value);284 ret = sr_write_cmd(dev, SR_CMD_WRITE_GPIOS, value, 0, 0, NULL);285 if (ret < 0)286 netdev_err(dev->net, "Failed to write GPIO value 0x%04x:%02x\n",287 value, ret);288 if (sleep)289 msleep(sleep);290 291 return ret;292}293 294/* SR9800 have a 16-bit RX_CTL value */295static void sr_set_multicast(struct net_device *net)296{297 struct usbnet *dev = netdev_priv(net);298 struct sr_data *data = (struct sr_data *)&dev->data;299 u16 rx_ctl = SR_DEFAULT_RX_CTL;300 301 if (net->flags & IFF_PROMISC) {302 rx_ctl |= SR_RX_CTL_PRO;303 } else if (net->flags & IFF_ALLMULTI ||304 netdev_mc_count(net) > SR_MAX_MCAST) {305 rx_ctl |= SR_RX_CTL_AMALL;306 } else if (netdev_mc_empty(net)) {307 /* just broadcast and directed */308 } else {309 /* We use the 20 byte dev->data310 * for our 8 byte filter buffer311 * to avoid allocating memory that312 * is tricky to free later313 */314 struct netdev_hw_addr *ha;315 u32 crc_bits;316 317 memset(data->multi_filter, 0, SR_MCAST_FILTER_SIZE);318 319 /* Build the multicast hash filter. */320 netdev_for_each_mc_addr(ha, net) {321 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;322 data->multi_filter[crc_bits >> 3] |=323 1 << (crc_bits & 7);324 }325 326 sr_write_cmd_async(dev, SR_CMD_WRITE_MULTI_FILTER, 0, 0,327 SR_MCAST_FILTER_SIZE, data->multi_filter);328 329 rx_ctl |= SR_RX_CTL_AM;330 }331 332 sr_write_cmd_async(dev, SR_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);333}334 335static int sr_mdio_read(struct net_device *net, int phy_id, int loc)336{337 struct usbnet *dev = netdev_priv(net);338 __le16 res = 0;339 340 mutex_lock(&dev->phy_mutex);341 sr_set_sw_mii(dev);342 sr_read_cmd(dev, SR_CMD_READ_MII_REG, phy_id, (__u16)loc, 2, &res);343 sr_set_hw_mii(dev);344 mutex_unlock(&dev->phy_mutex);345 346 netdev_dbg(dev->net,347 "%s : phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", __func__,348 phy_id, loc, le16_to_cpu(res));349 350 return le16_to_cpu(res);351}352 353static void354sr_mdio_write(struct net_device *net, int phy_id, int loc, int val)355{356 struct usbnet *dev = netdev_priv(net);357 __le16 res = cpu_to_le16(val);358 359 netdev_dbg(dev->net,360 "%s : phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", __func__,361 phy_id, loc, val);362 mutex_lock(&dev->phy_mutex);363 sr_set_sw_mii(dev);364 sr_write_cmd(dev, SR_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);365 sr_set_hw_mii(dev);366 mutex_unlock(&dev->phy_mutex);367}368 369/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */370static u32 sr_get_phyid(struct usbnet *dev)371{372 int phy_reg;373 u32 phy_id;374 int i;375 376 /* Poll for the rare case the FW or phy isn't ready yet. */377 for (i = 0; i < 100; i++) {378 phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);379 if (phy_reg != 0 && phy_reg != 0xFFFF)380 break;381 mdelay(1);382 }383 384 if (phy_reg <= 0 || phy_reg == 0xFFFF)385 return 0;386 387 phy_id = (phy_reg & 0xffff) << 16;388 389 phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);390 if (phy_reg < 0)391 return 0;392 393 phy_id |= (phy_reg & 0xffff);394 395 return phy_id;396}397 398static void399sr_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)400{401 struct usbnet *dev = netdev_priv(net);402 u8 opt;403 404 if (sr_read_cmd(dev, SR_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {405 wolinfo->supported = 0;406 wolinfo->wolopts = 0;407 return;408 }409 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;410 wolinfo->wolopts = 0;411 if (opt & SR_MONITOR_LINK)412 wolinfo->wolopts |= WAKE_PHY;413 if (opt & SR_MONITOR_MAGIC)414 wolinfo->wolopts |= WAKE_MAGIC;415}416 417static int418sr_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)419{420 struct usbnet *dev = netdev_priv(net);421 u8 opt = 0;422 423 if (wolinfo->wolopts & ~(WAKE_PHY | WAKE_MAGIC))424 return -EINVAL;425 426 if (wolinfo->wolopts & WAKE_PHY)427 opt |= SR_MONITOR_LINK;428 if (wolinfo->wolopts & WAKE_MAGIC)429 opt |= SR_MONITOR_MAGIC;430 431 if (sr_write_cmd(dev, SR_CMD_WRITE_MONITOR_MODE,432 opt, 0, 0, NULL) < 0)433 return -EINVAL;434 435 return 0;436}437 438static int sr_get_eeprom_len(struct net_device *net)439{440 struct usbnet *dev = netdev_priv(net);441 struct sr_data *data = (struct sr_data *)&dev->data;442 443 return data->eeprom_len;444}445 446static int sr_get_eeprom(struct net_device *net,447 struct ethtool_eeprom *eeprom, u8 *data)448{449 struct usbnet *dev = netdev_priv(net);450 __le16 *ebuf = (__le16 *)data;451 int ret;452 int i;453 454 /* Crude hack to ensure that we don't overwrite memory455 * if an odd length is supplied456 */457 if (eeprom->len % 2)458 return -EINVAL;459 460 eeprom->magic = SR_EEPROM_MAGIC;461 462 /* sr9800 returns 2 bytes from eeprom on read */463 for (i = 0; i < eeprom->len / 2; i++) {464 ret = sr_read_cmd(dev, SR_CMD_READ_EEPROM, eeprom->offset + i,465 0, 2, &ebuf[i]);466 if (ret < 0)467 return -EINVAL;468 }469 return 0;470}471 472static void sr_get_drvinfo(struct net_device *net,473 struct ethtool_drvinfo *info)474{475 /* Inherit standard device info */476 usbnet_get_drvinfo(net, info);477 strscpy(info->driver, DRIVER_NAME, sizeof(info->driver));478 strscpy(info->version, DRIVER_VERSION, sizeof(info->version));479}480 481static u32 sr_get_link(struct net_device *net)482{483 struct usbnet *dev = netdev_priv(net);484 485 return mii_link_ok(&dev->mii);486}487 488static int sr_ioctl(struct net_device *net, struct ifreq *rq, int cmd)489{490 struct usbnet *dev = netdev_priv(net);491 492 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);493}494 495static int sr_set_mac_address(struct net_device *net, void *p)496{497 struct usbnet *dev = netdev_priv(net);498 struct sr_data *data = (struct sr_data *)&dev->data;499 struct sockaddr *addr = p;500 501 if (netif_running(net))502 return -EBUSY;503 if (!is_valid_ether_addr(addr->sa_data))504 return -EADDRNOTAVAIL;505 506 eth_hw_addr_set(net, addr->sa_data);507 508 /* We use the 20 byte dev->data509 * for our 6 byte mac buffer510 * to avoid allocating memory that511 * is tricky to free later512 */513 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);514 sr_write_cmd_async(dev, SR_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,515 data->mac_addr);516 517 return 0;518}519 520static const struct ethtool_ops sr9800_ethtool_ops = {521 .get_drvinfo = sr_get_drvinfo,522 .get_link = sr_get_link,523 .get_msglevel = usbnet_get_msglevel,524 .set_msglevel = usbnet_set_msglevel,525 .get_wol = sr_get_wol,526 .set_wol = sr_set_wol,527 .get_eeprom_len = sr_get_eeprom_len,528 .get_eeprom = sr_get_eeprom,529 .nway_reset = usbnet_nway_reset,530 .get_link_ksettings = usbnet_get_link_ksettings_mii,531 .set_link_ksettings = usbnet_set_link_ksettings_mii,532};533 534static int sr9800_link_reset(struct usbnet *dev)535{536 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };537 u16 mode;538 539 mii_check_media(&dev->mii, 1, 1);540 mii_ethtool_gset(&dev->mii, &ecmd);541 mode = SR9800_MEDIUM_DEFAULT;542 543 if (ethtool_cmd_speed(&ecmd) != SPEED_100)544 mode &= ~SR_MEDIUM_PS;545 546 if (ecmd.duplex != DUPLEX_FULL)547 mode &= ~SR_MEDIUM_FD;548 549 netdev_dbg(dev->net, "%s : speed: %u duplex: %d mode: 0x%04x\n",550 __func__, ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);551 552 sr_write_medium_mode(dev, mode);553 554 return 0;555}556 557 558static int sr9800_set_default_mode(struct usbnet *dev)559{560 u16 rx_ctl;561 int ret;562 563 sr_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);564 sr_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,565 ADVERTISE_ALL | ADVERTISE_CSMA);566 mii_nway_restart(&dev->mii);567 568 ret = sr_write_medium_mode(dev, SR9800_MEDIUM_DEFAULT);569 if (ret < 0)570 goto out;571 572 ret = sr_write_cmd(dev, SR_CMD_WRITE_IPG012,573 SR9800_IPG0_DEFAULT | SR9800_IPG1_DEFAULT,574 SR9800_IPG2_DEFAULT, 0, NULL);575 if (ret < 0) {576 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);577 goto out;578 }579 580 /* Set RX_CTL to default values with 2k buffer, and enable cactus */581 ret = sr_write_rx_ctl(dev, SR_DEFAULT_RX_CTL);582 if (ret < 0)583 goto out;584 585 rx_ctl = sr_read_rx_ctl(dev);586 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",587 rx_ctl);588 589 rx_ctl = sr_read_medium_status(dev);590 netdev_dbg(dev->net, "Medium Status:0x%04x after all initializations\n",591 rx_ctl);592 593 return 0;594out:595 return ret;596}597 598static int sr9800_reset(struct usbnet *dev)599{600 struct sr_data *data = (struct sr_data *)&dev->data;601 int ret, embd_phy;602 u16 rx_ctl;603 604 ret = sr_write_gpio(dev,605 SR_GPIO_RSE | SR_GPIO_GPO_2 | SR_GPIO_GPO2EN, 5);606 if (ret < 0)607 goto out;608 609 embd_phy = ((sr_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);610 611 ret = sr_write_cmd(dev, SR_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);612 if (ret < 0) {613 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);614 goto out;615 }616 617 ret = sr_sw_reset(dev, SR_SWRESET_IPPD | SR_SWRESET_PRL);618 if (ret < 0)619 goto out;620 621 msleep(150);622 623 ret = sr_sw_reset(dev, SR_SWRESET_CLEAR);624 if (ret < 0)625 goto out;626 627 msleep(150);628 629 if (embd_phy) {630 ret = sr_sw_reset(dev, SR_SWRESET_IPRL);631 if (ret < 0)632 goto out;633 } else {634 ret = sr_sw_reset(dev, SR_SWRESET_PRTE);635 if (ret < 0)636 goto out;637 }638 639 msleep(150);640 rx_ctl = sr_read_rx_ctl(dev);641 netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);642 ret = sr_write_rx_ctl(dev, 0x0000);643 if (ret < 0)644 goto out;645 646 rx_ctl = sr_read_rx_ctl(dev);647 netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);648 649 ret = sr_sw_reset(dev, SR_SWRESET_PRL);650 if (ret < 0)651 goto out;652 653 msleep(150);654 655 ret = sr_sw_reset(dev, SR_SWRESET_IPRL | SR_SWRESET_PRL);656 if (ret < 0)657 goto out;658 659 msleep(150);660 661 ret = sr9800_set_default_mode(dev);662 if (ret < 0)663 goto out;664 665 /* Rewrite MAC address */666 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);667 ret = sr_write_cmd(dev, SR_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,668 data->mac_addr);669 if (ret < 0)670 goto out;671 672 return 0;673 674out:675 return ret;676}677 678static const struct net_device_ops sr9800_netdev_ops = {679 .ndo_open = usbnet_open,680 .ndo_stop = usbnet_stop,681 .ndo_start_xmit = usbnet_start_xmit,682 .ndo_tx_timeout = usbnet_tx_timeout,683 .ndo_change_mtu = usbnet_change_mtu,684 .ndo_get_stats64 = dev_get_tstats64,685 .ndo_set_mac_address = sr_set_mac_address,686 .ndo_validate_addr = eth_validate_addr,687 .ndo_eth_ioctl = sr_ioctl,688 .ndo_set_rx_mode = sr_set_multicast,689};690 691static int sr9800_phy_powerup(struct usbnet *dev)692{693 int ret;694 695 /* set the embedded Ethernet PHY in power-down state */696 ret = sr_sw_reset(dev, SR_SWRESET_IPPD | SR_SWRESET_IPRL);697 if (ret < 0) {698 netdev_err(dev->net, "Failed to power down PHY : %d\n", ret);699 return ret;700 }701 msleep(20);702 703 /* set the embedded Ethernet PHY in power-up state */704 ret = sr_sw_reset(dev, SR_SWRESET_IPRL);705 if (ret < 0) {706 netdev_err(dev->net, "Failed to reset PHY: %d\n", ret);707 return ret;708 }709 msleep(600);710 711 /* set the embedded Ethernet PHY in reset state */712 ret = sr_sw_reset(dev, SR_SWRESET_CLEAR);713 if (ret < 0) {714 netdev_err(dev->net, "Failed to power up PHY: %d\n", ret);715 return ret;716 }717 msleep(20);718 719 /* set the embedded Ethernet PHY in power-up state */720 ret = sr_sw_reset(dev, SR_SWRESET_IPRL);721 if (ret < 0) {722 netdev_err(dev->net, "Failed to reset PHY: %d\n", ret);723 return ret;724 }725 726 return 0;727}728 729static int sr9800_bind(struct usbnet *dev, struct usb_interface *intf)730{731 struct sr_data *data = (struct sr_data *)&dev->data;732 u16 led01_mux, led23_mux;733 int ret, embd_phy;734 u8 addr[ETH_ALEN];735 u32 phyid;736 u16 rx_ctl;737 738 data->eeprom_len = SR9800_EEPROM_LEN;739 740 ret = usbnet_get_endpoints(dev, intf);741 if (ret)742 goto out;743 744 /* LED Setting Rule :745 * AABB:CCDD746 * AA : MFA0(LED0)747 * BB : MFA1(LED1)748 * CC : MFA2(LED2), Reserved for SR9800749 * DD : MFA3(LED3), Reserved for SR9800750 */751 led01_mux = (SR_LED_MUX_LINK_ACTIVE << 8) | SR_LED_MUX_LINK;752 led23_mux = (SR_LED_MUX_LINK_ACTIVE << 8) | SR_LED_MUX_TX_ACTIVE;753 ret = sr_write_cmd(dev, SR_CMD_LED_MUX, led01_mux, led23_mux, 0, NULL);754 if (ret < 0) {755 netdev_err(dev->net, "set LINK LED failed : %d\n", ret);756 goto out;757 }758 759 /* Get the MAC address */760 ret = sr_read_cmd(dev, SR_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, addr);761 if (ret < 0) {762 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);763 return ret;764 }765 eth_hw_addr_set(dev->net, addr);766 netdev_dbg(dev->net, "mac addr : %pM\n", dev->net->dev_addr);767 768 /* Initialize MII structure */769 dev->mii.dev = dev->net;770 dev->mii.mdio_read = sr_mdio_read;771 dev->mii.mdio_write = sr_mdio_write;772 dev->mii.phy_id_mask = 0x1f;773 dev->mii.reg_num_mask = 0x1f;774 dev->mii.phy_id = sr_get_phy_addr(dev);775 776 dev->net->netdev_ops = &sr9800_netdev_ops;777 dev->net->ethtool_ops = &sr9800_ethtool_ops;778 779 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);780 /* Reset the PHY to normal operation mode */781 ret = sr_write_cmd(dev, SR_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);782 if (ret < 0) {783 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);784 return ret;785 }786 787 /* Init PHY routine */788 ret = sr9800_phy_powerup(dev);789 if (ret < 0)790 goto out;791 792 rx_ctl = sr_read_rx_ctl(dev);793 netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);794 ret = sr_write_rx_ctl(dev, 0x0000);795 if (ret < 0)796 goto out;797 798 rx_ctl = sr_read_rx_ctl(dev);799 netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);800 801 /* Read PHYID register *AFTER* the PHY was reset properly */802 phyid = sr_get_phyid(dev);803 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);804 805 /* medium mode setting */806 ret = sr9800_set_default_mode(dev);807 if (ret < 0)808 goto out;809 810 if (dev->udev->speed == USB_SPEED_HIGH) {811 ret = sr_write_cmd(dev, SR_CMD_BULKIN_SIZE,812 SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_4K].byte_cnt,813 SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_4K].threshold,814 0, NULL);815 if (ret < 0) {816 netdev_err(dev->net, "Reset RX_CTL failed: %d\n", ret);817 goto out;818 }819 dev->rx_urb_size =820 SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_4K].size;821 } else {822 ret = sr_write_cmd(dev, SR_CMD_BULKIN_SIZE,823 SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_2K].byte_cnt,824 SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_2K].threshold,825 0, NULL);826 if (ret < 0) {827 netdev_err(dev->net, "Reset RX_CTL failed: %d\n", ret);828 goto out;829 }830 dev->rx_urb_size =831 SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_2K].size;832 }833 netdev_dbg(dev->net, "%s : setting rx_urb_size with : %zu\n", __func__,834 dev->rx_urb_size);835 return 0;836 837out:838 return ret;839}840 841static const struct driver_info sr9800_driver_info = {842 .description = "CoreChip SR9800 USB 2.0 Ethernet",843 .bind = sr9800_bind,844 .status = sr_status,845 .link_reset = sr9800_link_reset,846 .reset = sr9800_reset,847 .flags = DRIVER_FLAG,848 .rx_fixup = sr_rx_fixup,849 .tx_fixup = sr_tx_fixup,850};851 852static const struct usb_device_id products[] = {853 {854 USB_DEVICE(0x0fe6, 0x9800), /* SR9800 Device */855 .driver_info = (unsigned long) &sr9800_driver_info,856 },857 {}, /* END */858};859 860MODULE_DEVICE_TABLE(usb, products);861 862static struct usb_driver sr_driver = {863 .name = DRIVER_NAME,864 .id_table = products,865 .probe = usbnet_probe,866 .suspend = usbnet_suspend,867 .resume = usbnet_resume,868 .disconnect = usbnet_disconnect,869 .supports_autosuspend = 1,870};871 872module_usb_driver(sr_driver);873 874MODULE_AUTHOR("Liu Junliang <liujunliang_ljl@163.com");875MODULE_VERSION(DRIVER_VERSION);876MODULE_DESCRIPTION("SR9800 USB 2.0 USB2NET Dev : http://www.corechip-sz.com");877MODULE_LICENSE("GPL");878