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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * drivers/net/wan/slic_ds26522.c4 *5 * Copyright (C) 2016 Freescale Semiconductor, Inc.6 *7 * Author:Zhao Qiang<qiang.zhao@nxp.com>8 */9 10#include <linux/bitrev.h>11#include <linux/module.h>12#include <linux/device.h>13#include <linux/kernel.h>14#include <linux/sched.h>15#include <linux/kthread.h>16#include <linux/spi/spi.h>17#include <linux/wait.h>18#include <linux/param.h>19#include <linux/delay.h>20#include <linux/of.h>21#include <linux/of_address.h>22#include <linux/io.h>23#include "slic_ds26522.h"24 25#define SLIC_TRANS_LEN 126#define SLIC_TWO_LEN 227#define SLIC_THREE_LEN 328 29static struct spi_device *g_spi;30 31MODULE_DESCRIPTION("Slic Maxim DS26522 driver");32MODULE_LICENSE("GPL");33MODULE_AUTHOR("Zhao Qiang<B45475@freescale.com>");34 35/* the read/write format of address is36 * w/r|A13|A12|A11|A10|A9|A8|A7|A6|A5|A4|A3|A2|A1|A0|x37 */38static void slic_write(struct spi_device *spi, u16 addr,39 u8 data)40{41 u8 temp[3];42 43 addr = bitrev16(addr) >> 1;44 data = bitrev8(data);45 temp[0] = (u8)((addr >> 8) & 0x7f);46 temp[1] = (u8)(addr & 0xfe);47 temp[2] = data;48 49 /* write spi addr and value */50 spi_write(spi, &temp[0], SLIC_THREE_LEN);51}52 53static u8 slic_read(struct spi_device *spi, u16 addr)54{55 u8 temp[2];56 u8 data;57 58 addr = bitrev16(addr) >> 1;59 temp[0] = (u8)(((addr >> 8) & 0x7f) | 0x80);60 temp[1] = (u8)(addr & 0xfe);61 62 spi_write_then_read(spi, &temp[0], SLIC_TWO_LEN, &data,63 SLIC_TRANS_LEN);64 65 data = bitrev8(data);66 return data;67}68 69static bool get_slic_product_code(struct spi_device *spi)70{71 u8 device_id;72 73 device_id = slic_read(spi, DS26522_IDR_ADDR);74 if ((device_id & 0xf8) == 0x68)75 return true;76 else77 return false;78}79 80static void ds26522_e1_spec_config(struct spi_device *spi)81{82 /* Receive E1 Mode, Framer Disabled */83 slic_write(spi, DS26522_RMMR_ADDR, DS26522_RMMR_E1);84 85 /* Transmit E1 Mode, Framer Disable */86 slic_write(spi, DS26522_TMMR_ADDR, DS26522_TMMR_E1);87 88 /* Receive E1 Mode Framer Enable */89 slic_write(spi, DS26522_RMMR_ADDR,90 slic_read(spi, DS26522_RMMR_ADDR) | DS26522_RMMR_FRM_EN);91 92 /* Transmit E1 Mode Framer Enable */93 slic_write(spi, DS26522_TMMR_ADDR,94 slic_read(spi, DS26522_TMMR_ADDR) | DS26522_TMMR_FRM_EN);95 96 /* RCR1, receive E1 B8zs & ESF */97 slic_write(spi, DS26522_RCR1_ADDR,98 DS26522_RCR1_E1_HDB3 | DS26522_RCR1_E1_CCS);99 100 /* RSYSCLK=2.048MHz, RSYNC-Output */101 slic_write(spi, DS26522_RIOCR_ADDR,102 DS26522_RIOCR_2048KHZ | DS26522_RIOCR_RSIO_OUT);103 104 /* TCR1 Transmit E1 b8zs */105 slic_write(spi, DS26522_TCR1_ADDR, DS26522_TCR1_TB8ZS);106 107 /* TSYSCLK=2.048MHz, TSYNC-Output */108 slic_write(spi, DS26522_TIOCR_ADDR,109 DS26522_TIOCR_2048KHZ | DS26522_TIOCR_TSIO_OUT);110 111 /* Set E1TAF */112 slic_write(spi, DS26522_E1TAF_ADDR, DS26522_E1TAF_DEFAULT);113 114 /* Set E1TNAF register */115 slic_write(spi, DS26522_E1TNAF_ADDR, DS26522_E1TNAF_DEFAULT);116 117 /* Receive E1 Mode Framer Enable & init Done */118 slic_write(spi, DS26522_RMMR_ADDR, slic_read(spi, DS26522_RMMR_ADDR) |119 DS26522_RMMR_INIT_DONE);120 121 /* Transmit E1 Mode Framer Enable & init Done */122 slic_write(spi, DS26522_TMMR_ADDR, slic_read(spi, DS26522_TMMR_ADDR) |123 DS26522_TMMR_INIT_DONE);124 125 /* Configure LIU E1 mode */126 slic_write(spi, DS26522_LTRCR_ADDR, DS26522_LTRCR_E1);127 128 /* E1 Mode default 75 ohm w/Transmit Impedance Matlinking */129 slic_write(spi, DS26522_LTITSR_ADDR,130 DS26522_LTITSR_TLIS_75OHM | DS26522_LTITSR_LBOS_75OHM);131 132 /* E1 Mode default 75 ohm Long Haul w/Receive Impedance Matlinking */133 slic_write(spi, DS26522_LRISMR_ADDR,134 DS26522_LRISMR_75OHM | DS26522_LRISMR_MAX);135 136 /* Enable Transmit output */137 slic_write(spi, DS26522_LMCR_ADDR, DS26522_LMCR_TE);138}139 140static int slic_ds26522_init_configure(struct spi_device *spi)141{142 u16 addr;143 144 /* set clock */145 slic_write(spi, DS26522_GTCCR_ADDR, DS26522_GTCCR_BPREFSEL_REFCLKIN |146 DS26522_GTCCR_BFREQSEL_2048KHZ |147 DS26522_GTCCR_FREQSEL_2048KHZ);148 slic_write(spi, DS26522_GTCR2_ADDR, DS26522_GTCR2_TSSYNCOUT);149 slic_write(spi, DS26522_GFCR_ADDR, DS26522_GFCR_BPCLK_2048KHZ);150 151 /* set gtcr */152 slic_write(spi, DS26522_GTCR1_ADDR, DS26522_GTCR1);153 154 /* Global LIU Software Reset Register */155 slic_write(spi, DS26522_GLSRR_ADDR, DS26522_GLSRR_RESET);156 157 /* Global Framer and BERT Software Reset Register */158 slic_write(spi, DS26522_GFSRR_ADDR, DS26522_GFSRR_RESET);159 160 usleep_range(100, 120);161 162 slic_write(spi, DS26522_GLSRR_ADDR, DS26522_GLSRR_NORMAL);163 slic_write(spi, DS26522_GFSRR_ADDR, DS26522_GFSRR_NORMAL);164 165 /* Perform RX/TX SRESET,Reset receiver */166 slic_write(spi, DS26522_RMMR_ADDR, DS26522_RMMR_SFTRST);167 168 /* Reset tranceiver */169 slic_write(spi, DS26522_TMMR_ADDR, DS26522_TMMR_SFTRST);170 171 usleep_range(100, 120);172 173 /* Zero all Framer Registers */174 for (addr = DS26522_RF_ADDR_START; addr <= DS26522_RF_ADDR_END;175 addr++)176 slic_write(spi, addr, 0);177 178 for (addr = DS26522_TF_ADDR_START; addr <= DS26522_TF_ADDR_END;179 addr++)180 slic_write(spi, addr, 0);181 182 for (addr = DS26522_LIU_ADDR_START; addr <= DS26522_LIU_ADDR_END;183 addr++)184 slic_write(spi, addr, 0);185 186 for (addr = DS26522_BERT_ADDR_START; addr <= DS26522_BERT_ADDR_END;187 addr++)188 slic_write(spi, addr, 0);189 190 /* setup ds26522 for E1 specification */191 ds26522_e1_spec_config(spi);192 193 slic_write(spi, DS26522_GTCR1_ADDR, 0x00);194 195 return 0;196}197 198static void slic_ds26522_remove(struct spi_device *spi)199{200 pr_info("DS26522 module uninstalled\n");201}202 203static int slic_ds26522_probe(struct spi_device *spi)204{205 int ret = 0;206 207 g_spi = spi;208 spi->bits_per_word = 8;209 210 if (!get_slic_product_code(spi))211 return ret;212 213 ret = slic_ds26522_init_configure(spi);214 if (ret == 0)215 pr_info("DS26522 cs%d configured\n", spi_get_chipselect(spi, 0));216 217 return ret;218}219 220static const struct spi_device_id slic_ds26522_id[] = {221 { .name = "ds26522" },222 { /* sentinel */ },223};224MODULE_DEVICE_TABLE(spi, slic_ds26522_id);225 226static const struct of_device_id slic_ds26522_match[] = {227 {228 .compatible = "maxim,ds26522",229 },230 {},231};232MODULE_DEVICE_TABLE(of, slic_ds26522_match);233 234static struct spi_driver slic_ds26522_driver = {235 .driver = {236 .name = "ds26522",237 .bus = &spi_bus_type,238 .of_match_table = slic_ds26522_match,239 },240 .probe = slic_ds26522_probe,241 .remove = slic_ds26522_remove,242 .id_table = slic_ds26522_id,243};244 245module_spi_driver(slic_ds26522_driver);246