131 lines · c
1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * drivers/tdm/line_ctrl/slic_ds26522.h4 *5 * Copyright 2016 Freescale Semiconductor, Inc.6 *7 * Author: Zhao Qiang <B45475@freescale.com>8 */9 10#define DS26522_RF_ADDR_START 0x0011#define DS26522_RF_ADDR_END 0xef12#define DS26522_GLB_ADDR_START 0xf013#define DS26522_GLB_ADDR_END 0xff14#define DS26522_TF_ADDR_START 0x10015#define DS26522_TF_ADDR_END 0x1ef16#define DS26522_LIU_ADDR_START 0x100017#define DS26522_LIU_ADDR_END 0x101f18#define DS26522_TEST_ADDR_START 0x100819#define DS26522_TEST_ADDR_END 0x101f20#define DS26522_BERT_ADDR_START 0x110021#define DS26522_BERT_ADDR_END 0x110f22 23#define DS26522_RMMR_ADDR 0x8024#define DS26522_RCR1_ADDR 0x8125#define DS26522_RCR3_ADDR 0x8326#define DS26522_RIOCR_ADDR 0x8427 28#define DS26522_GTCR1_ADDR 0xf029#define DS26522_GFCR_ADDR 0xf130#define DS26522_GTCR2_ADDR 0xf231#define DS26522_GTCCR_ADDR 0xf332#define DS26522_GLSRR_ADDR 0xf533#define DS26522_GFSRR_ADDR 0xf634#define DS26522_IDR_ADDR 0xf835 36#define DS26522_E1TAF_ADDR 0x16437#define DS26522_E1TNAF_ADDR 0x16538#define DS26522_TMMR_ADDR 0x18039#define DS26522_TCR1_ADDR 0x18140#define DS26522_TIOCR_ADDR 0x18441 42#define DS26522_LTRCR_ADDR 0x100043#define DS26522_LTITSR_ADDR 0x100144#define DS26522_LMCR_ADDR 0x100245#define DS26522_LRISMR_ADDR 0x100746 47#define MAX_NUM_OF_CHANNELS 848#define PQ_MDS_8E1T1_BRD_REV 0x0049#define PQ_MDS_8E1T1_PLD_REV 0x0050 51#define DS26522_GTCCR_BPREFSEL_REFCLKIN 0xa052#define DS26522_GTCCR_BFREQSEL_1544KHZ 0x0853#define DS26522_GTCCR_FREQSEL_1544KHZ 0x0454#define DS26522_GTCCR_BFREQSEL_2048KHZ 0x0055#define DS26522_GTCCR_FREQSEL_2048KHZ 0x0056 57#define DS26522_GFCR_BPCLK_2048KHZ 0x0058 59#define DS26522_GTCR2_TSSYNCOUT 0x0260#define DS26522_GTCR1 0x0061 62#define DS26522_GFSRR_RESET 0x0163#define DS26522_GFSRR_NORMAL 0x0064 65#define DS26522_GLSRR_RESET 0x0166#define DS26522_GLSRR_NORMAL 0x0067 68#define DS26522_RMMR_SFTRST 0x0269#define DS26522_RMMR_FRM_EN 0x8070#define DS26522_RMMR_INIT_DONE 0x4071#define DS26522_RMMR_T1 0x0072#define DS26522_RMMR_E1 0x0173 74#define DS26522_E1TAF_DEFAULT 0x1b75#define DS26522_E1TNAF_DEFAULT 0x4076 77#define DS26522_TMMR_SFTRST 0x0278#define DS26522_TMMR_FRM_EN 0x8079#define DS26522_TMMR_INIT_DONE 0x4080#define DS26522_TMMR_T1 0x0081#define DS26522_TMMR_E1 0x0182 83#define DS26522_RCR1_T1_SYNCT 0x8084#define DS26522_RCR1_T1_RB8ZS 0x4085#define DS26522_RCR1_T1_SYNCC 0x0886 87#define DS26522_RCR1_E1_HDB3 0x4088#define DS26522_RCR1_E1_CCS 0x2089 90#define DS26522_RIOCR_1544KHZ 0x0091#define DS26522_RIOCR_2048KHZ 0x1092#define DS26522_RIOCR_RSIO_OUT 0x0093 94#define DS26522_RCR3_FLB 0x0195 96#define DS26522_TIOCR_1544KHZ 0x0097#define DS26522_TIOCR_2048KHZ 0x1098#define DS26522_TIOCR_TSIO_OUT 0x0499 100#define DS26522_TCR1_TB8ZS 0x04101 102#define DS26522_LTRCR_T1 0x02103#define DS26522_LTRCR_E1 0x00104 105#define DS26522_LTITSR_TLIS_75OHM 0x00106#define DS26522_LTITSR_LBOS_75OHM 0x00107#define DS26522_LTITSR_TLIS_100OHM 0x10108#define DS26522_LTITSR_TLIS_0DB_CSU 0x00109 110#define DS26522_LRISMR_75OHM 0x00111#define DS26522_LRISMR_100OHM 0x10112#define DS26522_LRISMR_MAX 0x03113 114#define DS26522_LMCR_TE 0x01115 116enum line_rate {117 LINE_RATE_T1, /* T1 line rate (1.544 Mbps) */118 LINE_RATE_E1 /* E1 line rate (2.048 Mbps) */119};120 121enum tdm_trans_mode {122 NORMAL = 0,123 FRAMER_LB124};125 126enum card_support_type {127 LM_CARD = 0,128 DS26522_CARD,129 NO_CARD130};131