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1/* SPDX-License-Identifier: ISC */2/*3 * Copyright (c) 2005-2011 Atheros Communications Inc.4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.6 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.7 */8 9#ifndef _CORE_H_10#define _CORE_H_11 12#include <linux/completion.h>13#include <linux/if_ether.h>14#include <linux/types.h>15#include <linux/pci.h>16#include <linux/uuid.h>17#include <linux/time.h>18#include <linux/leds.h>19 20#include "htt.h"21#include "htc.h"22#include "hw.h"23#include "targaddrs.h"24#include "wmi.h"25#include "../ath.h"26#include "../regd.h"27#include "../dfs_pattern_detector.h"28#include "spectral.h"29#include "thermal.h"30#include "wow.h"31#include "swap.h"32 33#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)34#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)35#define WO(_f) ((_f##_OFFSET) >> 2)36 37#define ATH10K_SCAN_ID 038#define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */39#define WMI_READY_TIMEOUT (5 * HZ)40#define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)41#define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)42#define ATH10K_NUM_CHANS 4143#define ATH10K_MAX_5G_CHAN 17344 45/* Antenna noise floor */46#define ATH10K_DEFAULT_NOISE_FLOOR -9547 48#define ATH10K_INVALID_RSSI 12849 50#define ATH10K_MAX_NUM_MGMT_PENDING 12851 52/* number of failed packets (20 packets with 16 sw reties each) */53#define ATH10K_KICKOUT_THRESHOLD (20 * 16)54 55/*56 * Use insanely high numbers to make sure that the firmware implementation57 * won't start, we have the same functionality already in hostapd. Unit58 * is seconds.59 */60#define ATH10K_KEEPALIVE_MIN_IDLE 374761#define ATH10K_KEEPALIVE_MAX_IDLE 389562#define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 390063 64/* SMBIOS type containing Board Data File Name Extension */65#define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF866 67/* SMBIOS type structure length (excluding strings-set) */68#define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x969 70/* Offset pointing to Board Data File Name Extension */71#define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x872 73/* Board Data File Name Extension string length.74 * String format: BDF_<Customer ID>_<Extension>\075 */76#define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x2077 78/* The magic used by QCA spec */79#define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"80 81/* Default Airtime weight multiplier (Tuned for multiclient performance) */82#define ATH10K_AIRTIME_WEIGHT_MULTIPLIER 483 84#define ATH10K_MAX_RETRY_COUNT 3085 86#define ATH10K_ITER_NORMAL_FLAGS (IEEE80211_IFACE_ITER_NORMAL | \87 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)88#define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\89 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)90 91struct ath10k;92 93static inline const char *ath10k_bus_str(enum ath10k_bus bus)94{95 switch (bus) {96 case ATH10K_BUS_PCI:97 return "pci";98 case ATH10K_BUS_AHB:99 return "ahb";100 case ATH10K_BUS_SDIO:101 return "sdio";102 case ATH10K_BUS_USB:103 return "usb";104 case ATH10K_BUS_SNOC:105 return "snoc";106 }107 108 return "unknown";109}110 111enum ath10k_skb_flags {112 ATH10K_SKB_F_NO_HWCRYPT = BIT(0),113 ATH10K_SKB_F_DTIM_ZERO = BIT(1),114 ATH10K_SKB_F_DELIVER_CAB = BIT(2),115 ATH10K_SKB_F_MGMT = BIT(3),116 ATH10K_SKB_F_QOS = BIT(4),117 ATH10K_SKB_F_RAW_TX = BIT(5),118 ATH10K_SKB_F_NOACK_TID = BIT(6),119};120 121struct ath10k_skb_cb {122 dma_addr_t paddr;123 u8 flags;124 u8 eid;125 u16 msdu_id;126 u16 airtime_est;127 struct ieee80211_vif *vif;128 struct ieee80211_txq *txq;129 u32 ucast_cipher;130} __packed;131 132struct ath10k_skb_rxcb {133 dma_addr_t paddr;134 struct hlist_node hlist;135 u8 eid;136};137 138static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)139{140 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >141 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);142 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;143}144 145static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)146{147 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));148 return (struct ath10k_skb_rxcb *)skb->cb;149}150 151#define ATH10K_RXCB_SKB(rxcb) \152 container_of((void *)rxcb, struct sk_buff, cb)153 154static inline u32 host_interest_item_address(u32 item_offset)155{156 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;157}158 159enum ath10k_phy_mode {160 ATH10K_PHY_MODE_LEGACY = 0,161 ATH10K_PHY_MODE_HT = 1,162 ATH10K_PHY_MODE_VHT = 2,163};164 165/* Data rate 100KBPS based on IE Index */166struct ath10k_index_ht_data_rate_type {167 u8 beacon_rate_index;168 u16 supported_rate[4];169};170 171/* Data rate 100KBPS based on IE Index */172struct ath10k_index_vht_data_rate_type {173 u8 beacon_rate_index;174 u16 supported_VHT80_rate[2];175 u16 supported_VHT40_rate[2];176 u16 supported_VHT20_rate[2];177};178 179struct ath10k_bmi {180 bool done_sent;181};182 183struct ath10k_mem_chunk {184 void *vaddr;185 dma_addr_t paddr;186 u32 len;187 u32 req_id;188};189 190struct ath10k_wmi {191 enum ath10k_htc_ep_id eid;192 struct completion service_ready;193 struct completion unified_ready;194 struct completion barrier;195 struct completion radar_confirm;196 wait_queue_head_t tx_credits_wq;197 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);198 struct wmi_cmd_map *cmd;199 struct wmi_vdev_param_map *vdev_param;200 struct wmi_pdev_param_map *pdev_param;201 struct wmi_peer_param_map *peer_param;202 const struct wmi_ops *ops;203 const struct wmi_peer_flags_map *peer_flags;204 205 u32 mgmt_max_num_pending_tx;206 207 /* Protected by data_lock */208 struct idr mgmt_pending_tx;209 210 u32 num_mem_chunks;211 u32 rx_decap_mode;212 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];213};214 215struct ath10k_fw_stats_peer {216 struct list_head list;217 218 u8 peer_macaddr[ETH_ALEN];219 u32 peer_rssi;220 u32 peer_tx_rate;221 u32 peer_rx_rate; /* 10x only */222 u64 rx_duration;223};224 225struct ath10k_fw_extd_stats_peer {226 struct list_head list;227 228 u8 peer_macaddr[ETH_ALEN];229 u64 rx_duration;230};231 232struct ath10k_fw_stats_vdev {233 struct list_head list;234 235 u32 vdev_id;236 u32 beacon_snr;237 u32 data_snr;238 u32 num_tx_frames[4];239 u32 num_rx_frames;240 u32 num_tx_frames_retries[4];241 u32 num_tx_frames_failures[4];242 u32 num_rts_fail;243 u32 num_rts_success;244 u32 num_rx_err;245 u32 num_rx_discard;246 u32 num_tx_not_acked;247 u32 tx_rate_history[10];248 u32 beacon_rssi_history[10];249};250 251struct ath10k_fw_stats_vdev_extd {252 struct list_head list;253 254 u32 vdev_id;255 u32 ppdu_aggr_cnt;256 u32 ppdu_noack;257 u32 mpdu_queued;258 u32 ppdu_nonaggr_cnt;259 u32 mpdu_sw_requeued;260 u32 mpdu_suc_retry;261 u32 mpdu_suc_multitry;262 u32 mpdu_fail_retry;263 u32 tx_ftm_suc;264 u32 tx_ftm_suc_retry;265 u32 tx_ftm_fail;266 u32 rx_ftmr_cnt;267 u32 rx_ftmr_dup_cnt;268 u32 rx_iftmr_cnt;269 u32 rx_iftmr_dup_cnt;270};271 272struct ath10k_fw_stats_pdev {273 struct list_head list;274 275 /* PDEV stats */276 s32 ch_noise_floor;277 u32 tx_frame_count; /* Cycles spent transmitting frames */278 u32 rx_frame_count; /* Cycles spent receiving frames */279 u32 rx_clear_count; /* Total channel busy time, evidently */280 u32 cycle_count; /* Total on-channel time */281 u32 phy_err_count;282 u32 chan_tx_power;283 u32 ack_rx_bad;284 u32 rts_bad;285 u32 rts_good;286 u32 fcs_bad;287 u32 no_beacons;288 u32 mib_int_count;289 290 /* PDEV TX stats */291 s32 comp_queued;292 s32 comp_delivered;293 s32 msdu_enqued;294 s32 mpdu_enqued;295 s32 wmm_drop;296 s32 local_enqued;297 s32 local_freed;298 s32 hw_queued;299 s32 hw_reaped;300 s32 underrun;301 u32 hw_paused;302 s32 tx_abort;303 s32 mpdus_requeued;304 u32 tx_ko;305 u32 data_rc;306 u32 self_triggers;307 u32 sw_retry_failure;308 u32 illgl_rate_phy_err;309 u32 pdev_cont_xretry;310 u32 pdev_tx_timeout;311 u32 pdev_resets;312 u32 phy_underrun;313 u32 txop_ovf;314 u32 seq_posted;315 u32 seq_failed_queueing;316 u32 seq_completed;317 u32 seq_restarted;318 u32 mu_seq_posted;319 u32 mpdus_sw_flush;320 u32 mpdus_hw_filter;321 u32 mpdus_truncated;322 u32 mpdus_ack_failed;323 u32 mpdus_expired;324 325 /* PDEV RX stats */326 s32 mid_ppdu_route_change;327 s32 status_rcvd;328 s32 r0_frags;329 s32 r1_frags;330 s32 r2_frags;331 s32 r3_frags;332 s32 htt_msdus;333 s32 htt_mpdus;334 s32 loc_msdus;335 s32 loc_mpdus;336 s32 oversize_amsdu;337 s32 phy_errs;338 s32 phy_err_drop;339 s32 mpdu_errs;340 s32 rx_ovfl_errs;341};342 343struct ath10k_fw_stats {344 bool extended;345 struct list_head pdevs;346 struct list_head vdevs;347 struct list_head peers;348 struct list_head peers_extd;349};350 351#define ATH10K_TPC_TABLE_TYPE_FLAG 1352#define ATH10K_TPC_PREAM_TABLE_END 0xFFFF353 354struct ath10k_tpc_table {355 u32 pream_idx[WMI_TPC_RATE_MAX];356 u8 rate_code[WMI_TPC_RATE_MAX];357 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];358};359 360struct ath10k_tpc_stats {361 u32 reg_domain;362 u32 chan_freq;363 u32 phy_mode;364 u32 twice_antenna_reduction;365 u32 twice_max_rd_power;366 s32 twice_antenna_gain;367 u32 power_limit;368 u32 num_tx_chain;369 u32 ctl;370 u32 rate_max;371 u8 flag[WMI_TPC_FLAG];372 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];373};374 375struct ath10k_tpc_table_final {376 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX];377 u8 rate_code[WMI_TPC_FINAL_RATE_MAX];378 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];379};380 381struct ath10k_tpc_stats_final {382 u32 reg_domain;383 u32 chan_freq;384 u32 phy_mode;385 u32 twice_antenna_reduction;386 u32 twice_max_rd_power;387 s32 twice_antenna_gain;388 u32 power_limit;389 u32 num_tx_chain;390 u32 ctl;391 u32 rate_max;392 u8 flag[WMI_TPC_FLAG];393 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG];394};395 396struct ath10k_dfs_stats {397 u32 phy_errors;398 u32 pulses_total;399 u32 pulses_detected;400 u32 pulses_discarded;401 u32 radar_detected;402};403 404enum ath10k_radar_confirmation_state {405 ATH10K_RADAR_CONFIRMATION_IDLE = 0,406 ATH10K_RADAR_CONFIRMATION_INPROGRESS,407 ATH10K_RADAR_CONFIRMATION_STOPPED,408};409 410struct ath10k_radar_found_info {411 u32 pri_min;412 u32 pri_max;413 u32 width_min;414 u32 width_max;415 u32 sidx_min;416 u32 sidx_max;417};418 419#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */420 421struct ath10k_peer {422 struct list_head list;423 struct ieee80211_vif *vif;424 struct ieee80211_sta *sta;425 426 bool removed;427 int vdev_id;428 u8 addr[ETH_ALEN];429 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);430 431 /* protected by ar->data_lock */432 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];433 union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];434 bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS];435 union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];436 u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS];437 struct {438 enum htt_security_types sec_type;439 int pn_len;440 } rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX];441};442 443struct ath10k_txq {444 struct list_head list;445 unsigned long num_fw_queued;446 unsigned long num_push_allowed;447};448 449enum ath10k_pkt_rx_err {450 ATH10K_PKT_RX_ERR_FCS,451 ATH10K_PKT_RX_ERR_TKIP,452 ATH10K_PKT_RX_ERR_CRYPT,453 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL,454 ATH10K_PKT_RX_ERR_MAX,455};456 457enum ath10k_ampdu_subfrm_num {458 ATH10K_AMPDU_SUBFRM_NUM_10,459 ATH10K_AMPDU_SUBFRM_NUM_20,460 ATH10K_AMPDU_SUBFRM_NUM_30,461 ATH10K_AMPDU_SUBFRM_NUM_40,462 ATH10K_AMPDU_SUBFRM_NUM_50,463 ATH10K_AMPDU_SUBFRM_NUM_60,464 ATH10K_AMPDU_SUBFRM_NUM_MORE,465 ATH10K_AMPDU_SUBFRM_NUM_MAX,466};467 468enum ath10k_amsdu_subfrm_num {469 ATH10K_AMSDU_SUBFRM_NUM_1,470 ATH10K_AMSDU_SUBFRM_NUM_2,471 ATH10K_AMSDU_SUBFRM_NUM_3,472 ATH10K_AMSDU_SUBFRM_NUM_4,473 ATH10K_AMSDU_SUBFRM_NUM_MORE,474 ATH10K_AMSDU_SUBFRM_NUM_MAX,475};476 477struct ath10k_sta_tid_stats {478 unsigned long rx_pkt_from_fw;479 unsigned long rx_pkt_unchained;480 unsigned long rx_pkt_drop_chained;481 unsigned long rx_pkt_drop_filter;482 unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];483 unsigned long rx_pkt_queued_for_mac;484 unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];485 unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];486};487 488enum ath10k_counter_type {489 ATH10K_COUNTER_TYPE_BYTES,490 ATH10K_COUNTER_TYPE_PKTS,491 ATH10K_COUNTER_TYPE_MAX,492};493 494enum ath10k_stats_type {495 ATH10K_STATS_TYPE_SUCC,496 ATH10K_STATS_TYPE_FAIL,497 ATH10K_STATS_TYPE_RETRY,498 ATH10K_STATS_TYPE_AMPDU,499 ATH10K_STATS_TYPE_MAX,500};501 502struct ath10k_htt_data_stats {503 u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM];504 u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM];505 u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM];506 u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM];507 u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM];508 u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM];509 u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM];510};511 512struct ath10k_htt_tx_stats {513 struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX];514 u64 tx_duration;515 u64 ba_fails;516 u64 ack_fails;517};518 519#define ATH10K_TID_MAX 8520 521struct ath10k_sta {522 struct ath10k_vif *arvif;523 524 /* the following are protected by ar->data_lock */525 u32 changed; /* IEEE80211_RC_* */526 u32 bw;527 u32 nss;528 u32 smps;529 u16 peer_id;530 struct rate_info txrate;531 struct ieee80211_tx_info tx_info;532 u32 tx_retries;533 u32 tx_failed;534 u32 last_tx_bitrate;535 536 u32 rx_rate_code;537 u32 rx_bitrate_kbps;538 u32 tx_rate_code;539 u32 tx_bitrate_kbps;540 struct work_struct update_wk;541 u64 rx_duration;542 struct ath10k_htt_tx_stats *tx_stats;543 u32 ucast_cipher;544 545#ifdef CONFIG_MAC80211_DEBUGFS546 /* protected by conf_mutex */547 bool aggr_mode;548 549 /* Protected with ar->data_lock */550 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];551#endif552 /* Protected with ar->data_lock */553 u32 peer_ps_state;554 struct work_struct tid_config_wk;555 int noack[ATH10K_TID_MAX];556 int retry_long[ATH10K_TID_MAX];557 int ampdu[ATH10K_TID_MAX];558 u8 rate_ctrl[ATH10K_TID_MAX];559 u32 rate_code[ATH10K_TID_MAX];560 int rtscts[ATH10K_TID_MAX];561};562 563#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)564#define ATH10K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)565 566enum ath10k_beacon_state {567 ATH10K_BEACON_SCHEDULED = 0,568 ATH10K_BEACON_SENDING,569 ATH10K_BEACON_SENT,570};571 572struct ath10k_vif {573 struct list_head list;574 575 u32 vdev_id;576 u16 peer_id;577 enum wmi_vdev_type vdev_type;578 enum wmi_vdev_subtype vdev_subtype;579 u32 beacon_interval;580 u32 dtim_period;581 struct sk_buff *beacon;582 /* protected by data_lock */583 enum ath10k_beacon_state beacon_state;584 void *beacon_buf;585 dma_addr_t beacon_paddr;586 unsigned long tx_paused; /* arbitrary values defined by target */587 588 struct ath10k *ar;589 struct ieee80211_vif *vif;590 591 bool is_started;592 bool is_up;593 bool spectral_enabled;594 bool ps;595 u32 aid;596 u8 bssid[ETH_ALEN];597 598 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];599 s8 def_wep_key_idx;600 601 u16 tx_seq_no;602 603 union {604 struct {605 u32 uapsd;606 } sta;607 struct {608 /* 512 stations */609 u8 tim_bitmap[64];610 u8 tim_len;611 u32 ssid_len;612 u8 ssid[IEEE80211_MAX_SSID_LEN] __nonstring;613 bool hidden_ssid;614 /* P2P_IE with NoA attribute for P2P_GO case */615 u32 noa_len;616 u8 *noa_data;617 } ap;618 } u;619 620 bool use_cts_prot;621 bool nohwcrypt;622 int num_legacy_stations;623 int txpower;624 bool ftm_responder;625 struct wmi_wmm_params_all_arg wmm_params;626 struct work_struct ap_csa_work;627 struct delayed_work connection_loss_work;628 struct cfg80211_bitrate_mask bitrate_mask;629 630 /* For setting VHT peer fixed rate, protected by conf_mutex */631 int vht_num_rates;632 u8 vht_pfr;633 u32 tid_conf_changed[ATH10K_TID_MAX];634 int noack[ATH10K_TID_MAX];635 int retry_long[ATH10K_TID_MAX];636 int ampdu[ATH10K_TID_MAX];637 u8 rate_ctrl[ATH10K_TID_MAX];638 u32 rate_code[ATH10K_TID_MAX];639 int rtscts[ATH10K_TID_MAX];640 u32 tids_rst;641};642 643struct ath10k_vif_iter {644 u32 vdev_id;645 struct ath10k_vif *arvif;646};647 648/* Copy Engine register dump, protected by ce-lock */649struct ath10k_ce_crash_data {650 __le32 base_addr;651 __le32 src_wr_idx;652 __le32 src_r_idx;653 __le32 dst_wr_idx;654 __le32 dst_r_idx;655};656 657struct ath10k_ce_crash_hdr {658 __le32 ce_count;659 __le32 reserved[3]; /* for future use */660 struct ath10k_ce_crash_data entries[];661};662 663#define MAX_MEM_DUMP_TYPE 5664 665/* used for crash-dump storage, protected by data-lock */666struct ath10k_fw_crash_data {667 guid_t guid;668 struct timespec64 timestamp;669 __le32 registers[REG_DUMP_COUNT_QCA988X];670 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];671 672 u8 *ramdump_buf;673 size_t ramdump_buf_len;674};675 676struct ath10k_debug {677 struct dentry *debugfs_phy;678 679 struct ath10k_fw_stats fw_stats;680 struct completion fw_stats_complete;681 bool fw_stats_done;682 683 unsigned long htt_stats_mask;684 unsigned long reset_htt_stats;685 struct delayed_work htt_stats_dwork;686 struct ath10k_dfs_stats dfs_stats;687 struct ath_dfs_pool_stats dfs_pool_stats;688 689 /* used for tpc-dump storage, protected by data-lock */690 struct ath10k_tpc_stats *tpc_stats;691 struct ath10k_tpc_stats_final *tpc_stats_final;692 693 struct completion tpc_complete;694 695 /* protected by conf_mutex */696 u64 fw_dbglog_mask;697 u32 fw_dbglog_level;698 u32 reg_addr;699 u32 nf_cal_period;700 void *cal_data;701 u32 enable_extd_tx_stats;702 u8 fw_dbglog_mode;703};704 705enum ath10k_state {706 ATH10K_STATE_OFF = 0,707 ATH10K_STATE_ON,708 709 /* When doing firmware recovery the device is first powered down.710 * mac80211 is supposed to call in to start() hook later on. It is711 * however possible that driver unloading and firmware crash overlap.712 * mac80211 can wait on conf_mutex in stop() while the device is713 * stopped in ath10k_core_restart() work holding conf_mutex. The state714 * RESTARTED means that the device is up and mac80211 has started hw715 * reconfiguration. Once mac80211 is done with the reconfiguration we716 * set the state to STATE_ON in reconfig_complete().717 */718 ATH10K_STATE_RESTARTING,719 ATH10K_STATE_RESTARTED,720 721 /* The device has crashed while restarting hw. This state is like ON722 * but commands are blocked in HTC and -ECOMM response is given. This723 * prevents completion timeouts and makes the driver more responsive to724 * userspace commands. This is also prevents recursive recovery.725 */726 ATH10K_STATE_WEDGED,727 728 /* factory tests */729 ATH10K_STATE_UTF,730};731 732enum ath10k_firmware_mode {733 /* the default mode, standard 802.11 functionality */734 ATH10K_FIRMWARE_MODE_NORMAL,735 736 /* factory tests etc */737 ATH10K_FIRMWARE_MODE_UTF,738};739 740enum ath10k_fw_features {741 /* wmi_mgmt_rx_hdr contains extra RSSI information */742 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,743 744 /* Firmware from 10X branch. Deprecated, don't use in new code. */745 ATH10K_FW_FEATURE_WMI_10X = 1,746 747 /* firmware support tx frame management over WMI, otherwise it's HTT */748 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,749 750 /* Firmware does not support P2P */751 ATH10K_FW_FEATURE_NO_P2P = 3,752 753 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature754 * bit is required to be set as well. Deprecated, don't use in new755 * code.756 */757 ATH10K_FW_FEATURE_WMI_10_2 = 4,758 759 /* Some firmware revisions lack proper multi-interface client powersave760 * implementation. Enabling PS could result in connection drops,761 * traffic stalls, etc.762 */763 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,764 765 /* Some firmware revisions have an incomplete WoWLAN implementation766 * despite WMI service bit being advertised. This feature flag is used767 * to distinguish whether WoWLAN is really supported or not.768 */769 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,770 771 /* Don't trust error code from otp.bin */772 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,773 774 /* Some firmware revisions pad 4th hw address to 4 byte boundary making775 * it 8 bytes long in Native Wifi Rx decap.776 */777 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,778 779 /* Firmware supports bypassing PLL setting on init. */780 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,781 782 /* Raw mode support. If supported, FW supports receiving and trasmitting783 * frames in raw mode.784 */785 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,786 787 /* Firmware Supports Adaptive CCA*/788 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,789 790 /* Firmware supports management frame protection */791 ATH10K_FW_FEATURE_MFP_SUPPORT = 12,792 793 /* Firmware supports pull-push model where host shares it's software794 * queue state with firmware and firmware generates fetch requests795 * telling host which queues to dequeue tx from.796 *797 * Primary function of this is improved MU-MIMO performance with798 * multiple clients.799 */800 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,801 802 /* Firmware supports BT-Coex without reloading firmware via pdev param.803 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of804 * extended resource config should be enabled always. This firmware IE805 * is used to configure WMI_COEX_GPIO_SUPPORT.806 */807 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,808 809 /* Unused flag and proven to be not working, enable this if you want810 * to experiment sending NULL func data frames in HTT TX811 */812 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,813 814 /* Firmware allow other BSS mesh broadcast/multicast frames without815 * creating monitor interface. Appropriate rxfilters are programmed for816 * mesh vdev by firmware itself. This feature flags will be used for817 * not creating monitor vdev while configuring mesh node.818 */819 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16,820 821 /* Firmware does not support power save in station mode. */822 ATH10K_FW_FEATURE_NO_PS = 17,823 824 /* Firmware allows management tx by reference instead of by value. */825 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,826 827 /* Firmware load is done externally, not by bmi */828 ATH10K_FW_FEATURE_NON_BMI = 19,829 830 /* Firmware sends only one chan_info event per channel */831 ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20,832 833 /* Firmware allows setting peer fixed rate */834 ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21,835 836 /* Firmware support IRAM recovery */837 ATH10K_FW_FEATURE_IRAM_RECOVERY = 22,838 839 /* keep last */840 ATH10K_FW_FEATURE_COUNT,841};842 843enum ath10k_dev_flags {844 /* Indicates that ath10k device is during CAC phase of DFS */845 ATH10K_CAC_RUNNING,846 ATH10K_FLAG_CORE_REGISTERED,847 848 /* Device has crashed and needs to restart. This indicates any pending849 * waiters should immediately cancel instead of waiting for a time out.850 */851 ATH10K_FLAG_CRASH_FLUSH,852 853 /* Use Raw mode instead of native WiFi Tx/Rx encap mode.854 * Raw mode supports both hardware and software crypto. Native WiFi only855 * supports hardware crypto.856 */857 ATH10K_FLAG_RAW_MODE,858 859 /* Disable HW crypto engine */860 ATH10K_FLAG_HW_CRYPTO_DISABLED,861 862 /* Bluetooth coexistence enabled */863 ATH10K_FLAG_BTCOEX,864 865 /* Per Station statistics service */866 ATH10K_FLAG_PEER_STATS,867 868 /* Indicates that ath10k device is during recovery process and not complete */869 ATH10K_FLAG_RESTARTING,870 871 /* protected by conf_mutex */872 ATH10K_FLAG_NAPI_ENABLED,873};874 875enum ath10k_cal_mode {876 ATH10K_CAL_MODE_FILE,877 ATH10K_CAL_MODE_OTP,878 ATH10K_CAL_MODE_DT,879 ATH10K_CAL_MODE_NVMEM,880 ATH10K_PRE_CAL_MODE_FILE,881 ATH10K_PRE_CAL_MODE_DT,882 ATH10K_PRE_CAL_MODE_NVMEM,883 ATH10K_CAL_MODE_EEPROM,884};885 886enum ath10k_crypt_mode {887 /* Only use hardware crypto engine */888 ATH10K_CRYPT_MODE_HW,889 /* Only use software crypto engine */890 ATH10K_CRYPT_MODE_SW,891};892 893static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)894{895 switch (mode) {896 case ATH10K_CAL_MODE_FILE:897 return "file";898 case ATH10K_CAL_MODE_OTP:899 return "otp";900 case ATH10K_CAL_MODE_DT:901 return "dt";902 case ATH10K_CAL_MODE_NVMEM:903 return "nvmem";904 case ATH10K_PRE_CAL_MODE_FILE:905 return "pre-cal-file";906 case ATH10K_PRE_CAL_MODE_DT:907 return "pre-cal-dt";908 case ATH10K_PRE_CAL_MODE_NVMEM:909 return "pre-cal-nvmem";910 case ATH10K_CAL_MODE_EEPROM:911 return "eeprom";912 }913 914 return "unknown";915}916 917enum ath10k_scan_state {918 ATH10K_SCAN_IDLE,919 ATH10K_SCAN_STARTING,920 ATH10K_SCAN_RUNNING,921 ATH10K_SCAN_ABORTING,922};923 924static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)925{926 switch (state) {927 case ATH10K_SCAN_IDLE:928 return "idle";929 case ATH10K_SCAN_STARTING:930 return "starting";931 case ATH10K_SCAN_RUNNING:932 return "running";933 case ATH10K_SCAN_ABORTING:934 return "aborting";935 }936 937 return "unknown";938}939 940enum ath10k_tx_pause_reason {941 ATH10K_TX_PAUSE_Q_FULL,942 ATH10K_TX_PAUSE_MAX,943};944 945struct ath10k_fw_file {946 const struct firmware *firmware;947 948 char fw_version[ETHTOOL_FWVERS_LEN];949 950 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);951 952 enum ath10k_fw_wmi_op_version wmi_op_version;953 enum ath10k_fw_htt_op_version htt_op_version;954 955 const void *firmware_data;956 size_t firmware_len;957 958 const void *otp_data;959 size_t otp_len;960 961 const void *codeswap_data;962 size_t codeswap_len;963 964 /* The original idea of struct ath10k_fw_file was that it only965 * contains struct firmware and pointers to various parts (actual966 * firmware binary, otp, metadata etc) of the file. This seg_info967 * is actually created separate but as this is used similarly as968 * the other firmware components it's more convenient to have it969 * here.970 */971 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;972};973 974struct ath10k_fw_components {975 const struct firmware *board;976 const void *board_data;977 size_t board_len;978 const struct firmware *ext_board;979 const void *ext_board_data;980 size_t ext_board_len;981 982 struct ath10k_fw_file fw_file;983};984 985struct ath10k_per_peer_tx_stats {986 u32 succ_bytes;987 u32 retry_bytes;988 u32 failed_bytes;989 u8 ratecode;990 u8 flags;991 u16 peer_id;992 u16 succ_pkts;993 u16 retry_pkts;994 u16 failed_pkts;995 u16 duration;996 u32 reserved1;997 u32 reserved2;998};999 1000enum ath10k_dev_type {1001 ATH10K_DEV_TYPE_LL,1002 ATH10K_DEV_TYPE_HL,1003};1004 1005struct ath10k_bus_params {1006 u32 chip_id;1007 enum ath10k_dev_type dev_type;1008 bool link_can_suspend;1009 bool hl_msdu_ids;1010};1011 1012struct ath10k {1013 struct ath_common ath_common;1014 struct ieee80211_hw *hw;1015 struct ieee80211_ops *ops;1016 struct device *dev;1017 struct msa_region {1018 dma_addr_t paddr;1019 u32 mem_size;1020 void *vaddr;1021 } msa;1022 u8 mac_addr[ETH_ALEN];1023 1024 enum ath10k_hw_rev hw_rev;1025 u16 dev_id;1026 u32 chip_id;1027 u32 target_version;1028 u8 fw_version_major;1029 u32 fw_version_minor;1030 u16 fw_version_release;1031 u16 fw_version_build;1032 u32 fw_stats_req_mask;1033 u32 phy_capability;1034 u32 hw_min_tx_power;1035 u32 hw_max_tx_power;1036 u32 hw_eeprom_rd;1037 u32 ht_cap_info;1038 u32 vht_cap_info;1039 u32 vht_supp_mcs;1040 u32 num_rf_chains;1041 u32 max_spatial_stream;1042 /* protected by conf_mutex */1043 u32 low_2ghz_chan;1044 u32 high_2ghz_chan;1045 u32 low_5ghz_chan;1046 u32 high_5ghz_chan;1047 bool ani_enabled;1048 u32 sys_cap_info;1049 1050 /* protected by data_lock */1051 bool hw_rfkill_on;1052 1053 /* protected by conf_mutex */1054 u8 ps_state_enable;1055 1056 bool nlo_enabled;1057 bool p2p;1058 1059 struct {1060 enum ath10k_bus bus;1061 const struct ath10k_hif_ops *ops;1062 } hif;1063 1064 struct completion target_suspend;1065 struct completion driver_recovery;1066 1067 const struct ath10k_hw_regs *regs;1068 const struct ath10k_hw_ce_regs *hw_ce_regs;1069 const struct ath10k_hw_values *hw_values;1070 struct ath10k_bmi bmi;1071 struct ath10k_wmi wmi;1072 struct ath10k_htc htc;1073 struct ath10k_htt htt;1074 1075 struct ath10k_hw_params hw_params;1076 1077 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */1078 struct ath10k_fw_components normal_mode_fw;1079 1080 /* READ-ONLY images of the running firmware, which can be either1081 * normal or UTF. Do not modify, release etc!1082 */1083 const struct ath10k_fw_components *running_fw;1084 1085 const char *board_name;1086 1087 const struct firmware *pre_cal_file;1088 const struct firmware *cal_file;1089 1090 struct {1091 u32 vendor;1092 u32 device;1093 u32 subsystem_vendor;1094 u32 subsystem_device;1095 1096 bool bmi_ids_valid;1097 bool qmi_ids_valid;1098 u32 qmi_board_id;1099 u32 qmi_chip_id;1100 u8 bmi_board_id;1101 u8 bmi_eboard_id;1102 u8 bmi_chip_id;1103 bool ext_bid_supported;1104 1105 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];1106 } id;1107 1108 int fw_api;1109 int bd_api;1110 enum ath10k_cal_mode cal_mode;1111 1112 struct {1113 struct completion started;1114 struct completion completed;1115 struct completion on_channel;1116 struct delayed_work timeout;1117 enum ath10k_scan_state state;1118 bool is_roc;1119 int vdev_id;1120 int roc_freq;1121 bool roc_notify;1122 } scan;1123 1124 struct {1125 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];1126 } mac;1127 1128 /* should never be NULL; needed for regular htt rx */1129 struct ieee80211_channel *rx_channel;1130 1131 /* valid during scan; needed for mgmt rx during scan */1132 struct ieee80211_channel *scan_channel;1133 1134 /* current operating channel definition */1135 struct cfg80211_chan_def chandef;1136 1137 /* currently configured operating channel in firmware */1138 struct ieee80211_channel *tgt_oper_chan;1139 1140 unsigned long long free_vdev_map;1141 struct ath10k_vif *monitor_arvif;1142 bool monitor;1143 int monitor_vdev_id;1144 bool monitor_started;1145 unsigned int filter_flags;1146 unsigned long dev_flags;1147 bool dfs_block_radar_events;1148 1149 /* protected by conf_mutex */1150 bool radar_enabled;1151 int num_started_vdevs;1152 1153 /* Protected by conf-mutex */1154 u8 cfg_tx_chainmask;1155 u8 cfg_rx_chainmask;1156 1157 struct completion install_key_done;1158 1159 int last_wmi_vdev_start_status;1160 struct completion vdev_setup_done;1161 struct completion vdev_delete_done;1162 struct completion peer_stats_info_complete;1163 1164 struct workqueue_struct *workqueue;1165 /* Auxiliary workqueue */1166 struct workqueue_struct *workqueue_aux;1167 struct workqueue_struct *workqueue_tx_complete;1168 /* prevents concurrent FW reconfiguration */1169 struct mutex conf_mutex;1170 1171 /* protects coredump data */1172 struct mutex dump_mutex;1173 1174 /* protects shared structure data */1175 spinlock_t data_lock;1176 1177 /* serialize wake_tx_queue calls per ac */1178 spinlock_t queue_lock[IEEE80211_NUM_ACS];1179 1180 struct list_head arvifs;1181 struct list_head peers;1182 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];1183 wait_queue_head_t peer_mapping_wq;1184 1185 /* protected by conf_mutex */1186 int num_peers;1187 int num_stations;1188 1189 int max_num_peers;1190 int max_num_stations;1191 int max_num_vdevs;1192 int max_num_tdls_vdevs;1193 int num_active_peers;1194 int num_tids;1195 1196 struct work_struct svc_rdy_work;1197 struct sk_buff *svc_rdy_skb;1198 1199 struct work_struct offchan_tx_work;1200 struct sk_buff_head offchan_tx_queue;1201 struct completion offchan_tx_completed;1202 struct sk_buff *offchan_tx_skb;1203 1204 struct work_struct wmi_mgmt_tx_work;1205 struct sk_buff_head wmi_mgmt_tx_queue;1206 1207 enum ath10k_state state;1208 1209 struct work_struct register_work;1210 struct work_struct restart_work;1211 struct work_struct bundle_tx_work;1212 struct work_struct tx_complete_work;1213 1214 /* cycle count is reported twice for each visited channel during scan.1215 * access protected by data_lock1216 */1217 u32 survey_last_rx_clear_count;1218 u32 survey_last_cycle_count;1219 struct survey_info survey[ATH10K_NUM_CHANS];1220 1221 /* Channel info events are expected to come in pairs without and with1222 * COMPLETE flag set respectively for each channel visit during scan.1223 *1224 * However there are deviations from this rule. This flag is used to1225 * avoid reporting garbage data.1226 */1227 bool ch_info_can_report_survey;1228 struct completion bss_survey_done;1229 1230 struct dfs_pattern_detector *dfs_detector;1231 1232 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */1233 1234#ifdef CONFIG_ATH10K_DEBUGFS1235 struct ath10k_debug debug;1236 struct {1237 /* relay(fs) channel for spectral scan */1238 struct rchan *rfs_chan_spec_scan;1239 1240 /* spectral_mode and spec_config are protected by conf_mutex */1241 enum ath10k_spectral_mode mode;1242 struct ath10k_spec_scan config;1243 } spectral;1244#endif1245 1246 u32 pktlog_filter;1247 1248#ifdef CONFIG_DEV_COREDUMP1249 struct {1250 struct ath10k_fw_crash_data *fw_crash_data;1251 } coredump;1252#endif1253 1254 struct {1255 /* protected by conf_mutex */1256 struct ath10k_fw_components utf_mode_fw;1257 1258 /* protected by data_lock */1259 bool utf_monitor;1260 } testmode;1261 1262 struct {1263 struct gpio_led wifi_led;1264 struct led_classdev cdev;1265 char label[48];1266 u32 gpio_state_pin;1267 } leds;1268 1269 struct {1270 /* protected by data_lock */1271 u32 rx_crc_err_drop;1272 u32 fw_crash_counter;1273 u32 fw_warm_reset_counter;1274 u32 fw_cold_reset_counter;1275 } stats;1276 1277 struct ath10k_thermal thermal;1278 struct ath10k_wow wow;1279 struct ath10k_per_peer_tx_stats peer_tx_stats;1280 1281 /* NAPI */1282 struct net_device *napi_dev;1283 struct napi_struct napi;1284 1285 struct work_struct set_coverage_class_work;1286 /* protected by conf_mutex */1287 struct {1288 /* writing also protected by data_lock */1289 s16 coverage_class;1290 1291 u32 reg_phyclk;1292 u32 reg_slottime_conf;1293 u32 reg_slottime_orig;1294 u32 reg_ack_cts_timeout_conf;1295 u32 reg_ack_cts_timeout_orig;1296 } fw_coverage;1297 1298 u32 ampdu_reference;1299 1300 const u8 *wmi_key_cipher;1301 void *ce_priv;1302 1303 u32 sta_tid_stats_mask;1304 1305 /* protected by data_lock */1306 enum ath10k_radar_confirmation_state radar_conf_state;1307 struct ath10k_radar_found_info last_radar_info;1308 struct work_struct radar_confirmation_work;1309 struct ath10k_bus_params bus_param;1310 struct completion peer_delete_done;1311 1312 bool coex_support;1313 int coex_gpio_pin;1314 1315 s32 tx_power_2g_limit;1316 s32 tx_power_5g_limit;1317 1318 /* must be last */1319 u8 drv_priv[] __aligned(sizeof(void *));1320};1321 1322static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)1323{1324 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&1325 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))1326 return true;1327 1328 return false;1329}1330 1331extern unsigned int ath10k_frame_mode;1332extern unsigned long ath10k_coredump_mask;1333 1334void ath10k_core_napi_sync_disable(struct ath10k *ar);1335void ath10k_core_napi_enable(struct ath10k *ar);1336struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,1337 enum ath10k_bus bus,1338 enum ath10k_hw_rev hw_rev,1339 const struct ath10k_hif_ops *hif_ops);1340void ath10k_core_destroy(struct ath10k *ar);1341void ath10k_core_get_fw_features_str(struct ath10k *ar,1342 char *buf,1343 size_t max_len);1344int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,1345 struct ath10k_fw_file *fw_file);1346 1347int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,1348 const struct ath10k_fw_components *fw_components);1349int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);1350void ath10k_core_stop(struct ath10k *ar);1351void ath10k_core_start_recovery(struct ath10k *ar);1352int ath10k_core_register(struct ath10k *ar,1353 const struct ath10k_bus_params *bus_params);1354void ath10k_core_unregister(struct ath10k *ar);1355int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type);1356int ath10k_core_check_dt(struct ath10k *ar);1357void ath10k_core_free_board_files(struct ath10k *ar);1358 1359#endif /* _CORE_H_ */1360