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1/* SPDX-License-Identifier: BSD-3-Clause-Clear */2/*3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.5 */6 7#ifndef ATH11K_MAC_H8#define ATH11K_MAC_H9 10#include <net/mac80211.h>11#include <net/cfg80211.h>12#include "wmi.h"13 14struct ath11k;15struct ath11k_base;16 17struct ath11k_generic_iter {18 struct ath11k *ar;19 int ret;20};21 22/* number of failed packets (20 packets with 16 sw reties each) */23#define ATH11K_KICKOUT_THRESHOLD (20 * 16)24 25/* Use insanely high numbers to make sure that the firmware implementation26 * won't start, we have the same functionality already in hostapd. Unit27 * is seconds.28 */29#define ATH11K_KEEPALIVE_MIN_IDLE 374730#define ATH11K_KEEPALIVE_MAX_IDLE 389531#define ATH11K_KEEPALIVE_MAX_UNRESPONSIVE 390032 33#define WMI_HOST_RC_DS_FLAG 0x0134#define WMI_HOST_RC_CW40_FLAG 0x0235#define WMI_HOST_RC_SGI_FLAG 0x0436#define WMI_HOST_RC_HT_FLAG 0x0837#define WMI_HOST_RC_RTSCTS_FLAG 0x1038#define WMI_HOST_RC_TX_STBC_FLAG 0x2039#define WMI_HOST_RC_RX_STBC_FLAG 0xC040#define WMI_HOST_RC_RX_STBC_FLAG_S 641#define WMI_HOST_RC_WEP_TKIP_FLAG 0x10042#define WMI_HOST_RC_TS_FLAG 0x20043#define WMI_HOST_RC_UAPSD_FLAG 0x40044 45#define WMI_HT_CAP_ENABLED 0x000146#define WMI_HT_CAP_HT20_SGI 0x000247#define WMI_HT_CAP_DYNAMIC_SMPS 0x000448#define WMI_HT_CAP_TX_STBC 0x000849#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 350#define WMI_HT_CAP_RX_STBC 0x003051#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 452#define WMI_HT_CAP_LDPC 0x004053#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x008054#define WMI_HT_CAP_MPDU_DENSITY 0x070055#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 856#define WMI_HT_CAP_HT40_SGI 0x080057#define WMI_HT_CAP_RX_LDPC 0x100058#define WMI_HT_CAP_TX_LDPC 0x200059#define WMI_HT_CAP_IBF_BFER 0x400060 61/* These macros should be used when we wish to advertise STBC support for62 * only 1SS or 2SS or 3SS.63 */64#define WMI_HT_CAP_RX_STBC_1SS 0x001065#define WMI_HT_CAP_RX_STBC_2SS 0x002066#define WMI_HT_CAP_RX_STBC_3SS 0x003067 68#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \69 WMI_HT_CAP_HT20_SGI | \70 WMI_HT_CAP_HT40_SGI | \71 WMI_HT_CAP_TX_STBC | \72 WMI_HT_CAP_RX_STBC | \73 WMI_HT_CAP_LDPC)74 75#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x0000000376#define WMI_VHT_CAP_RX_LDPC 0x0000001077#define WMI_VHT_CAP_SGI_80MHZ 0x0000002078#define WMI_VHT_CAP_SGI_160MHZ 0x0000004079#define WMI_VHT_CAP_TX_STBC 0x0000008080#define WMI_VHT_CAP_RX_STBC_MASK 0x0000030081#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 882#define WMI_VHT_CAP_SU_BFER 0x0000080083#define WMI_VHT_CAP_SU_BFEE 0x0000100084#define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E00085#define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 1386#define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x0007000087#define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 1688#define WMI_VHT_CAP_MU_BFER 0x0008000089#define WMI_VHT_CAP_MU_BFEE 0x0010000090#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x0380000091#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT 2392#define WMI_VHT_CAP_RX_FIXED_ANT 0x1000000093#define WMI_VHT_CAP_TX_FIXED_ANT 0x2000000094 95#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x0000000296 97/* These macros should be used when we wish to advertise STBC support for98 * only 1SS or 2SS or 3SS.99 */100#define WMI_VHT_CAP_RX_STBC_1SS 0x00000100101#define WMI_VHT_CAP_RX_STBC_2SS 0x00000200102#define WMI_VHT_CAP_RX_STBC_3SS 0x00000300103 104#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \105 WMI_VHT_CAP_SGI_80MHZ | \106 WMI_VHT_CAP_TX_STBC | \107 WMI_VHT_CAP_RX_STBC_MASK | \108 WMI_VHT_CAP_RX_LDPC | \109 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \110 WMI_VHT_CAP_RX_FIXED_ANT | \111 WMI_VHT_CAP_TX_FIXED_ANT)112 113/* FIXME: should these be in ieee80211.h? */114#define IEEE80211_VHT_MCS_SUPPORT_0_11_MASK GENMASK(23, 16)115#define IEEE80211_DISABLE_VHT_MCS_SUPPORT_0_11 BIT(24)116 117#define WMI_MAX_SPATIAL_STREAM 3118 119#define ATH11K_CHAN_WIDTH_NUM 8120#define ATH11K_BW_NSS_MAP_ENABLE BIT(31)121#define ATH11K_PEER_RX_NSS_160MHZ GENMASK(2, 0)122#define ATH11K_PEER_RX_NSS_80_80MHZ GENMASK(5, 3)123 124#define ATH11K_OBSS_PD_MAX_THRESHOLD -82125#define ATH11K_OBSS_PD_NON_SRG_MAX_THRESHOLD -62126#define ATH11K_OBSS_PD_THRESHOLD_IN_DBM BIT(29)127#define ATH11K_OBSS_PD_SRG_EN BIT(30)128#define ATH11K_OBSS_PD_NON_SRG_EN BIT(31)129 130extern const struct htt_rx_ring_tlv_filter ath11k_mac_mon_status_filter_default;131 132#define ATH11K_SCAN_11D_INTERVAL 600000133#define ATH11K_11D_INVALID_VDEV_ID 0xFFFF134 135void ath11k_mac_11d_scan_start(struct ath11k *ar, u32 vdev_id);136void ath11k_mac_11d_scan_stop(struct ath11k *ar);137void ath11k_mac_11d_scan_stop_all(struct ath11k_base *ab);138 139void ath11k_mac_destroy(struct ath11k_base *ab);140void ath11k_mac_unregister(struct ath11k_base *ab);141int ath11k_mac_register(struct ath11k_base *ab);142int ath11k_mac_allocate(struct ath11k_base *ab);143int ath11k_mac_hw_ratecode_to_legacy_rate(u8 hw_rc, u8 preamble, u8 *rateidx,144 u16 *rate);145u8 ath11k_mac_bitrate_to_idx(const struct ieee80211_supported_band *sband,146 u32 bitrate);147u8 ath11k_mac_hw_rate_to_idx(const struct ieee80211_supported_band *sband,148 u8 hw_rate, bool cck);149 150void __ath11k_mac_scan_finish(struct ath11k *ar);151void ath11k_mac_scan_finish(struct ath11k *ar);152 153struct ath11k_vif *ath11k_mac_get_arvif(struct ath11k *ar, u32 vdev_id);154struct ath11k_vif *ath11k_mac_get_arvif_by_vdev_id(struct ath11k_base *ab,155 u32 vdev_id);156u8 ath11k_mac_get_target_pdev_id(struct ath11k *ar);157u8 ath11k_mac_get_target_pdev_id_from_vif(struct ath11k_vif *arvif);158struct ath11k_vif *ath11k_mac_get_vif_up(struct ath11k_base *ab);159 160struct ath11k *ath11k_mac_get_ar_by_vdev_id(struct ath11k_base *ab, u32 vdev_id);161struct ath11k *ath11k_mac_get_ar_by_pdev_id(struct ath11k_base *ab, u32 pdev_id);162 163void ath11k_mac_drain_tx(struct ath11k *ar);164void ath11k_mac_peer_cleanup_all(struct ath11k *ar);165int ath11k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx);166u8 ath11k_mac_bw_to_mac80211_bw(u8 bw);167enum nl80211_he_gi ath11k_mac_he_gi_to_nl80211_he_gi(u8 sgi);168enum nl80211_he_ru_alloc ath11k_mac_phy_he_ru_to_nl80211_he_ru_alloc(u16 ru_phy);169enum nl80211_he_ru_alloc ath11k_mac_he_ru_tones_to_nl80211_he_ru_alloc(u16 ru_tones);170enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw bw);171enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher);172void ath11k_mac_handle_beacon(struct ath11k *ar, struct sk_buff *skb);173void ath11k_mac_handle_beacon_miss(struct ath11k *ar, u32 vdev_id);174void ath11k_mac_bcn_tx_event(struct ath11k_vif *arvif);175int ath11k_mac_wait_tx_complete(struct ath11k *ar);176int ath11k_mac_vif_set_keepalive(struct ath11k_vif *arvif,177 enum wmi_sta_keepalive_method method,178 u32 interval);179void ath11k_mac_fill_reg_tpc_info(struct ath11k *ar,180 struct ieee80211_vif *vif,181 struct ieee80211_chanctx_conf *ctx);182#endif183