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1/*2 * Copyright (c) 2008-2011 Atheros Communications Inc.3 *4 * Permission to use, copy, modify, and/or distribute this software for any5 * purpose with or without fee is hereby granted, provided that the above6 * copyright notice and this permission notice appear in all copies.7 *8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.15 */16#ifndef AR9002_PHY_H17#define AR9002_PHY_H18 19#define AR_PHY_TEST 0x980020#define PHY_AGC_CLR 0x1000000021#define RFSILENT_BB 0x0000200022 23#define AR_PHY_TURBO 0x980424#define AR_PHY_FC_TURBO_MODE 0x0000000125#define AR_PHY_FC_TURBO_SHORT 0x0000000226#define AR_PHY_FC_DYN2040_EN 0x0000000427#define AR_PHY_FC_DYN2040_PRI_ONLY 0x0000000828#define AR_PHY_FC_DYN2040_PRI_CH 0x0000001029/* For 25 MHz channel spacing -- not used but supported by hw */30#define AR_PHY_FC_DYN2040_EXT_CH 0x0000002031#define AR_PHY_FC_HT_EN 0x0000004032#define AR_PHY_FC_SHORT_GI_40 0x0000008033#define AR_PHY_FC_WALSH 0x0000010034#define AR_PHY_FC_SINGLE_HT_LTF1 0x0000020035#define AR_PHY_FC_ENABLE_DAC_FIFO 0x0000080036 37#define AR_PHY_TEST2 0x980838 39#define AR_PHY_TIMING2 0x981040#define AR_PHY_TIMING3 0x981441#define AR_PHY_TIMING3_DSC_MAN 0xFFFE000042#define AR_PHY_TIMING3_DSC_MAN_S 1743#define AR_PHY_TIMING3_DSC_EXP 0x0001E00044#define AR_PHY_TIMING3_DSC_EXP_S 1345 46#define AR_PHY_CHIP_ID_REV_0 0x8047#define AR_PHY_CHIP_ID_REV_1 0x8148#define AR_PHY_CHIP_ID_9160_REV_0 0xb049 50#define AR_PHY_ACTIVE 0x981C51#define AR_PHY_ACTIVE_EN 0x0000000152#define AR_PHY_ACTIVE_DIS 0x0000000053 54#define AR_PHY_RF_CTL2 0x982455#define AR_PHY_TX_END_DATA_START 0x000000FF56#define AR_PHY_TX_END_DATA_START_S 057#define AR_PHY_TX_END_PA_ON 0x0000FF0058#define AR_PHY_TX_END_PA_ON_S 859 60#define AR_PHY_RF_CTL3 0x982861#define AR_PHY_TX_END_TO_A2_RX_ON 0x00FF000062#define AR_PHY_TX_END_TO_A2_RX_ON_S 1663#define AR_PHY_TX_END_TO_ADC_ON 0xFF00000064#define AR_PHY_TX_END_TO_ADC_ON_S 2465 66#define AR_PHY_ADC_CTL 0x982C67#define AR_PHY_ADC_CTL_OFF_INBUFGAIN 0x0000000368#define AR_PHY_ADC_CTL_OFF_INBUFGAIN_S 069#define AR_PHY_ADC_CTL_OFF_PWDDAC 0x0000200070#define AR_PHY_ADC_CTL_OFF_PWDBANDGAP 0x0000400071#define AR_PHY_ADC_CTL_OFF_PWDADC 0x0000800072#define AR_PHY_ADC_CTL_ON_INBUFGAIN 0x0003000073#define AR_PHY_ADC_CTL_ON_INBUFGAIN_S 1674 75#define AR_PHY_ADC_SERIAL_CTL 0x983076#define AR_PHY_SEL_INTERNAL_ADDAC 0x0000000077#define AR_PHY_SEL_EXTERNAL_RADIO 0x0000000178 79#define AR_PHY_RF_CTL4 0x983480#define AR_PHY_RF_CTL4_TX_END_XPAB_OFF 0xFF00000081#define AR_PHY_RF_CTL4_TX_END_XPAB_OFF_S 2482#define AR_PHY_RF_CTL4_TX_END_XPAA_OFF 0x00FF000083#define AR_PHY_RF_CTL4_TX_END_XPAA_OFF_S 1684#define AR_PHY_RF_CTL4_FRAME_XPAB_ON 0x0000FF0085#define AR_PHY_RF_CTL4_FRAME_XPAB_ON_S 886#define AR_PHY_RF_CTL4_FRAME_XPAA_ON 0x000000FF87#define AR_PHY_RF_CTL4_FRAME_XPAA_ON_S 088 89#define AR_PHY_TSTDAC_CONST 0x983c90 91#define AR_PHY_SETTLING 0x984492#define AR_PHY_SETTLING_SWITCH 0x00003F8093#define AR_PHY_SETTLING_SWITCH_S 794 95#define AR_PHY_RXGAIN 0x984896#define AR_PHY_RXGAIN_TXRX_ATTEN 0x0003F00097#define AR_PHY_RXGAIN_TXRX_ATTEN_S 1298#define AR_PHY_RXGAIN_TXRX_RF_MAX 0x007C000099#define AR_PHY_RXGAIN_TXRX_RF_MAX_S 18100#define AR9280_PHY_RXGAIN_TXRX_ATTEN 0x00003F80101#define AR9280_PHY_RXGAIN_TXRX_ATTEN_S 7102#define AR9280_PHY_RXGAIN_TXRX_MARGIN 0x001FC000103#define AR9280_PHY_RXGAIN_TXRX_MARGIN_S 14104 105#define AR_PHY_DESIRED_SZ 0x9850106#define AR_PHY_DESIRED_SZ_ADC 0x000000FF107#define AR_PHY_DESIRED_SZ_ADC_S 0108#define AR_PHY_DESIRED_SZ_PGA 0x0000FF00109#define AR_PHY_DESIRED_SZ_PGA_S 8110#define AR_PHY_DESIRED_SZ_TOT_DES 0x0FF00000111#define AR_PHY_DESIRED_SZ_TOT_DES_S 20112 113#define AR_PHY_FIND_SIG 0x9858114#define AR_PHY_FIND_SIG_FIRSTEP 0x0003F000115#define AR_PHY_FIND_SIG_FIRSTEP_S 12116#define AR_PHY_FIND_SIG_FIRPWR 0x03FC0000117#define AR_PHY_FIND_SIG_FIRPWR_S 18118 119#define AR_PHY_FIND_SIG_LOW 0x9840120#define AR_PHY_FIND_SIG_FIRSTEP_LOW 0x00000FC0L121#define AR_PHY_FIND_SIG_FIRSTEP_LOW_S 6122 123#define AR_PHY_AGC_CTL1 0x985C124#define AR_PHY_AGC_CTL1_COARSE_LOW 0x00007F80125#define AR_PHY_AGC_CTL1_COARSE_LOW_S 7126#define AR_PHY_AGC_CTL1_COARSE_HIGH 0x003F8000127#define AR_PHY_AGC_CTL1_COARSE_HIGH_S 15128 129#define AR_PHY_CCA 0x9864130#define AR_PHY_MINCCA_PWR 0x0FF80000131#define AR_PHY_MINCCA_PWR_S 19132#define AR_PHY_CCA_THRESH62 0x0007F000133#define AR_PHY_CCA_THRESH62_S 12134#define AR9280_PHY_MINCCA_PWR 0x1FF00000135#define AR9280_PHY_MINCCA_PWR_S 20136#define AR9280_PHY_CCA_THRESH62 0x000FF000137#define AR9280_PHY_CCA_THRESH62_S 12138 139#define AR_PHY_SFCORR_LOW 0x986C140#define AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW 0x00000001141#define AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW 0x00003F00142#define AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW_S 8143#define AR_PHY_SFCORR_LOW_M1_THRESH_LOW 0x001FC000144#define AR_PHY_SFCORR_LOW_M1_THRESH_LOW_S 14145#define AR_PHY_SFCORR_LOW_M2_THRESH_LOW 0x0FE00000146#define AR_PHY_SFCORR_LOW_M2_THRESH_LOW_S 21147 148#define AR_PHY_SFCORR 0x9868149#define AR_PHY_SFCORR_M2COUNT_THR 0x0000001F150#define AR_PHY_SFCORR_M2COUNT_THR_S 0151#define AR_PHY_SFCORR_M1_THRESH 0x00FE0000152#define AR_PHY_SFCORR_M1_THRESH_S 17153#define AR_PHY_SFCORR_M2_THRESH 0x7F000000154#define AR_PHY_SFCORR_M2_THRESH_S 24155 156#define AR_PHY_SLEEP_CTR_CONTROL 0x9870157#define AR_PHY_SLEEP_CTR_LIMIT 0x9874158#define AR_PHY_SYNTH_CONTROL 0x9874159#define AR_PHY_SLEEP_SCAL 0x9878160 161#define AR_PHY_PLL_CTL 0x987c162#define AR_PHY_PLL_CTL_40 0xaa163#define AR_PHY_PLL_CTL_40_5413 0x04164#define AR_PHY_PLL_CTL_44 0xab165#define AR_PHY_PLL_CTL_44_2133 0xeb166#define AR_PHY_PLL_CTL_40_2133 0xea167 168#define AR_PHY_SPECTRAL_SCAN 0x9910 /* AR9280 spectral scan configuration register */169#define AR_PHY_SPECTRAL_SCAN_ENABLE 0x1170#define AR_PHY_SPECTRAL_SCAN_ENA 0x00000001 /* Enable spectral scan, reg 68, bit 0 */171#define AR_PHY_SPECTRAL_SCAN_ENA_S 0 /* Enable spectral scan, reg 68, bit 0 */172#define AR_PHY_SPECTRAL_SCAN_ACTIVE 0x00000002 /* Activate spectral scan reg 68, bit 1*/173#define AR_PHY_SPECTRAL_SCAN_ACTIVE_S 1 /* Activate spectral scan reg 68, bit 1*/174#define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD 0x000000F0 /* Interval for FFT reports, reg 68, bits 4-7*/175#define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD_S 4176#define AR_PHY_SPECTRAL_SCAN_PERIOD 0x0000FF00 /* Interval for FFT reports, reg 68, bits 8-15*/177#define AR_PHY_SPECTRAL_SCAN_PERIOD_S 8178#define AR_PHY_SPECTRAL_SCAN_COUNT 0x00FF0000 /* Number of reports, reg 68, bits 16-23*/179#define AR_PHY_SPECTRAL_SCAN_COUNT_S 16180#define AR_PHY_SPECTRAL_SCAN_COUNT_KIWI 0x0FFF0000 /* Number of reports, reg 68, bits 16-27*/181#define AR_PHY_SPECTRAL_SCAN_COUNT_KIWI_S 16182#define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT 0x01000000 /* Short repeat, reg 68, bit 24*/183#define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_KIWI 0x10000000 /* Short repeat, reg 68, bit 28*/184#define AR_PHY_SPECTRAL_SCAN_PHYERR_MASK_SELECT 0x40000000185 186#define AR_PHY_RX_DELAY 0x9914187#define AR_PHY_SEARCH_START_DELAY 0x9918188#define AR_PHY_RX_DELAY_DELAY 0x00003FFF189 190#define AR_PHY_TIMING_CTRL4(_i) (0x9920 + ((_i) << 12))191#define AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF 0x01F192#define AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF_S 0193#define AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF 0x7E0194#define AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF_S 5195#define AR_PHY_TIMING_CTRL4_IQCORR_ENABLE 0x800196#define AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX 0xF000197#define AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX_S 12198#define AR_PHY_TIMING_CTRL4_DO_CAL 0x10000199 200#define AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI 0x80000000201#define AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER 0x40000000202#define AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK 0x20000000203#define AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK 0x10000000204 205#define AR_PHY_TIMING5 0x9924206#define AR_PHY_TIMING5_CYCPWR_THR1 0x000000FE207#define AR_PHY_TIMING5_CYCPWR_THR1_S 1208 209#define AR_PHY_POWER_TX_RATE1 0x9934210#define AR_PHY_POWER_TX_RATE2 0x9938211#define AR_PHY_POWER_TX_RATE_MAX 0x993c212#define AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE 0x00000040213 214#define AR_PHY_FRAME_CTL 0x9944215#define AR_PHY_FRAME_CTL_TX_CLIP 0x00000038216#define AR_PHY_FRAME_CTL_TX_CLIP_S 3217 218#define AR_PHY_TXPWRADJ 0x994C219#define AR_PHY_TXPWRADJ_CCK_GAIN_DELTA 0x00000FC0220#define AR_PHY_TXPWRADJ_CCK_GAIN_DELTA_S 6221#define AR_PHY_TXPWRADJ_CCK_PCDAC_INDEX 0x00FC0000222#define AR_PHY_TXPWRADJ_CCK_PCDAC_INDEX_S 18223 224#define AR_PHY_RADAR_EXT 0x9940225#define AR_PHY_RADAR_EXT_ENA 0x00004000226 227#define AR_PHY_RADAR_0 0x9954228#define AR_PHY_RADAR_0_ENA 0x00000001229#define AR_PHY_RADAR_0_FFT_ENA 0x80000000230#define AR_PHY_RADAR_0_INBAND 0x0000003e231#define AR_PHY_RADAR_0_INBAND_S 1232#define AR_PHY_RADAR_0_PRSSI 0x00000FC0233#define AR_PHY_RADAR_0_PRSSI_S 6234#define AR_PHY_RADAR_0_HEIGHT 0x0003F000235#define AR_PHY_RADAR_0_HEIGHT_S 12236#define AR_PHY_RADAR_0_RRSSI 0x00FC0000237#define AR_PHY_RADAR_0_RRSSI_S 18238#define AR_PHY_RADAR_0_FIRPWR 0x7F000000239#define AR_PHY_RADAR_0_FIRPWR_S 24240 241#define AR_PHY_RADAR_1 0x9958242#define AR_PHY_RADAR_1_RELPWR_ENA 0x00800000243#define AR_PHY_RADAR_1_USE_FIR128 0x00400000244#define AR_PHY_RADAR_1_RELPWR_THRESH 0x003F0000245#define AR_PHY_RADAR_1_RELPWR_THRESH_S 16246#define AR_PHY_RADAR_1_BLOCK_CHECK 0x00008000247#define AR_PHY_RADAR_1_MAX_RRSSI 0x00004000248#define AR_PHY_RADAR_1_RELSTEP_CHECK 0x00002000249#define AR_PHY_RADAR_1_RELSTEP_THRESH 0x00001F00250#define AR_PHY_RADAR_1_RELSTEP_THRESH_S 8251#define AR_PHY_RADAR_1_MAXLEN 0x000000FF252#define AR_PHY_RADAR_1_MAXLEN_S 0253 254#define AR_PHY_SWITCH_CHAIN_0 0x9960255#define AR_PHY_SWITCH_COM 0x9964256 257#define AR_PHY_SIGMA_DELTA 0x996C258#define AR_PHY_SIGMA_DELTA_ADC_SEL 0x00000003259#define AR_PHY_SIGMA_DELTA_ADC_SEL_S 0260#define AR_PHY_SIGMA_DELTA_FILT2 0x000000F8261#define AR_PHY_SIGMA_DELTA_FILT2_S 3262#define AR_PHY_SIGMA_DELTA_FILT1 0x00001F00263#define AR_PHY_SIGMA_DELTA_FILT1_S 8264#define AR_PHY_SIGMA_DELTA_ADC_CLIP 0x01FFE000265#define AR_PHY_SIGMA_DELTA_ADC_CLIP_S 13266 267#define AR_PHY_RESTART 0x9970268#define AR_PHY_RESTART_DIV_GC 0x001C0000269#define AR_PHY_RESTART_DIV_GC_S 18270 271#define AR_PHY_RFBUS_REQ 0x997C272#define AR_PHY_RFBUS_REQ_EN 0x00000001273 274#define AR_PHY_TIMING7 0x9980275#define AR_PHY_TIMING8 0x9984276#define AR_PHY_TIMING8_PILOT_MASK_2 0x000FFFFF277#define AR_PHY_TIMING8_PILOT_MASK_2_S 0278 279#define AR_PHY_BIN_MASK2_1 0x9988280#define AR_PHY_BIN_MASK2_2 0x998c281#define AR_PHY_BIN_MASK2_3 0x9990282#define AR_PHY_BIN_MASK2_4 0x9994283 284#define AR_PHY_BIN_MASK_1 0x9900285#define AR_PHY_BIN_MASK_2 0x9904286#define AR_PHY_BIN_MASK_3 0x9908287 288#define AR_PHY_MASK_CTL 0x990c289 290#define AR_PHY_BIN_MASK2_4_MASK_4 0x00003FFF291#define AR_PHY_BIN_MASK2_4_MASK_4_S 0292 293#define AR_PHY_TIMING9 0x9998294#define AR_PHY_TIMING10 0x999c295#define AR_PHY_TIMING10_PILOT_MASK_2 0x000FFFFF296#define AR_PHY_TIMING10_PILOT_MASK_2_S 0297 298#define AR_PHY_TIMING11 0x99a0299#define AR_PHY_TIMING11_SPUR_DELTA_PHASE 0x000FFFFF300#define AR_PHY_TIMING11_SPUR_DELTA_PHASE_S 0301#define AR_PHY_TIMING11_USE_SPUR_IN_AGC 0x40000000302#define AR_PHY_TIMING11_USE_SPUR_IN_SELFCOR 0x80000000303 304#define AR_PHY_RX_CHAINMASK 0x99a4305#define AR_PHY_NEW_ADC_DC_GAIN_CORR(_i) (0x99b4 + ((_i) << 12))306#define AR_PHY_NEW_ADC_GAIN_CORR_ENABLE 0x40000000307#define AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE 0x80000000308 309#define AR_PHY_MULTICHAIN_GAIN_CTL 0x99ac310#define AR_PHY_9285_FAST_DIV_BIAS 0x00007E00311#define AR_PHY_9285_FAST_DIV_BIAS_S 9312#define AR_PHY_9285_ANT_DIV_CTL_ALL 0x7f000000313#define AR_PHY_9285_ANT_DIV_CTL 0x01000000314#define AR_PHY_9285_ANT_DIV_CTL_S 24315#define AR_PHY_9285_ANT_DIV_ALT_LNACONF 0x06000000316#define AR_PHY_9285_ANT_DIV_ALT_LNACONF_S 25317#define AR_PHY_9285_ANT_DIV_MAIN_LNACONF 0x18000000318#define AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S 27319#define AR_PHY_9285_ANT_DIV_ALT_GAINTB 0x20000000320#define AR_PHY_9285_ANT_DIV_ALT_GAINTB_S 29321#define AR_PHY_9285_ANT_DIV_MAIN_GAINTB 0x40000000322#define AR_PHY_9285_ANT_DIV_MAIN_GAINTB_S 30323#define AR_PHY_9285_ANT_DIV_GAINTB_0 0324#define AR_PHY_9285_ANT_DIV_GAINTB_1 1325 326#define ATH_BT_COEX_ANTDIV_CONTROL1_ENABLE 0x0b327#define ATH_BT_COEX_ANTDIV_CONTROL2_ENABLE 0x09328#define ATH_BT_COEX_ANTDIV_CONTROL1_FIXED_A 0x04329#define ATH_BT_COEX_ANTDIV_CONTROL2_FIXED_A 0x09330#define ATH_BT_COEX_ANT_DIV_SWITCH_COM 0x66666666331 332#define AR_PHY_EXT_CCA0 0x99b8333#define AR_PHY_EXT_CCA0_THRESH62 0x000000FF334#define AR_PHY_EXT_CCA0_THRESH62_S 0335 336#define AR_PHY_EXT_CCA 0x99bc337#define AR_PHY_EXT_CCA_CYCPWR_THR1 0x0000FE00338#define AR_PHY_EXT_CCA_CYCPWR_THR1_S 9339#define AR_PHY_EXT_CCA_THRESH62 0x007F0000340#define AR_PHY_EXT_CCA_THRESH62_S 16341#define AR_PHY_EXT_TIMING5_CYCPWR_THR1 0x0000FE00L342#define AR_PHY_EXT_TIMING5_CYCPWR_THR1_S 9343 344#define AR_PHY_EXT_MINCCA_PWR 0xFF800000345#define AR_PHY_EXT_MINCCA_PWR_S 23346#define AR9280_PHY_EXT_MINCCA_PWR 0x01FF0000347#define AR9280_PHY_EXT_MINCCA_PWR_S 16348 349#define AR_PHY_SFCORR_EXT 0x99c0350#define AR_PHY_SFCORR_EXT_M1_THRESH 0x0000007F351#define AR_PHY_SFCORR_EXT_M1_THRESH_S 0352#define AR_PHY_SFCORR_EXT_M2_THRESH 0x00003F80353#define AR_PHY_SFCORR_EXT_M2_THRESH_S 7354#define AR_PHY_SFCORR_EXT_M1_THRESH_LOW 0x001FC000355#define AR_PHY_SFCORR_EXT_M1_THRESH_LOW_S 14356#define AR_PHY_SFCORR_EXT_M2_THRESH_LOW 0x0FE00000357#define AR_PHY_SFCORR_EXT_M2_THRESH_LOW_S 21358#define AR_PHY_SFCORR_SPUR_SUBCHNL_SD_S 28359 360#define AR_PHY_HALFGI 0x99D0361#define AR_PHY_HALFGI_DSC_MAN 0x0007FFF0362#define AR_PHY_HALFGI_DSC_MAN_S 4363#define AR_PHY_HALFGI_DSC_EXP 0x0000000F364#define AR_PHY_HALFGI_DSC_EXP_S 0365 366#define AR_PHY_CHAN_INFO_MEMORY 0x99DC367#define AR_PHY_CHAN_INFO_MEMORY_CAPTURE_MASK 0x0001368 369#define AR_PHY_HEAVY_CLIP_ENABLE 0x99E0370 371#define AR_PHY_HEAVY_CLIP_FACTOR_RIFS 0x99EC372#define AR_PHY_RIFS_INIT_DELAY 0x03ff0000373 374#define AR_PHY_M_SLEEP 0x99f0375#define AR_PHY_REFCLKDLY 0x99f4376#define AR_PHY_REFCLKPD 0x99f8377 378#define AR_PHY_CALMODE 0x99f0379 380#define AR_PHY_CALMODE_IQ 0x00000000381#define AR_PHY_CALMODE_ADC_GAIN 0x00000001382#define AR_PHY_CALMODE_ADC_DC_PER 0x00000002383#define AR_PHY_CALMODE_ADC_DC_INIT 0x00000003384 385#define AR_PHY_CAL_MEAS_0(_i) (0x9c10 + ((_i) << 12))386#define AR_PHY_CAL_MEAS_1(_i) (0x9c14 + ((_i) << 12))387#define AR_PHY_CAL_MEAS_2(_i) (0x9c18 + ((_i) << 12))388#define AR_PHY_CAL_MEAS_3(_i) (0x9c1c + ((_i) << 12))389 390#define AR_PHY_CURRENT_RSSI 0x9c1c391#define AR9280_PHY_CURRENT_RSSI 0x9c3c392 393#define AR_PHY_RFBUS_GRANT 0x9C20394#define AR_PHY_RFBUS_GRANT_EN 0x00000001395 396#define AR_PHY_CHAN_INFO_GAIN_DIFF 0x9CF4397#define AR_PHY_CHAN_INFO_GAIN_DIFF_UPPER_LIMIT 320398 399#define AR_PHY_CHAN_INFO_GAIN 0x9CFC400 401#define AR_PHY_MODE 0xA200402#define AR_PHY_MODE_ASYNCFIFO 0x80403#define AR_PHY_MODE_AR2133 0x08404#define AR_PHY_MODE_AR5111 0x00405#define AR_PHY_MODE_AR5112 0x08406#define AR_PHY_MODE_DYNAMIC 0x04407#define AR_PHY_MODE_RF2GHZ 0x02408#define AR_PHY_MODE_RF5GHZ 0x00409#define AR_PHY_MODE_CCK 0x01410#define AR_PHY_MODE_OFDM 0x00411#define AR_PHY_MODE_DYN_CCK_DISABLE 0x100412 413#define AR_PHY_CCK_TX_CTRL 0xA204414#define AR_PHY_CCK_TX_CTRL_JAPAN 0x00000010415#define AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK 0x0000000C416#define AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK_S 2417 418#define AR_PHY_CCK_DETECT 0xA208419#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK 0x0000003F420#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK_S 0421/* [12:6] settling time for antenna switch */422#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME 0x00001FC0423#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME_S 6424#define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV 0x2000425#define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV_S 13426 427#define AR_PHY_GAIN_2GHZ 0xA20C428#define AR_PHY_GAIN_2GHZ_RXTX_MARGIN 0x00FC0000429#define AR_PHY_GAIN_2GHZ_RXTX_MARGIN_S 18430#define AR_PHY_GAIN_2GHZ_BSW_MARGIN 0x00003C00431#define AR_PHY_GAIN_2GHZ_BSW_MARGIN_S 10432#define AR_PHY_GAIN_2GHZ_BSW_ATTEN 0x0000001F433#define AR_PHY_GAIN_2GHZ_BSW_ATTEN_S 0434 435#define AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN 0x003E0000436#define AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN_S 17437#define AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN 0x0001F000438#define AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN_S 12439#define AR_PHY_GAIN_2GHZ_XATTEN2_DB 0x00000FC0440#define AR_PHY_GAIN_2GHZ_XATTEN2_DB_S 6441#define AR_PHY_GAIN_2GHZ_XATTEN1_DB 0x0000003F442#define AR_PHY_GAIN_2GHZ_XATTEN1_DB_S 0443 444#define AR_PHY_CCK_RXCTRL4 0xA21C445#define AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT 0x01F80000446#define AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT_S 19447 448#define AR_PHY_DAG_CTRLCCK 0xA228449#define AR_PHY_DAG_CTRLCCK_EN_RSSI_THR 0x00000200450#define AR_PHY_DAG_CTRLCCK_RSSI_THR 0x0001FC00451#define AR_PHY_DAG_CTRLCCK_RSSI_THR_S 10452 453#define AR_PHY_FORCE_CLKEN_CCK 0xA22C454#define AR_PHY_FORCE_CLKEN_CCK_MRC_MUX 0x00000040455 456#define AR_PHY_POWER_TX_RATE3 0xA234457#define AR_PHY_POWER_TX_RATE4 0xA238458 459#define AR_PHY_SCRM_SEQ_XR 0xA23C460#define AR_PHY_HEADER_DETECT_XR 0xA240461#define AR_PHY_CHIRP_DETECTED_XR 0xA244462#define AR_PHY_BLUETOOTH 0xA254463 464#define AR_PHY_TPCRG1 0xA258465#define AR_PHY_TPCRG1_NUM_PD_GAIN 0x0000c000466#define AR_PHY_TPCRG1_NUM_PD_GAIN_S 14467 468#define AR_PHY_TPCRG1_PD_GAIN_1 0x00030000469#define AR_PHY_TPCRG1_PD_GAIN_1_S 16470#define AR_PHY_TPCRG1_PD_GAIN_2 0x000C0000471#define AR_PHY_TPCRG1_PD_GAIN_2_S 18472#define AR_PHY_TPCRG1_PD_GAIN_3 0x00300000473#define AR_PHY_TPCRG1_PD_GAIN_3_S 20474 475#define AR_PHY_TPCRG1_PD_CAL_ENABLE 0x00400000476#define AR_PHY_TPCRG1_PD_CAL_ENABLE_S 22477 478#define AR_PHY_TX_PWRCTRL4 0xa264479#define AR_PHY_TX_PWRCTRL_PD_AVG_VALID 0x00000001480#define AR_PHY_TX_PWRCTRL_PD_AVG_VALID_S 0481#define AR_PHY_TX_PWRCTRL_PD_AVG_OUT 0x000001FE482#define AR_PHY_TX_PWRCTRL_PD_AVG_OUT_S 1483 484#define AR_PHY_TX_PWRCTRL6_0 0xa270485#define AR_PHY_TX_PWRCTRL6_1 0xb270486#define AR_PHY_TX_PWRCTRL_ERR_EST_MODE 0x03000000487#define AR_PHY_TX_PWRCTRL_ERR_EST_MODE_S 24488 489#define AR_PHY_TX_PWRCTRL7 0xa274490#define AR_PHY_TX_PWRCTRL_INIT_TX_GAIN 0x01F80000491#define AR_PHY_TX_PWRCTRL_INIT_TX_GAIN_S 19492 493#define AR_PHY_TX_PWRCTRL8 0xa278494 495#define AR_PHY_TX_PWRCTRL9 0xa27C496 497#define AR_PHY_TX_PWRCTRL10 0xa394498#define AR_PHY_TX_DESIRED_SCALE_CCK 0x00007C00499#define AR_PHY_TX_DESIRED_SCALE_CCK_S 10500#define AR_PHY_TX_PWRCTRL9_RES_DC_REMOVAL 0x80000000501#define AR_PHY_TX_PWRCTRL9_RES_DC_REMOVAL_S 31502 503#define AR_PHY_TX_GAIN_TBL1 0xa300504#define AR_PHY_TX_GAIN 0x0007F000505#define AR_PHY_TX_GAIN_S 12506 507#define AR_PHY_CH0_TX_PWRCTRL11 0xa398508#define AR_PHY_CH1_TX_PWRCTRL11 0xb398509#define AR_PHY_CH0_TX_PWRCTRL12 0xa3dc510#define AR_PHY_CH0_TX_PWRCTRL13 0xa3e0511#define AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP 0x0000FC00512#define AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP_S 10513 514#define AR_PHY_VIT_MASK2_M_46_61 0xa3a0515#define AR_PHY_MASK2_M_31_45 0xa3a4516#define AR_PHY_MASK2_M_16_30 0xa3a8517#define AR_PHY_MASK2_M_00_15 0xa3ac518#define AR_PHY_MASK2_P_15_01 0xa3b8519#define AR_PHY_MASK2_P_30_16 0xa3bc520#define AR_PHY_MASK2_P_45_31 0xa3c0521#define AR_PHY_MASK2_P_61_45 0xa3c4522#define AR_PHY_SPUR_REG 0x994c523 524#define AR_PHY_SPUR_REG_MASK_RATE_CNTL (0xFF << 18)525#define AR_PHY_SPUR_REG_MASK_RATE_CNTL_S 18526 527#define AR_PHY_SPUR_REG_ENABLE_MASK_PPM 0x20000528#define AR_PHY_SPUR_REG_MASK_RATE_SELECT (0xFF << 9)529#define AR_PHY_SPUR_REG_MASK_RATE_SELECT_S 9530#define AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI 0x100531#define AR_PHY_SPUR_REG_SPUR_RSSI_THRESH 0x7F532#define AR_PHY_SPUR_REG_SPUR_RSSI_THRESH_S 0533 534#define AR_PHY_PILOT_MASK_01_30 0xa3b0535#define AR_PHY_PILOT_MASK_31_60 0xa3b4536 537#define AR_PHY_CHANNEL_MASK_01_30 0x99d4538#define AR_PHY_CHANNEL_MASK_31_60 0x99d8539 540#define AR_PHY_ANALOG_SWAP 0xa268541#define AR_PHY_SWAP_ALT_CHAIN 0x00000040542 543#define AR_PHY_TPCRG5 0xA26C544#define AR_PHY_TPCRG5_PD_GAIN_OVERLAP 0x0000000F545#define AR_PHY_TPCRG5_PD_GAIN_OVERLAP_S 0546#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1 0x000003F0547#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1_S 4548#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2 0x0000FC00549#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2_S 10550#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3 0x003F0000551#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3_S 16552#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4 0x0FC00000553#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4_S 22554 555/* Carrier leak calibration control, do it after AGC calibration */556#define AR_PHY_CL_CAL_CTL 0xA358557#define AR_PHY_CL_CAL_ENABLE 0x00000002558#define AR_PHY_PARALLEL_CAL_ENABLE 0x00000001559 560#define AR_PHY_POWER_TX_RATE5 0xA38C561#define AR_PHY_POWER_TX_RATE6 0xA390562 563#define AR_PHY_CAL_CHAINMASK 0xA39C564 565#define AR_PHY_POWER_TX_SUB 0xA3C8566#define AR_PHY_POWER_TX_RATE7 0xA3CC567#define AR_PHY_POWER_TX_RATE8 0xA3D0568#define AR_PHY_POWER_TX_RATE9 0xA3D4569 570#define AR_PHY_XPA_CFG 0xA3D8571#define AR_PHY_FORCE_XPA_CFG 0x000000001572#define AR_PHY_FORCE_XPA_CFG_S 0573 574#define AR_PHY_CH1_CCA 0xa864575#define AR_PHY_CH1_MINCCA_PWR 0x0FF80000576#define AR_PHY_CH1_MINCCA_PWR_S 19577#define AR9280_PHY_CH1_MINCCA_PWR 0x1FF00000578#define AR9280_PHY_CH1_MINCCA_PWR_S 20579 580#define AR_PHY_CH2_CCA 0xb864581#define AR_PHY_CH2_MINCCA_PWR 0x0FF80000582#define AR_PHY_CH2_MINCCA_PWR_S 19583 584#define AR_PHY_CH1_EXT_CCA 0xa9bc585#define AR_PHY_CH1_EXT_MINCCA_PWR 0xFF800000586#define AR_PHY_CH1_EXT_MINCCA_PWR_S 23587#define AR9280_PHY_CH1_EXT_MINCCA_PWR 0x01FF0000588#define AR9280_PHY_CH1_EXT_MINCCA_PWR_S 16589 590#define AR_PHY_CH2_EXT_CCA 0xb9bc591#define AR_PHY_CH2_EXT_MINCCA_PWR 0xFF800000592#define AR_PHY_CH2_EXT_MINCCA_PWR_S 23593 594#define AR_PHY_CCA_NOM_VAL_5416_2GHZ -90595#define AR_PHY_CCA_NOM_VAL_5416_5GHZ -100596#define AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ -100597#define AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ -110598#define AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ -80599#define AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ -90600 601#define AR_PHY_CCA_NOM_VAL_9280_2GHZ -112602#define AR_PHY_CCA_NOM_VAL_9280_5GHZ -112603#define AR_PHY_CCA_MIN_GOOD_VAL_9280_2GHZ -127604#define AR_PHY_CCA_MIN_GOOD_VAL_9280_5GHZ -122605#define AR_PHY_CCA_MAX_GOOD_VAL_9280_2GHZ -97606#define AR_PHY_CCA_MAX_GOOD_VAL_9280_5GHZ -102607 608#define AR_PHY_CCA_NOM_VAL_9285_2GHZ -118609#define AR_PHY_CCA_MIN_GOOD_VAL_9285_2GHZ -127610#define AR_PHY_CCA_MAX_GOOD_VAL_9285_2GHZ -108611 612#define AR_PHY_CCA_NOM_VAL_9271_2GHZ -118613#define AR_PHY_CCA_MIN_GOOD_VAL_9271_2GHZ -127614#define AR_PHY_CCA_MAX_GOOD_VAL_9271_2GHZ -116615 616#define AR_PHY_CCA_NOM_VAL_9287_2GHZ -112617#define AR_PHY_CCA_MIN_GOOD_VAL_9287_2GHZ -127618#define AR_PHY_CCA_MAX_GOOD_VAL_9287_2GHZ -97619 620#endif621