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1/*2 * Copyright (c) 2008-2011 Atheros Communications Inc.3 *4 * Permission to use, copy, modify, and/or distribute this software for any5 * purpose with or without fee is hereby granted, provided that the above6 * copyright notice and this permission notice appear in all copies.7 *8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.15 */16 17#ifndef ATH9K_H18#define ATH9K_H19 20#include <linux/etherdevice.h>21#include <linux/device.h>22#include <linux/interrupt.h>23#include <linux/kstrtox.h>24#include <linux/leds.h>25#include <linux/completion.h>26#include <linux/time.h>27#include <linux/hw_random.h>28 29#include "common.h"30#include "debug.h"31#include "mci.h"32#include "dfs.h"33 34struct ath_node;35struct ath_vif;36 37extern struct ieee80211_ops ath9k_ops;38extern int ath9k_modparam_nohwcrypt;39extern int ath9k_led_blink;40extern bool is_ath9k_unloaded;41extern int ath9k_use_chanctx;42extern int ath9k_use_msi;43 44/*************************/45/* Descriptor Management */46/*************************/47 48#define ATH_TXSTATUS_RING_SIZE 51249 50/* Macro to expand scalars to 64-bit objects */51#define ito64(x) (sizeof(x) == 1) ? \52 (((unsigned long long int)(x)) & (0xff)) : \53 (sizeof(x) == 2) ? \54 (((unsigned long long int)(x)) & 0xffff) : \55 ((sizeof(x) == 4) ? \56 (((unsigned long long int)(x)) & 0xffffffff) : \57 (unsigned long long int)(x))58 59#define ATH_TXBUF_RESET(_bf) do { \60 (_bf)->bf_lastbf = NULL; \61 (_bf)->bf_next = NULL; \62 memset(&((_bf)->bf_state), 0, \63 sizeof(struct ath_buf_state)); \64 } while (0)65 66#define DS2PHYS(_dd, _ds) \67 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))68#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)69#define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)70 71struct ath_descdma {72 void *dd_desc;73 dma_addr_t dd_desc_paddr;74 u32 dd_desc_len;75};76 77int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,78 struct list_head *head, const char *name,79 int nbuf, int ndesc, bool is_tx);80 81/***********/82/* RX / TX */83/***********/84 85#define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))86 87/* increment with wrap-around */88#define INCR(_l, _sz) do { \89 (_l)++; \90 (_l) &= ((_sz) - 1); \91 } while (0)92 93#define ATH_RXBUF 51294#define ATH_TXBUF 51295#define ATH_TXBUF_RESERVE 596#define ATH_TXMAXTRY 1397#define ATH_MAX_SW_RETRIES 3098 99#define TID_TO_WME_AC(_tid) \100 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \101 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \102 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \103 IEEE80211_AC_VO)104 105#define ATH_AGGR_DELIM_SZ 4106#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */107/* number of delimiters for encryption padding */108#define ATH_AGGR_ENCRYPTDELIM 10109/* minimum h/w qdepth to be sustained to maximize aggregation */110#define ATH_AGGR_MIN_QDEPTH 2111/* minimum h/w qdepth for non-aggregated traffic */112#define ATH_NON_AGGR_MIN_QDEPTH 8113#define ATH_HW_CHECK_POLL_INT 1000114#define ATH_TXFIFO_DEPTH 8115#define ATH_TX_ERROR 0x01116 117/* Stop tx traffic 1ms before the GO goes away */118#define ATH_P2P_PS_STOP_TIME 1000119 120#define IEEE80211_SEQ_SEQ_SHIFT 4121#define IEEE80211_SEQ_MAX 4096122#define IEEE80211_WEP_IVLEN 3123#define IEEE80211_WEP_KIDLEN 1124#define IEEE80211_WEP_CRCLEN 4125#define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \126 (IEEE80211_WEP_IVLEN + \127 IEEE80211_WEP_KIDLEN + \128 IEEE80211_WEP_CRCLEN))129 130/* return whether a bit at index _n in bitmap _bm is set131 * _sz is the size of the bitmap */132#define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \133 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))134 135/* return block-ack bitmap index given sequence and starting sequence */136#define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))137 138/* return the seqno for _start + _offset */139#define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))140 141/* returns delimiter padding required given the packet length */142#define ATH_AGGR_GET_NDELIM(_len) \143 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \144 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))145 146#define BAW_WITHIN(_start, _bawsz, _seqno) \147 ((((_seqno) - (_start)) & 4095) < (_bawsz))148 149#define ATH_AN_2_TID(_an, _tidno) ath_node_to_tid(_an, _tidno)150 151#define IS_HT_RATE(rate) (rate & 0x80)152#define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))153#define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))154 155enum {156 WLAN_RC_PHY_OFDM,157 WLAN_RC_PHY_CCK,158};159 160struct ath_txq {161 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */162 u32 axq_qnum; /* ath9k hardware queue number */163 void *axq_link;164 struct list_head axq_q;165 spinlock_t axq_lock;166 u32 axq_depth;167 u32 axq_ampdu_depth;168 bool axq_tx_inprogress;169 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];170 u8 txq_headidx;171 u8 txq_tailidx;172 int pending_frames;173 struct sk_buff_head complete_q;174};175 176struct ath_frame_info {177 struct ath_buf *bf;178 u16 framelen;179 s8 txq;180 u8 keyix;181 u8 rtscts_rate;182 u8 retries : 6;183 u8 dyn_smps : 1;184 u8 baw_tracked : 1;185 u8 tx_power;186 enum ath9k_key_type keytype:2;187};188 189struct ath_rxbuf {190 struct list_head list;191 struct sk_buff *bf_mpdu;192 void *bf_desc;193 dma_addr_t bf_daddr;194 dma_addr_t bf_buf_addr;195};196 197/**198 * enum buffer_type - Buffer type flags199 *200 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)201 * @BUF_AGGR: Indicates whether the buffer can be aggregated202 * (used in aggregation scheduling)203 */204enum buffer_type {205 BUF_AMPDU = BIT(0),206 BUF_AGGR = BIT(1),207};208 209#define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)210#define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)211 212struct ath_buf_state {213 u8 bf_type;214 u8 bfs_paprd;215 u8 ndelim;216 bool stale;217 u16 seqno;218 unsigned long bfs_paprd_timestamp;219};220 221struct ath_buf {222 struct list_head list;223 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or224 an aggregate) */225 struct ath_buf *bf_next; /* next subframe in the aggregate */226 struct sk_buff *bf_mpdu; /* enclosing frame structure */227 void *bf_desc; /* virtual addr of desc */228 dma_addr_t bf_daddr; /* physical addr of desc */229 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */230 struct ieee80211_tx_rate rates[4];231 struct ath_buf_state bf_state;232};233 234struct ath_atx_tid {235 struct list_head list;236 struct sk_buff_head retry_q;237 struct ath_node *an;238 struct ath_txq *txq;239 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];240 u16 seq_start;241 u16 seq_next;242 u16 baw_size;243 u8 tidno;244 int baw_head; /* first un-acked tx buffer */245 int baw_tail; /* next unused tx buffer slot */246 247 s8 bar_index;248 bool active;249 bool clear_ps_filter;250};251 252void ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid);253 254struct ath_node {255 struct ath_softc *sc;256 struct ieee80211_sta *sta; /* station struct we're part of */257 struct ieee80211_vif *vif; /* interface with which we're associated */258 259 u16 maxampdu;260 u8 mpdudensity;261 s8 ps_key;262 263 bool sleeping;264 bool no_ps_filter;265 266#ifdef CONFIG_ATH9K_STATION_STATISTICS267 struct ath_rx_rate_stats rx_rate_stats;268#endif269 u8 key_idx[4];270 271 int ackto;272 struct list_head list;273};274 275struct ath_tx_control {276 struct ath_txq *txq;277 struct ath_node *an;278 struct ieee80211_sta *sta;279 u8 paprd;280};281 282 283/**284 * @txq_map: Index is mac80211 queue number. This is285 * not necessarily the same as the hardware queue number286 * (axq_qnum).287 */288struct ath_tx {289 u32 txqsetup;290 spinlock_t txbuflock;291 struct list_head txbuf;292 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];293 struct ath_descdma txdma;294 struct ath_txq *txq_map[IEEE80211_NUM_ACS];295 struct ath_txq *uapsdq;296 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];297};298 299struct ath_rx_edma {300 struct sk_buff_head rx_fifo;301 u32 rx_fifo_hwsize;302};303 304struct ath_rx {305 u8 defant;306 u8 rxotherant;307 bool discard_next;308 u32 *rxlink;309 u32 num_pkts;310 struct list_head rxbuf;311 struct ath_descdma rxdma;312 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];313 314 struct ath_rxbuf *buf_hold;315 struct sk_buff *frag;316 317 u32 ampdu_ref;318};319 320/*******************/321/* Channel Context */322/*******************/323 324struct ath_acq {325 struct list_head acq_new;326 struct list_head acq_old;327 spinlock_t lock;328};329 330struct ath_chanctx {331 struct cfg80211_chan_def chandef;332 struct list_head vifs;333 struct ath_acq acq[IEEE80211_NUM_ACS];334 int hw_queue_base;335 336 /* do not dereference, use for comparison only */337 struct ieee80211_vif *primary_sta;338 339 struct ath_beacon_config beacon;340 struct ath9k_hw_cal_data caldata;341 struct timespec64 tsf_ts;342 u64 tsf_val;343 u32 last_beacon;344 345 int flush_timeout;346 u16 txpower;347 u16 cur_txpower;348 bool offchannel;349 bool stopped;350 bool active;351 bool assigned;352 bool switch_after_beacon;353 354 short nvifs;355 short nvifs_assigned;356 unsigned int rxfilter;357};358 359enum ath_chanctx_event {360 ATH_CHANCTX_EVENT_BEACON_PREPARE,361 ATH_CHANCTX_EVENT_BEACON_SENT,362 ATH_CHANCTX_EVENT_TSF_TIMER,363 ATH_CHANCTX_EVENT_BEACON_RECEIVED,364 ATH_CHANCTX_EVENT_AUTHORIZED,365 ATH_CHANCTX_EVENT_SWITCH,366 ATH_CHANCTX_EVENT_ASSIGN,367 ATH_CHANCTX_EVENT_UNASSIGN,368 ATH_CHANCTX_EVENT_CHANGE,369 ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL,370};371 372enum ath_chanctx_state {373 ATH_CHANCTX_STATE_IDLE,374 ATH_CHANCTX_STATE_WAIT_FOR_BEACON,375 ATH_CHANCTX_STATE_WAIT_FOR_TIMER,376 ATH_CHANCTX_STATE_SWITCH,377 ATH_CHANCTX_STATE_FORCE_ACTIVE,378};379 380struct ath_chanctx_sched {381 bool beacon_pending;382 bool beacon_adjust;383 bool offchannel_pending;384 bool wait_switch;385 bool force_noa_update;386 bool extend_absence;387 bool mgd_prepare_tx;388 enum ath_chanctx_state state;389 u8 beacon_miss;390 391 u32 next_tbtt;392 u32 switch_start_time;393 unsigned int offchannel_duration;394 unsigned int channel_switch_time;395 396 /* backup, in case the hardware timer fails */397 struct timer_list timer;398};399 400enum ath_offchannel_state {401 ATH_OFFCHANNEL_IDLE,402 ATH_OFFCHANNEL_PROBE_SEND,403 ATH_OFFCHANNEL_PROBE_WAIT,404 ATH_OFFCHANNEL_SUSPEND,405 ATH_OFFCHANNEL_ROC_START,406 ATH_OFFCHANNEL_ROC_WAIT,407 ATH_OFFCHANNEL_ROC_DONE,408};409 410enum ath_roc_complete_reason {411 ATH_ROC_COMPLETE_EXPIRE,412 ATH_ROC_COMPLETE_ABORT,413 ATH_ROC_COMPLETE_CANCEL,414};415 416struct ath_offchannel {417 struct ath_chanctx chan;418 struct timer_list timer;419 struct cfg80211_scan_request *scan_req;420 struct ieee80211_vif *scan_vif;421 int scan_idx;422 enum ath_offchannel_state state;423 struct ieee80211_channel *roc_chan;424 struct ieee80211_vif *roc_vif;425 int roc_duration;426 int duration;427};428 429static inline struct ath_atx_tid *430ath_node_to_tid(struct ath_node *an, u8 tidno)431{432 struct ieee80211_sta *sta = an->sta;433 struct ieee80211_vif *vif = an->vif;434 struct ieee80211_txq *txq;435 436 BUG_ON(!vif);437 if (sta)438 txq = sta->txq[tidno % ARRAY_SIZE(sta->txq)];439 else440 txq = vif->txq;441 442 return (struct ath_atx_tid *) txq->drv_priv;443}444 445#define case_rtn_string(val) case val: return #val446 447#define ath_for_each_chanctx(_sc, _ctx) \448 for (ctx = &sc->chanctx[0]; \449 ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1]; \450 ctx++)451 452void ath_chanctx_init(struct ath_softc *sc);453void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,454 struct cfg80211_chan_def *chandef);455 456#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT457 458static inline struct ath_chanctx *459ath_chanctx_get(struct ieee80211_chanctx_conf *ctx)460{461 struct ath_chanctx **ptr = (void *) ctx->drv_priv;462 return *ptr;463}464 465bool ath9k_is_chanctx_enabled(void);466void ath9k_fill_chanctx_ops(void);467void ath9k_init_channel_context(struct ath_softc *sc);468void ath9k_offchannel_init(struct ath_softc *sc);469void ath9k_deinit_channel_context(struct ath_softc *sc);470int ath9k_init_p2p(struct ath_softc *sc);471void ath9k_deinit_p2p(struct ath_softc *sc);472void ath9k_p2p_remove_vif(struct ath_softc *sc,473 struct ieee80211_vif *vif);474void ath9k_p2p_beacon_sync(struct ath_softc *sc);475void ath9k_p2p_bss_info_changed(struct ath_softc *sc,476 struct ieee80211_vif *vif);477void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,478 struct sk_buff *skb);479void ath9k_p2p_ps_timer(void *priv);480void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx);481void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx);482void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx);483 484void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,485 enum ath_chanctx_event ev);486void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,487 enum ath_chanctx_event ev);488void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,489 enum ath_chanctx_event ev);490void ath_chanctx_set_next(struct ath_softc *sc, bool force);491void ath_offchannel_next(struct ath_softc *sc);492void ath_scan_complete(struct ath_softc *sc, bool abort);493void ath_roc_complete(struct ath_softc *sc,494 enum ath_roc_complete_reason reason);495struct ath_chanctx* ath_is_go_chanctx_present(struct ath_softc *sc);496 497#else498 499static inline bool ath9k_is_chanctx_enabled(void)500{501 return false;502}503static inline void ath9k_fill_chanctx_ops(void)504{505}506static inline void ath9k_init_channel_context(struct ath_softc *sc)507{508}509static inline void ath9k_offchannel_init(struct ath_softc *sc)510{511}512static inline void ath9k_deinit_channel_context(struct ath_softc *sc)513{514}515static inline void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,516 enum ath_chanctx_event ev)517{518}519static inline void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,520 enum ath_chanctx_event ev)521{522}523static inline void ath_chanctx_event(struct ath_softc *sc,524 struct ieee80211_vif *vif,525 enum ath_chanctx_event ev)526{527}528static inline int ath9k_init_p2p(struct ath_softc *sc)529{530 return 0;531}532static inline void ath9k_deinit_p2p(struct ath_softc *sc)533{534}535static inline void ath9k_p2p_remove_vif(struct ath_softc *sc,536 struct ieee80211_vif *vif)537{538}539static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc)540{541}542static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc,543 struct ieee80211_vif *vif)544{545}546static inline void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,547 struct sk_buff *skb)548{549}550static inline void ath9k_p2p_ps_timer(struct ath_softc *sc)551{552}553static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc,554 struct ath_chanctx *ctx)555{556}557static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc,558 struct ath_chanctx *ctx)559{560}561static inline void ath_chanctx_check_active(struct ath_softc *sc,562 struct ath_chanctx *ctx)563{564}565 566#endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */567 568static inline void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq)569{570 spin_lock_bh(&txq->axq_lock);571}572static inline void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq)573{574 spin_unlock_bh(&txq->axq_lock);575}576 577void ath_startrecv(struct ath_softc *sc);578bool ath_stoprecv(struct ath_softc *sc);579u32 ath_calcrxfilter(struct ath_softc *sc);580int ath_rx_init(struct ath_softc *sc, int nbufs);581void ath_rx_cleanup(struct ath_softc *sc);582int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);583struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);584void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);585void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);586bool ath_drain_all_txq(struct ath_softc *sc);587void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);588void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);589void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);590void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);591void ath_txq_schedule_all(struct ath_softc *sc);592int ath_tx_init(struct ath_softc *sc, int nbufs);593int ath_txq_update(struct ath_softc *sc, int qnum,594 struct ath9k_tx_queue_info *q);595u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,596 int width, int half_gi, bool shortPreamble);597void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);598void ath_assign_seq(struct ath_common *common, struct sk_buff *skb);599int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,600 struct ath_tx_control *txctl);601void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,602 struct sk_buff *skb);603void ath_tx_tasklet(struct ath_softc *sc);604void ath_tx_edma_tasklet(struct ath_softc *sc);605int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,606 u16 tid, u16 *ssn);607void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);608 609void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);610void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,611 struct ath_node *an);612void ath9k_release_buffered_frames(struct ieee80211_hw *hw,613 struct ieee80211_sta *sta,614 u16 tids, int nframes,615 enum ieee80211_frame_release_type reason,616 bool more_data);617void ath9k_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *queue);618 619/********/620/* VIFs */621/********/622 623#define P2P_DEFAULT_CTWIN 10624 625struct ath_vif {626 struct list_head list;627 628 u16 seq_no;629 630 /* BSS info */631 u8 bssid[ETH_ALEN] __aligned(2);632 u16 aid;633 bool assoc;634 635 struct ieee80211_vif *vif;636 struct ath_node mcast_node;637 int av_bslot;638 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */639 struct ath_buf *av_bcbuf;640 struct ath_chanctx *chanctx;641 642 /* P2P Client */643 struct ieee80211_noa_data noa;644 645 /* P2P GO */646 u8 noa_index;647 u32 offchannel_start;648 u32 offchannel_duration;649 650 /* These are used for both periodic and one-shot */651 u32 noa_start;652 u32 noa_duration;653 bool periodic_noa;654 bool oneshot_noa;655};656 657struct ath9k_vif_iter_data {658 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */659 u8 mask[ETH_ALEN]; /* bssid mask */660 bool has_hw_macaddr;661 u8 slottime;662 bool beacons;663 664 int naps; /* number of AP vifs */665 int nmeshes; /* number of mesh vifs */666 int nstations; /* number of station vifs */667 int nadhocs; /* number of adhoc vifs */668 int nocbs; /* number of OCB vifs */669 int nbcnvifs; /* number of beaconing vifs */670 struct ieee80211_vif *primary_beacon_vif;671 struct ieee80211_vif *primary_sta;672};673 674void ath9k_calculate_iter_data(struct ath_softc *sc,675 struct ath_chanctx *ctx,676 struct ath9k_vif_iter_data *iter_data);677void ath9k_calculate_summary_state(struct ath_softc *sc,678 struct ath_chanctx *ctx);679void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif);680 681/*******************/682/* Beacon Handling */683/*******************/684 685/*686 * Regardless of the number of beacons we stagger, (i.e. regardless of the687 * number of BSSIDs) if a given beacon does not go out even after waiting this688 * number of beacon intervals, the game's up.689 */690#define BSTUCK_THRESH 9691#define ATH_BCBUF 8692#define ATH_DEFAULT_BINTVAL 100 /* TU */693#define ATH_DEFAULT_BMISS_LIMIT 10694 695#define TSF_TO_TU(_h,_l) \696 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))697 698struct ath_beacon {699 enum {700 OK, /* no change needed */701 UPDATE, /* update pending */702 COMMIT /* beacon sent, commit change */703 } updateslot; /* slot time update fsm */704 705 u32 beaconq;706 u32 bmisscnt;707 struct ieee80211_vif *bslot[ATH_BCBUF];708 int slottime;709 int slotupdate;710 struct ath_descdma bdma;711 struct ath_txq *cabq;712 struct list_head bbuf;713 714 bool tx_processed;715 bool tx_last;716};717 718void ath9k_beacon_tasklet(struct tasklet_struct *t);719void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *main_vif,720 bool beacons);721void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);722void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);723void ath9k_beacon_ensure_primary_slot(struct ath_softc *sc);724void ath9k_set_beacon(struct ath_softc *sc);725bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif);726void ath9k_csa_update(struct ath_softc *sc);727 728/*******************/729/* Link Monitoring */730/*******************/731 732#define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */733#define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */734#define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */735#define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */736#define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */737#define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */738#define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */739#define ATH_ANI_MAX_SKIP_COUNT 10740#define ATH_PAPRD_TIMEOUT 100 /* msecs */741#define ATH_PLL_WORK_INTERVAL 100742 743void ath_hw_check_work(struct work_struct *work);744void ath_reset_work(struct work_struct *work);745bool ath_hw_check(struct ath_softc *sc);746void ath_hw_pll_work(struct work_struct *work);747void ath_paprd_calibrate(struct work_struct *work);748void ath_ani_calibrate(struct timer_list *t);749void ath_start_ani(struct ath_softc *sc);750void ath_stop_ani(struct ath_softc *sc);751void ath_check_ani(struct ath_softc *sc);752int ath_update_survey_stats(struct ath_softc *sc);753void ath_update_survey_nf(struct ath_softc *sc, int channel);754void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);755void ath_ps_full_sleep(struct timer_list *t);756void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,757 bool sw_pending, bool timeout_override);758 759/**********/760/* BTCOEX */761/**********/762 763#define ATH_DUMP_BTCOEX(_s, _val) \764 do { \765 len += scnprintf(buf + len, size - len, \766 "%20s : %10d\n", _s, (_val)); \767 } while (0)768 769enum bt_op_flags {770 BT_OP_PRIORITY_DETECTED,771 BT_OP_SCAN,772};773 774struct ath_btcoex {775 spinlock_t btcoex_lock;776 struct timer_list period_timer; /* Timer for BT period */777 struct timer_list no_stomp_timer;778 u32 bt_priority_cnt;779 unsigned long bt_priority_time;780 unsigned long op_flags;781 int bt_stomp_type; /* Types of BT stomping */782 u32 btcoex_no_stomp; /* in msec */783 u32 btcoex_period; /* in msec */784 u32 btscan_no_stomp; /* in msec */785 u32 duty_cycle;786 u32 bt_wait_time;787 int rssi_count;788 struct ath_mci_profile mci;789 u8 stomp_audio;790};791 792#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT793int ath9k_init_btcoex(struct ath_softc *sc);794void ath9k_deinit_btcoex(struct ath_softc *sc);795void ath9k_start_btcoex(struct ath_softc *sc);796void ath9k_stop_btcoex(struct ath_softc *sc);797void ath9k_btcoex_timer_resume(struct ath_softc *sc);798void ath9k_btcoex_timer_pause(struct ath_softc *sc);799void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);800u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);801void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);802int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);803#else804static inline int ath9k_init_btcoex(struct ath_softc *sc)805{806 return 0;807}808static inline void ath9k_deinit_btcoex(struct ath_softc *sc)809{810}811static inline void ath9k_start_btcoex(struct ath_softc *sc)812{813}814static inline void ath9k_stop_btcoex(struct ath_softc *sc)815{816}817static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,818 u32 status)819{820}821static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,822 u32 max_4ms_framelen)823{824 return 0;825}826static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)827{828}829static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)830{831 return 0;832}833#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */834 835/********************/836/* LED Control */837/********************/838 839#define ATH_LED_PIN_DEF 1840#define ATH_LED_PIN_9287 8841#define ATH_LED_PIN_9300 10842#define ATH_LED_PIN_9485 6843#define ATH_LED_PIN_9462 4844 845#ifdef CONFIG_MAC80211_LEDS846void ath_init_leds(struct ath_softc *sc);847void ath_deinit_leds(struct ath_softc *sc);848#else849static inline void ath_init_leds(struct ath_softc *sc)850{851}852 853static inline void ath_deinit_leds(struct ath_softc *sc)854{855}856#endif857 858/************************/859/* Wake on Wireless LAN */860/************************/861 862#ifdef CONFIG_ATH9K_WOW863void ath9k_init_wow(struct ieee80211_hw *hw);864void ath9k_deinit_wow(struct ieee80211_hw *hw);865int ath9k_suspend(struct ieee80211_hw *hw,866 struct cfg80211_wowlan *wowlan);867int ath9k_resume(struct ieee80211_hw *hw);868void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);869#else870static inline void ath9k_init_wow(struct ieee80211_hw *hw)871{872}873static inline void ath9k_deinit_wow(struct ieee80211_hw *hw)874{875}876static inline int ath9k_suspend(struct ieee80211_hw *hw,877 struct cfg80211_wowlan *wowlan)878{879 return 0;880}881static inline int ath9k_resume(struct ieee80211_hw *hw)882{883 return 0;884}885static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)886{887}888#endif /* CONFIG_ATH9K_WOW */889 890/*******************************/891/* Antenna diversity/combining */892/*******************************/893 894#define ATH_ANT_RX_CURRENT_SHIFT 4895#define ATH_ANT_RX_MAIN_SHIFT 2896#define ATH_ANT_RX_MASK 0x3897 898#define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50899#define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100900#define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200901#define ATH_ANT_DIV_COMB_INIT_COUNT 95902#define ATH_ANT_DIV_COMB_MAX_COUNT 100903#define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30904#define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20905#define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50906#define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50907 908#define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4909#define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2910#define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2911 912struct ath_ant_comb {913 u16 count;914 u16 total_pkt_count;915 bool scan;916 bool scan_not_start;917 int main_total_rssi;918 int alt_total_rssi;919 int alt_recv_cnt;920 int main_recv_cnt;921 int rssi_lna1;922 int rssi_lna2;923 int rssi_add;924 int rssi_sub;925 int rssi_first;926 int rssi_second;927 int rssi_third;928 int ant_ratio;929 int ant_ratio2;930 bool alt_good;931 int quick_scan_cnt;932 enum ath9k_ant_div_comb_lna_conf main_conf;933 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;934 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;935 bool first_ratio;936 bool second_ratio;937 unsigned long scan_start_time;938 939 /*940 * Card-specific config values.941 */942 int low_rssi_thresh;943 int fast_div_bias;944};945 946void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);947 948/********************/949/* Main driver core */950/********************/951 952#define ATH9K_PCI_CUS198 0x0001953#define ATH9K_PCI_CUS230 0x0002954#define ATH9K_PCI_CUS217 0x0004955#define ATH9K_PCI_CUS252 0x0008956#define ATH9K_PCI_WOW 0x0010957#define ATH9K_PCI_BT_ANT_DIV 0x0020958#define ATH9K_PCI_D3_L1_WAR 0x0040959#define ATH9K_PCI_AR9565_1ANT 0x0080960#define ATH9K_PCI_AR9565_2ANT 0x0100961#define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200962#define ATH9K_PCI_KILLER 0x0400963#define ATH9K_PCI_LED_ACT_HI 0x0800964 965/*966 * Default cache line size, in bytes.967 * Used when PCI device not fully initialized by bootrom/BIOS968*/969#define DEFAULT_CACHELINE 32970#define ATH_CABQ_READY_TIME 80 /* % of beacon interval */971#define ATH_TXPOWER_MAX 100 /* .5 dBm units */972#define MAX_GTT_CNT 5973 974/* Powersave flags */975#define PS_WAIT_FOR_BEACON BIT(0)976#define PS_WAIT_FOR_CAB BIT(1)977#define PS_WAIT_FOR_PSPOLL_DATA BIT(2)978#define PS_WAIT_FOR_TX_ACK BIT(3)979#define PS_BEACON_SYNC BIT(4)980#define PS_WAIT_FOR_ANI BIT(5)981 982#define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */983 984struct ath_softc {985 struct ieee80211_hw *hw;986 struct device *dev;987 988 struct survey_info *cur_survey;989 struct survey_info survey[ATH9K_NUM_CHANNELS];990 991 spinlock_t intr_lock;992 struct tasklet_struct intr_tq;993 struct tasklet_struct bcon_tasklet;994 struct ath_hw *sc_ah;995 void __iomem *mem;996 int irq;997 spinlock_t sc_serial_rw;998 spinlock_t sc_pm_lock;999 spinlock_t sc_pcu_lock;1000 struct mutex mutex;1001 struct work_struct paprd_work;1002 struct work_struct hw_reset_work;1003 struct completion paprd_complete;1004 wait_queue_head_t tx_wait;1005 1006#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT1007 struct work_struct chanctx_work;1008 struct ath_gen_timer *p2p_ps_timer;1009 struct ath_vif *p2p_ps_vif;1010 struct ath_chanctx_sched sched;1011 struct ath_offchannel offchannel;1012 struct ath_chanctx *next_chan;1013 struct completion go_beacon;1014 struct timespec64 last_event_time;1015#endif1016 1017 unsigned long driver_data;1018 1019 u8 gtt_cnt;1020 u32 intrstatus;1021 u16 ps_flags; /* PS_* */1022 bool ps_enabled;1023 bool ps_idle;1024 short nbcnvifs;1025 unsigned long ps_usecount;1026 1027 struct ath_rx rx;1028 struct ath_tx tx;1029 struct ath_beacon beacon;1030 1031 struct cfg80211_chan_def cur_chandef;1032 struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX];1033 struct ath_chanctx *cur_chan;1034 spinlock_t chan_lock;1035 1036#ifdef CONFIG_MAC80211_LEDS1037 bool led_registered;1038 char led_name[32];1039 struct led_classdev led_cdev;1040#endif1041 1042#ifdef CONFIG_ATH9K_DEBUGFS1043 struct ath9k_debug debug;1044#endif1045 struct delayed_work hw_check_work;1046 struct delayed_work hw_pll_work;1047 struct timer_list sleep_timer;1048 1049#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT1050 struct ath_btcoex btcoex;1051 struct ath_mci_coex mci_coex;1052 struct work_struct mci_work;1053#endif1054 1055 struct ath_descdma txsdma;1056 1057 struct ath_ant_comb ant_comb;1058 u8 ant_tx, ant_rx;1059 struct dfs_pattern_detector *dfs_detector;1060 u64 dfs_prev_pulse_ts;1061 u32 wow_enabled;1062 1063 struct ath_spec_scan_priv spec_priv;1064 1065 struct ieee80211_vif *tx99_vif;1066 struct sk_buff *tx99_skb;1067 bool tx99_state;1068 s16 tx99_power;1069 1070#ifdef CONFIG_ATH9K_WOW1071 u32 wow_intr_before_sleep;1072 bool force_wow;1073#endif1074 1075#ifdef CONFIG_ATH9K_HWRNG1076 struct hwrng rng_ops;1077 u32 rng_last;1078 char rng_name[sizeof("ath9k_65535")];1079#endif1080};1081 1082/********/1083/* TX99 */1084/********/1085 1086#ifdef CONFIG_ATH9K_TX991087void ath9k_tx99_init_debug(struct ath_softc *sc);1088int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,1089 struct ath_tx_control *txctl);1090#else1091static inline void ath9k_tx99_init_debug(struct ath_softc *sc)1092{1093}1094static inline int ath9k_tx99_send(struct ath_softc *sc,1095 struct sk_buff *skb,1096 struct ath_tx_control *txctl)1097{1098 return 0;1099}1100#endif /* CONFIG_ATH9K_TX99 */1101 1102/***************************/1103/* Random Number Generator */1104/***************************/1105#ifdef CONFIG_ATH9K_HWRNG1106void ath9k_rng_start(struct ath_softc *sc);1107void ath9k_rng_stop(struct ath_softc *sc);1108#else1109static inline void ath9k_rng_start(struct ath_softc *sc)1110{1111}1112 1113static inline void ath9k_rng_stop(struct ath_softc *sc)1114{1115}1116#endif1117 1118static inline void ath_read_cachesize(struct ath_common *common, int *csz)1119{1120 common->bus_ops->read_cachesize(common, csz);1121}1122 1123void ath9k_tasklet(struct tasklet_struct *t);1124int ath_cabq_update(struct ath_softc *);1125u8 ath9k_parse_mpdudensity(u8 mpdudensity);1126irqreturn_t ath_isr(int irq, void *dev);1127int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan);1128void ath_cancel_work(struct ath_softc *sc);1129void ath_restart_work(struct ath_softc *sc);1130int ath9k_init_device(u16 devid, struct ath_softc *sc,1131 const struct ath_bus_ops *bus_ops);1132void ath9k_deinit_device(struct ath_softc *sc);1133u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);1134void ath_start_rfkill_poll(struct ath_softc *sc);1135void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);1136void ath9k_ps_wakeup(struct ath_softc *sc);1137void ath9k_ps_restore(struct ath_softc *sc);1138 1139#ifdef CONFIG_ATH9K_PCI1140int ath_pci_init(void);1141void ath_pci_exit(void);1142#else1143static inline int ath_pci_init(void) { return 0; };1144static inline void ath_pci_exit(void) {};1145#endif1146 1147#ifdef CONFIG_ATH9K_AHB1148int ath_ahb_init(void);1149void ath_ahb_exit(void);1150#else1151static inline int ath_ahb_init(void) { return 0; };1152static inline void ath_ahb_exit(void) {};1153#endif1154 1155#endif /* ATH9K_H */1156