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1/*2 * Atheros CARL9170 driver3 *4 * Basic HW register/memory/command access functions5 *6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>7 * Copyright 2010, Christian Lamparter <chunkeey@googlemail.com>8 *9 * This program is free software; you can redistribute it and/or modify10 * it under the terms of the GNU General Public License as published by11 * the Free Software Foundation; either version 2 of the License, or12 * (at your option) any later version.13 *14 * This program is distributed in the hope that it will be useful,15 * but WITHOUT ANY WARRANTY; without even the implied warranty of16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the17 * GNU General Public License for more details.18 *19 * You should have received a copy of the GNU General Public License20 * along with this program; see the file COPYING. If not, see21 * http://www.gnu.org/licenses/.22 *23 * This file incorporates work covered by the following copyright and24 * permission notice:25 * Copyright (c) 2007-2008 Atheros Communications, Inc.26 *27 * Permission to use, copy, modify, and/or distribute this software for any28 * purpose with or without fee is hereby granted, provided that the above29 * copyright notice and this permission notice appear in all copies.30 *31 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES32 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF33 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR34 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES35 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN36 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF37 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.38 */39#ifndef __CMD_H40#define __CMD_H41 42#include "carl9170.h"43 44/* basic HW access */45int carl9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val);46int carl9170_read_reg(struct ar9170 *ar, const u32 reg, u32 *val);47int carl9170_read_mreg(struct ar9170 *ar, const int nregs,48 const u32 *regs, u32 *out);49int carl9170_echo_test(struct ar9170 *ar, u32 v);50int carl9170_reboot(struct ar9170 *ar);51int carl9170_mac_reset(struct ar9170 *ar);52int carl9170_powersave(struct ar9170 *ar, const bool power_on);53int carl9170_collect_tally(struct ar9170 *ar);54int carl9170_bcn_ctrl(struct ar9170 *ar, const unsigned int vif_id,55 const u32 mode, const u32 addr, const u32 len);56 57static inline int carl9170_flush_cab(struct ar9170 *ar,58 const unsigned int vif_id)59{60 return carl9170_bcn_ctrl(ar, vif_id, CARL9170_BCN_CTRL_DRAIN, 0, 0);61}62 63static inline int carl9170_rx_filter(struct ar9170 *ar,64 const unsigned int _rx_filter)65{66 __le32 rx_filter = cpu_to_le32(_rx_filter);67 68 return carl9170_exec_cmd(ar, CARL9170_CMD_RX_FILTER,69 sizeof(rx_filter), (u8 *)&rx_filter,70 0, NULL);71}72 73struct carl9170_cmd *carl9170_cmd_buf(struct ar9170 *ar,74 const enum carl9170_cmd_oids cmd, const unsigned int len);75 76/*77 * Macros to facilitate writing multiple registers in a single78 * write-combining USB command. Note that when the first group79 * fails the whole thing will fail without any others attempted,80 * but you won't know which write in the group failed.81 */82#define carl9170_regwrite_begin(ar) \83do { \84 int __nreg = 0, __err = 0; \85 struct ar9170 *__ar = ar;86 87#define carl9170_regwrite(r, v) do { \88 __ar->cmd_buf[2 * __nreg + 1] = cpu_to_le32(r); \89 __ar->cmd_buf[2 * __nreg + 2] = cpu_to_le32(v); \90 __nreg++; \91 if ((__nreg >= PAYLOAD_MAX / 2)) { \92 if (IS_ACCEPTING_CMD(__ar)) \93 __err = carl9170_exec_cmd(__ar, \94 CARL9170_CMD_WREG, 8 * __nreg, \95 (u8 *) &__ar->cmd_buf[1], 0, NULL); \96 else \97 goto __regwrite_out; \98 \99 __nreg = 0; \100 if (__err) \101 goto __regwrite_out; \102 } \103} while (0)104 105#define carl9170_regwrite_finish() \106__regwrite_out : \107 if (__err == 0 && __nreg) { \108 if (IS_ACCEPTING_CMD(__ar)) \109 __err = carl9170_exec_cmd(__ar, \110 CARL9170_CMD_WREG, 8 * __nreg, \111 (u8 *) &__ar->cmd_buf[1], 0, NULL); \112 __nreg = 0; \113 }114 115#define carl9170_regwrite_result() \116 __err; \117} while (0)118 119 120#define carl9170_async_regwrite_get_buf() \121do { \122 __nreg = 0; \123 __cmd = carl9170_cmd_buf(__carl, CARL9170_CMD_WREG_ASYNC, \124 CARL9170_MAX_CMD_PAYLOAD_LEN); \125 if (__cmd == NULL) { \126 __err = -ENOMEM; \127 goto __async_regwrite_out; \128 } \129} while (0)130 131#define carl9170_async_regwrite_begin(carl) \132do { \133 struct ar9170 *__carl = carl; \134 struct carl9170_cmd *__cmd; \135 unsigned int __nreg; \136 int __err = 0; \137 carl9170_async_regwrite_get_buf(); \138 139#define carl9170_async_regwrite_flush() \140do { \141 if (__cmd == NULL || __nreg == 0) \142 break; \143 \144 if (IS_ACCEPTING_CMD(__carl) && __nreg) { \145 __cmd->hdr.len = 8 * __nreg; \146 __err = __carl9170_exec_cmd(__carl, __cmd, true); \147 __cmd = NULL; \148 break; \149 } \150 goto __async_regwrite_out; \151} while (0)152 153#define carl9170_async_regwrite(r, v) do { \154 if (__cmd == NULL) \155 carl9170_async_regwrite_get_buf(); \156 __cmd->wreg.regs[__nreg].addr = cpu_to_le32(r); \157 __cmd->wreg.regs[__nreg].val = cpu_to_le32(v); \158 __nreg++; \159 if ((__nreg >= PAYLOAD_MAX / 2)) \160 carl9170_async_regwrite_flush(); \161} while (0)162 163#define carl9170_async_regwrite_finish() do { \164__async_regwrite_out: \165 if (__cmd != NULL && __err == 0) \166 carl9170_async_regwrite_flush(); \167 kfree(__cmd); \168} while (0) \169 170#define carl9170_async_regwrite_result() \171 __err; \172} while (0)173 174#endif /* __CMD_H */175