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1/*2 * Copyright (c) 2010 Broadcom Corporation3 *4 * Permission to use, copy, modify, and/or distribute this software for any5 * purpose with or without fee is hereby granted, provided that the above6 * copyright notice and this permission notice appear in all copies.7 *8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.15 */16#include <net/mac80211.h>17 18#include "rate.h"19#include "scb.h"20#include "phy/phy_hal.h"21#include "antsel.h"22#include "main.h"23#include "ampdu.h"24#include "debug.h"25#include "brcms_trace_events.h"26 27/* max number of mpdus in an ampdu */28#define AMPDU_MAX_MPDU 3229/* max number of mpdus in an ampdu to a legacy */30#define AMPDU_NUM_MPDU_LEGACY 1631/* max Tx ba window size (in pdu) */32#define AMPDU_TX_BA_MAX_WSIZE 6433/* default Tx ba window size (in pdu) */34#define AMPDU_TX_BA_DEF_WSIZE 6435/* default Rx ba window size (in pdu) */36#define AMPDU_RX_BA_DEF_WSIZE 6437/* max Rx ba window size (in pdu) */38#define AMPDU_RX_BA_MAX_WSIZE 6439/* max dur of tx ampdu (in msec) */40#define AMPDU_MAX_DUR 541/* default tx retry limit */42#define AMPDU_DEF_RETRY_LIMIT 543/* default tx retry limit at reg rate */44#define AMPDU_DEF_RR_RETRY_LIMIT 245/* default ffpld reserved bytes */46#define AMPDU_DEF_FFPLD_RSVD 204847/* # of inis to be freed on detach */48#define AMPDU_INI_FREE 1049/* max # of mpdus released at a time */50#define AMPDU_SCB_MAX_RELEASE 2051 52#define NUM_FFPLD_FIFO 4 /* number of fifo concerned by pre-loading */53#define FFPLD_TX_MAX_UNFL 200 /* default value of the average number of ampdu54 * without underflows55 */56#define FFPLD_MPDU_SIZE 1800 /* estimate of maximum mpdu size */57#define FFPLD_MAX_MCS 23 /* we don't deal with mcs 32 */58#define FFPLD_PLD_INCR 1000 /* increments in bytes */59#define FFPLD_MAX_AMPDU_CNT 5000 /* maximum number of ampdu we60 * accumulate between resets.61 */62 63#define AMPDU_DELIMITER_LEN 464 65/* max allowed number of mpdus in an ampdu (2 streams) */66#define AMPDU_NUM_MPDU 1667 68#define TX_SEQ_TO_INDEX(seq) ((seq) % AMPDU_TX_BA_MAX_WSIZE)69 70/* max possible overhead per mpdu in the ampdu; 3 is for roundup if needed */71#define AMPDU_MAX_MPDU_OVERHEAD (FCS_LEN + DOT11_ICV_AES_LEN +\72 AMPDU_DELIMITER_LEN + 3\73 + DOT11_A4_HDR_LEN + DOT11_QOS_LEN + DOT11_IV_MAX_LEN)74 75/* modulo add/sub, bound = 2^k */76#define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1))77#define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1))78 79/* structure to hold tx fifo information and pre-loading state80 * counters specific to tx underflows of ampdus81 * some counters might be redundant with the ones in wlc or ampdu structures.82 * This allows to maintain a specific state independently of83 * how often and/or when the wlc counters are updated.84 *85 * ampdu_pld_size: number of bytes to be pre-loaded86 * mcs2ampdu_table: per-mcs max # of mpdus in an ampdu87 * prev_txfunfl: num of underflows last read from the HW macstats counter88 * accum_txfunfl: num of underflows since we modified pld params89 * accum_txampdu: num of tx ampdu since we modified pld params90 * prev_txampdu: previous reading of tx ampdu91 * dmaxferrate: estimated dma avg xfer rate in kbits/sec92 */93struct brcms_fifo_info {94 u16 ampdu_pld_size;95 u8 mcs2ampdu_table[FFPLD_MAX_MCS + 1];96 u16 prev_txfunfl;97 u32 accum_txfunfl;98 u32 accum_txampdu;99 u32 prev_txampdu;100 u32 dmaxferrate;101};102 103/* AMPDU module specific state104 *105 * wlc: pointer to main wlc structure106 * scb_handle: scb cubby handle to retrieve data from scb107 * ini_enable: per-tid initiator enable/disable of ampdu108 * ba_tx_wsize: Tx ba window size (in pdu)109 * ba_rx_wsize: Rx ba window size (in pdu)110 * retry_limit: mpdu transmit retry limit111 * rr_retry_limit: mpdu transmit retry limit at regular rate112 * retry_limit_tid: per-tid mpdu transmit retry limit113 * rr_retry_limit_tid: per-tid mpdu transmit retry limit at regular rate114 * mpdu_density: min mpdu spacing (0-7) ==> 2^(x-1)/8 usec115 * max_pdu: max pdus allowed in ampdu116 * dur: max duration of an ampdu (in msec)117 * rx_factor: maximum rx ampdu factor (0-3) ==> 2^(13+x) bytes118 * ffpld_rsvd: number of bytes to reserve for preload119 * max_txlen: max size of ampdu per mcs, bw and sgi120 * mfbr: enable multiple fallback rate121 * tx_max_funl: underflows should be kept such that122 * (tx_max_funfl*underflows) < tx frames123 * fifo_tb: table of fifo infos124 */125struct ampdu_info {126 struct brcms_c_info *wlc;127 int scb_handle;128 u8 ini_enable[AMPDU_MAX_SCB_TID];129 u8 ba_tx_wsize;130 u8 ba_rx_wsize;131 u8 retry_limit;132 u8 rr_retry_limit;133 u8 retry_limit_tid[AMPDU_MAX_SCB_TID];134 u8 rr_retry_limit_tid[AMPDU_MAX_SCB_TID];135 u8 mpdu_density;136 s8 max_pdu;137 u8 dur;138 u8 rx_factor;139 u32 ffpld_rsvd;140 u32 max_txlen[MCS_TABLE_SIZE][2][2];141 bool mfbr;142 u32 tx_max_funl;143 struct brcms_fifo_info fifo_tb[NUM_FFPLD_FIFO];144};145 146static void brcms_c_scb_ampdu_update_max_txlen(struct ampdu_info *ampdu, u8 dur)147{148 u32 rate, mcs;149 150 for (mcs = 0; mcs < MCS_TABLE_SIZE; mcs++) {151 /* rate is in Kbps; dur is in msec ==> len = (rate * dur) / 8 */152 /* 20MHz, No SGI */153 rate = mcs_2_rate(mcs, false, false);154 ampdu->max_txlen[mcs][0][0] = (rate * dur) >> 3;155 /* 40 MHz, No SGI */156 rate = mcs_2_rate(mcs, true, false);157 ampdu->max_txlen[mcs][1][0] = (rate * dur) >> 3;158 /* 20MHz, SGI */159 rate = mcs_2_rate(mcs, false, true);160 ampdu->max_txlen[mcs][0][1] = (rate * dur) >> 3;161 /* 40 MHz, SGI */162 rate = mcs_2_rate(mcs, true, true);163 ampdu->max_txlen[mcs][1][1] = (rate * dur) >> 3;164 }165}166 167static bool brcms_c_ampdu_cap(struct ampdu_info *ampdu)168{169 if (BRCMS_PHY_11N_CAP(ampdu->wlc->band))170 return true;171 else172 return false;173}174 175static int brcms_c_ampdu_set(struct ampdu_info *ampdu, bool on)176{177 struct brcms_c_info *wlc = ampdu->wlc;178 struct bcma_device *core = wlc->hw->d11core;179 180 wlc->pub->_ampdu = false;181 182 if (on) {183 if (!(wlc->pub->_n_enab & SUPPORT_11N)) {184 brcms_err(core, "wl%d: driver not nmode enabled\n",185 wlc->pub->unit);186 return -ENOTSUPP;187 }188 if (!brcms_c_ampdu_cap(ampdu)) {189 brcms_err(core, "wl%d: device not ampdu capable\n",190 wlc->pub->unit);191 return -ENOTSUPP;192 }193 wlc->pub->_ampdu = on;194 }195 196 return 0;197}198 199static void brcms_c_ffpld_init(struct ampdu_info *ampdu)200{201 int i, j;202 struct brcms_fifo_info *fifo;203 204 for (j = 0; j < NUM_FFPLD_FIFO; j++) {205 fifo = (ampdu->fifo_tb + j);206 fifo->ampdu_pld_size = 0;207 for (i = 0; i <= FFPLD_MAX_MCS; i++)208 fifo->mcs2ampdu_table[i] = 255;209 fifo->dmaxferrate = 0;210 fifo->accum_txampdu = 0;211 fifo->prev_txfunfl = 0;212 fifo->accum_txfunfl = 0;213 214 }215}216 217struct ampdu_info *brcms_c_ampdu_attach(struct brcms_c_info *wlc)218{219 struct ampdu_info *ampdu;220 int i;221 222 ampdu = kzalloc(sizeof(*ampdu), GFP_ATOMIC);223 if (!ampdu)224 return NULL;225 226 ampdu->wlc = wlc;227 228 for (i = 0; i < AMPDU_MAX_SCB_TID; i++)229 ampdu->ini_enable[i] = true;230 /* Disable ampdu for VO by default */231 ampdu->ini_enable[PRIO_8021D_VO] = false;232 ampdu->ini_enable[PRIO_8021D_NC] = false;233 234 /* Disable ampdu for BK by default since not enough fifo space */235 ampdu->ini_enable[PRIO_8021D_NONE] = false;236 ampdu->ini_enable[PRIO_8021D_BK] = false;237 238 ampdu->ba_tx_wsize = AMPDU_TX_BA_DEF_WSIZE;239 ampdu->ba_rx_wsize = AMPDU_RX_BA_DEF_WSIZE;240 ampdu->mpdu_density = AMPDU_DEF_MPDU_DENSITY;241 ampdu->max_pdu = AUTO;242 ampdu->dur = AMPDU_MAX_DUR;243 244 ampdu->ffpld_rsvd = AMPDU_DEF_FFPLD_RSVD;245 /*246 * bump max ampdu rcv size to 64k for all 11n247 * devices except 4321A0 and 4321A1248 */249 if (BRCMS_ISNPHY(wlc->band) && NREV_LT(wlc->band->phyrev, 2))250 ampdu->rx_factor = IEEE80211_HT_MAX_AMPDU_32K;251 else252 ampdu->rx_factor = IEEE80211_HT_MAX_AMPDU_64K;253 ampdu->retry_limit = AMPDU_DEF_RETRY_LIMIT;254 ampdu->rr_retry_limit = AMPDU_DEF_RR_RETRY_LIMIT;255 256 for (i = 0; i < AMPDU_MAX_SCB_TID; i++) {257 ampdu->retry_limit_tid[i] = ampdu->retry_limit;258 ampdu->rr_retry_limit_tid[i] = ampdu->rr_retry_limit;259 }260 261 brcms_c_scb_ampdu_update_max_txlen(ampdu, ampdu->dur);262 ampdu->mfbr = false;263 /* try to set ampdu to the default value */264 brcms_c_ampdu_set(ampdu, wlc->pub->_ampdu);265 266 ampdu->tx_max_funl = FFPLD_TX_MAX_UNFL;267 brcms_c_ffpld_init(ampdu);268 269 return ampdu;270}271 272void brcms_c_ampdu_detach(struct ampdu_info *ampdu)273{274 kfree(ampdu);275}276 277static void brcms_c_scb_ampdu_update_config(struct ampdu_info *ampdu,278 struct scb *scb)279{280 struct scb_ampdu *scb_ampdu = &scb->scb_ampdu;281 int i;282 283 scb_ampdu->max_pdu = AMPDU_NUM_MPDU;284 285 /* go back to legacy size if some preloading is occurring */286 for (i = 0; i < NUM_FFPLD_FIFO; i++) {287 if (ampdu->fifo_tb[i].ampdu_pld_size > FFPLD_PLD_INCR)288 scb_ampdu->max_pdu = AMPDU_NUM_MPDU_LEGACY;289 }290 291 /* apply user override */292 if (ampdu->max_pdu != AUTO)293 scb_ampdu->max_pdu = (u8) ampdu->max_pdu;294 295 scb_ampdu->release = min_t(u8, scb_ampdu->max_pdu,296 AMPDU_SCB_MAX_RELEASE);297 298 if (scb_ampdu->max_rx_ampdu_bytes)299 scb_ampdu->release = min_t(u8, scb_ampdu->release,300 scb_ampdu->max_rx_ampdu_bytes / 1600);301 302 scb_ampdu->release = min(scb_ampdu->release,303 ampdu->fifo_tb[TX_AC_BE_FIFO].304 mcs2ampdu_table[FFPLD_MAX_MCS]);305}306 307static void brcms_c_scb_ampdu_update_config_all(struct ampdu_info *ampdu)308{309 brcms_c_scb_ampdu_update_config(ampdu, &du->wlc->pri_scb);310}311 312static void brcms_c_ffpld_calc_mcs2ampdu_table(struct ampdu_info *ampdu, int f)313{314 int i;315 u32 phy_rate, dma_rate, tmp;316 u8 max_mpdu;317 struct brcms_fifo_info *fifo = (ampdu->fifo_tb + f);318 319 /* recompute the dma rate */320 /* note : we divide/multiply by 100 to avoid integer overflows */321 max_mpdu = min_t(u8, fifo->mcs2ampdu_table[FFPLD_MAX_MCS],322 AMPDU_NUM_MPDU_LEGACY);323 phy_rate = mcs_2_rate(FFPLD_MAX_MCS, true, false);324 dma_rate =325 (((phy_rate / 100) *326 (max_mpdu * FFPLD_MPDU_SIZE - fifo->ampdu_pld_size))327 / (max_mpdu * FFPLD_MPDU_SIZE)) * 100;328 fifo->dmaxferrate = dma_rate;329 330 /* fill up the mcs2ampdu table; do not recalc the last mcs */331 dma_rate = dma_rate >> 7;332 for (i = 0; i < FFPLD_MAX_MCS; i++) {333 /* shifting to keep it within integer range */334 phy_rate = mcs_2_rate(i, true, false) >> 7;335 if (phy_rate > dma_rate) {336 tmp = ((fifo->ampdu_pld_size * phy_rate) /337 ((phy_rate - dma_rate) * FFPLD_MPDU_SIZE)) + 1;338 tmp = min_t(u32, tmp, 255);339 fifo->mcs2ampdu_table[i] = (u8) tmp;340 }341 }342}343 344/* evaluate the dma transfer rate using the tx underflows as feedback.345 * If necessary, increase tx fifo preloading. If not enough,346 * decrease maximum ampdu size for each mcs till underflows stop347 * Return 1 if pre-loading not active, -1 if not an underflow event,348 * 0 if pre-loading module took care of the event.349 */350static int brcms_c_ffpld_check_txfunfl(struct brcms_c_info *wlc, int fid)351{352 struct ampdu_info *ampdu = wlc->ampdu;353 u32 phy_rate = mcs_2_rate(FFPLD_MAX_MCS, true, false);354 u8 max_mpdu;355 u16 max_pld_size;356 u32 new_txunfl;357 struct brcms_fifo_info *fifo = (ampdu->fifo_tb + fid);358 uint xmtfifo_sz;359 u16 cur_txunfl;360 361 /* return if we got here for a different reason than underflows */362 cur_txunfl = brcms_b_read_shm(wlc->hw,363 M_UCODE_MACSTAT +364 offsetof(struct macstat, txfunfl[fid]));365 new_txunfl = (u16) (cur_txunfl - fifo->prev_txfunfl);366 if (new_txunfl == 0) {367 brcms_dbg_ht(wlc->hw->d11core,368 "TX status FRAG set but no tx underflows\n");369 return -1;370 }371 fifo->prev_txfunfl = cur_txunfl;372 373 if (!ampdu->tx_max_funl)374 return 1;375 376 /* check if fifo is big enough */377 if (brcms_b_xmtfifo_sz_get(wlc->hw, fid, &xmtfifo_sz))378 return -1;379 380 if ((TXFIFO_SIZE_UNIT * (u32) xmtfifo_sz) <= ampdu->ffpld_rsvd)381 return 1;382 383 max_pld_size = TXFIFO_SIZE_UNIT * xmtfifo_sz - ampdu->ffpld_rsvd;384 fifo->accum_txfunfl += new_txunfl;385 386 /* we need to wait for at least 10 underflows */387 if (fifo->accum_txfunfl < 10)388 return 0;389 390 brcms_dbg_ht(wlc->hw->d11core, "tx_underflows %d\n", fifo->accum_txfunfl);391 392 max_mpdu = min_t(u8, fifo->mcs2ampdu_table[FFPLD_MAX_MCS],393 AMPDU_NUM_MPDU_LEGACY);394 395 /* In case max value max_pdu is already lower than396 the fifo depth, there is nothing more we can do.397 */398 399 if (fifo->ampdu_pld_size >= max_mpdu * FFPLD_MPDU_SIZE) {400 fifo->accum_txfunfl = 0;401 return 0;402 }403 404 if (fifo->ampdu_pld_size < max_pld_size) {405 406 /* increment by TX_FIFO_PLD_INC bytes */407 fifo->ampdu_pld_size += FFPLD_PLD_INCR;408 if (fifo->ampdu_pld_size > max_pld_size)409 fifo->ampdu_pld_size = max_pld_size;410 411 /* update scb release size */412 brcms_c_scb_ampdu_update_config_all(ampdu);413 414 /*415 * compute a new dma xfer rate for max_mpdu @ max mcs.416 * This is the minimum dma rate that can achieve no417 * underflow condition for the current mpdu size.418 *419 * note : we divide/multiply by 100 to avoid integer overflows420 */421 fifo->dmaxferrate =422 (((phy_rate / 100) *423 (max_mpdu * FFPLD_MPDU_SIZE - fifo->ampdu_pld_size))424 / (max_mpdu * FFPLD_MPDU_SIZE)) * 100;425 426 brcms_dbg_ht(wlc->hw->d11core,427 "DMA estimated transfer rate %d; "428 "pre-load size %d\n",429 fifo->dmaxferrate, fifo->ampdu_pld_size);430 } else {431 432 /* decrease ampdu size */433 if (fifo->mcs2ampdu_table[FFPLD_MAX_MCS] > 1) {434 if (fifo->mcs2ampdu_table[FFPLD_MAX_MCS] == 255)435 fifo->mcs2ampdu_table[FFPLD_MAX_MCS] =436 AMPDU_NUM_MPDU_LEGACY - 1;437 else438 fifo->mcs2ampdu_table[FFPLD_MAX_MCS] -= 1;439 440 /* recompute the table */441 brcms_c_ffpld_calc_mcs2ampdu_table(ampdu, fid);442 443 /* update scb release size */444 brcms_c_scb_ampdu_update_config_all(ampdu);445 }446 }447 fifo->accum_txfunfl = 0;448 return 0;449}450 451void452brcms_c_ampdu_tx_operational(struct brcms_c_info *wlc, u8 tid,453 uint max_rx_ampdu_bytes) /* from ht_cap in beacon */454{455 struct scb_ampdu *scb_ampdu;456 struct ampdu_info *ampdu = wlc->ampdu;457 struct scb *scb = &wlc->pri_scb;458 scb_ampdu = &scb->scb_ampdu;459 460 if (!ampdu->ini_enable[tid]) {461 brcms_err(wlc->hw->d11core, "%s: Rejecting tid %d\n",462 __func__, tid);463 return;464 }465 466 scb_ampdu->max_rx_ampdu_bytes = max_rx_ampdu_bytes;467}468 469void brcms_c_ampdu_reset_session(struct brcms_ampdu_session *session,470 struct brcms_c_info *wlc)471{472 session->wlc = wlc;473 skb_queue_head_init(&session->skb_list);474 session->max_ampdu_len = 0; /* determined from first MPDU */475 session->max_ampdu_frames = 0; /* determined from first MPDU */476 session->ampdu_len = 0;477 session->dma_len = 0;478}479 480/*481 * Preps the given packet for AMPDU based on the session data. If the482 * frame cannot be accomodated in the current session, -ENOSPC is483 * returned.484 */485int brcms_c_ampdu_add_frame(struct brcms_ampdu_session *session,486 struct sk_buff *p)487{488 struct brcms_c_info *wlc = session->wlc;489 struct ampdu_info *ampdu = wlc->ampdu;490 struct scb *scb = &wlc->pri_scb;491 struct scb_ampdu *scb_ampdu = &scb->scb_ampdu;492 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(p);493 struct ieee80211_tx_rate *txrate = tx_info->status.rates;494 struct d11txh *txh = (struct d11txh *)p->data;495 unsigned ampdu_frames;496 u8 ndelim, tid;497 u8 *plcp;498 uint len;499 u16 mcl;500 bool fbr_iscck;501 bool rr;502 503 ndelim = txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM];504 plcp = (u8 *)(txh + 1);505 fbr_iscck = !(le16_to_cpu(txh->XtraFrameTypes) & 0x03);506 len = fbr_iscck ? BRCMS_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) :507 BRCMS_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback);508 len = roundup(len, 4) + (ndelim + 1) * AMPDU_DELIMITER_LEN;509 510 ampdu_frames = skb_queue_len(&session->skb_list);511 if (ampdu_frames != 0) {512 struct sk_buff *first;513 514 if (ampdu_frames + 1 > session->max_ampdu_frames ||515 session->ampdu_len + len > session->max_ampdu_len)516 return -ENOSPC;517 518 /*519 * We aren't really out of space if the new frame is of520 * a different priority, but we want the same behaviour521 * so return -ENOSPC anyway.522 *523 * XXX: The old AMPDU code did this, but is it really524 * necessary?525 */526 first = skb_peek(&session->skb_list);527 if (p->priority != first->priority)528 return -ENOSPC;529 }530 531 /*532 * Now that we're sure this frame can be accomodated, update the533 * session information.534 */535 session->ampdu_len += len;536 session->dma_len += p->len;537 538 tid = (u8)p->priority;539 540 /* Handle retry limits */541 if (txrate[0].count <= ampdu->rr_retry_limit_tid[tid]) {542 txrate[0].count++;543 rr = true;544 } else {545 txrate[1].count++;546 rr = false;547 }548 549 if (ampdu_frames == 0) {550 u8 plcp0, plcp3, is40, sgi, mcs;551 uint fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;552 struct brcms_fifo_info *f = &du->fifo_tb[fifo];553 554 if (rr) {555 plcp0 = plcp[0];556 plcp3 = plcp[3];557 } else {558 plcp0 = txh->FragPLCPFallback[0];559 plcp3 = txh->FragPLCPFallback[3];560 561 }562 563 /* Limit AMPDU size based on MCS */564 is40 = (plcp0 & MIMO_PLCP_40MHZ) ? 1 : 0;565 sgi = plcp3_issgi(plcp3) ? 1 : 0;566 mcs = plcp0 & ~MIMO_PLCP_40MHZ;567 session->max_ampdu_len = min(scb_ampdu->max_rx_ampdu_bytes,568 ampdu->max_txlen[mcs][is40][sgi]);569 570 session->max_ampdu_frames = scb_ampdu->max_pdu;571 if (mcs_2_rate(mcs, true, false) >= f->dmaxferrate) {572 session->max_ampdu_frames =573 min_t(u16, f->mcs2ampdu_table[mcs],574 session->max_ampdu_frames);575 }576 }577 578 /*579 * Treat all frames as "middle" frames of AMPDU here. First and580 * last frames must be fixed up after all MPDUs have been prepped.581 */582 mcl = le16_to_cpu(txh->MacTxControlLow);583 mcl &= ~TXC_AMPDU_MASK;584 mcl |= (TXC_AMPDU_MIDDLE << TXC_AMPDU_SHIFT);585 mcl &= ~(TXC_STARTMSDU | TXC_SENDRTS | TXC_SENDCTS);586 txh->MacTxControlLow = cpu_to_le16(mcl);587 txh->PreloadSize = 0; /* always default to 0 */588 589 skb_queue_tail(&session->skb_list, p);590 591 return 0;592}593 594void brcms_c_ampdu_finalize(struct brcms_ampdu_session *session)595{596 struct brcms_c_info *wlc = session->wlc;597 struct ampdu_info *ampdu = wlc->ampdu;598 struct sk_buff *first, *last;599 struct d11txh *txh;600 struct ieee80211_tx_info *tx_info;601 struct ieee80211_tx_rate *txrate;602 u8 ndelim;603 u8 *plcp;604 uint len;605 uint fifo;606 struct brcms_fifo_info *f;607 u16 mcl;608 bool fbr;609 bool fbr_iscck;610 struct ieee80211_rts *rts;611 bool use_rts = false, use_cts = false;612 u16 dma_len = session->dma_len;613 u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;614 u32 rspec = 0, rspec_fallback = 0;615 u32 rts_rspec = 0, rts_rspec_fallback = 0;616 u8 plcp0, is40, mcs;617 u16 mch;618 u8 preamble_type = BRCMS_GF_PREAMBLE;619 u8 fbr_preamble_type = BRCMS_GF_PREAMBLE;620 u8 rts_preamble_type = BRCMS_LONG_PREAMBLE;621 u8 rts_fbr_preamble_type = BRCMS_LONG_PREAMBLE;622 623 if (skb_queue_empty(&session->skb_list))624 return;625 626 first = skb_peek(&session->skb_list);627 last = skb_peek_tail(&session->skb_list);628 629 /* Need to fix up last MPDU first to adjust AMPDU length */630 txh = (struct d11txh *)last->data;631 fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;632 f = &du->fifo_tb[fifo];633 634 mcl = le16_to_cpu(txh->MacTxControlLow);635 mcl &= ~TXC_AMPDU_MASK;636 mcl |= (TXC_AMPDU_LAST << TXC_AMPDU_SHIFT);637 txh->MacTxControlLow = cpu_to_le16(mcl);638 639 /* remove the null delimiter after last mpdu */640 ndelim = txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM];641 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] = 0;642 session->ampdu_len -= ndelim * AMPDU_DELIMITER_LEN;643 644 /* remove the pad len from last mpdu */645 fbr_iscck = ((le16_to_cpu(txh->XtraFrameTypes) & 0x3) == 0);646 len = fbr_iscck ? BRCMS_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) :647 BRCMS_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback);648 session->ampdu_len -= roundup(len, 4) - len;649 650 /* Now fix up the first MPDU */651 tx_info = IEEE80211_SKB_CB(first);652 txrate = tx_info->status.rates;653 txh = (struct d11txh *)first->data;654 plcp = (u8 *)(txh + 1);655 rts = (struct ieee80211_rts *)&txh->rts_frame;656 657 mcl = le16_to_cpu(txh->MacTxControlLow);658 /* If only one MPDU leave it marked as last */659 if (first != last) {660 mcl &= ~TXC_AMPDU_MASK;661 mcl |= (TXC_AMPDU_FIRST << TXC_AMPDU_SHIFT);662 }663 mcl |= TXC_STARTMSDU;664 if (ieee80211_is_rts(rts->frame_control)) {665 mcl |= TXC_SENDRTS;666 use_rts = true;667 }668 if (ieee80211_is_cts(rts->frame_control)) {669 mcl |= TXC_SENDCTS;670 use_cts = true;671 }672 txh->MacTxControlLow = cpu_to_le16(mcl);673 674 fbr = txrate[1].count > 0;675 if (!fbr)676 plcp0 = plcp[0];677 else678 plcp0 = txh->FragPLCPFallback[0];679 680 is40 = (plcp0 & MIMO_PLCP_40MHZ) ? 1 : 0;681 mcs = plcp0 & ~MIMO_PLCP_40MHZ;682 683 if (is40) {684 if (CHSPEC_SB_UPPER(wlc_phy_chanspec_get(wlc->band->pi)))685 mimo_ctlchbw = PHY_TXC1_BW_20MHZ_UP;686 else687 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;688 }689 690 /* rebuild the rspec and rspec_fallback */691 rspec = RSPEC_MIMORATE;692 rspec |= plcp[0] & ~MIMO_PLCP_40MHZ;693 if (plcp[0] & MIMO_PLCP_40MHZ)694 rspec |= (PHY_TXC1_BW_40MHZ << RSPEC_BW_SHIFT);695 696 fbr_iscck = !(le16_to_cpu(txh->XtraFrameTypes) & 0x03);697 if (fbr_iscck) {698 rspec_fallback =699 cck_rspec(cck_phy2mac_rate(txh->FragPLCPFallback[0]));700 } else {701 rspec_fallback = RSPEC_MIMORATE;702 rspec_fallback |= txh->FragPLCPFallback[0] & ~MIMO_PLCP_40MHZ;703 if (txh->FragPLCPFallback[0] & MIMO_PLCP_40MHZ)704 rspec_fallback |= PHY_TXC1_BW_40MHZ << RSPEC_BW_SHIFT;705 }706 707 if (use_rts || use_cts) {708 rts_rspec =709 brcms_c_rspec_to_rts_rspec(wlc, rspec,710 false, mimo_ctlchbw);711 rts_rspec_fallback =712 brcms_c_rspec_to_rts_rspec(wlc, rspec_fallback,713 false, mimo_ctlchbw);714 }715 716 BRCMS_SET_MIMO_PLCP_LEN(plcp, session->ampdu_len);717 /* mark plcp to indicate ampdu */718 BRCMS_SET_MIMO_PLCP_AMPDU(plcp);719 720 /* reset the mixed mode header durations */721 if (txh->MModeLen) {722 u16 mmodelen = brcms_c_calc_lsig_len(wlc, rspec,723 session->ampdu_len);724 txh->MModeLen = cpu_to_le16(mmodelen);725 preamble_type = BRCMS_MM_PREAMBLE;726 }727 if (txh->MModeFbrLen) {728 u16 mmfbrlen = brcms_c_calc_lsig_len(wlc, rspec_fallback,729 session->ampdu_len);730 txh->MModeFbrLen = cpu_to_le16(mmfbrlen);731 fbr_preamble_type = BRCMS_MM_PREAMBLE;732 }733 734 /* set the preload length */735 if (mcs_2_rate(mcs, true, false) >= f->dmaxferrate) {736 dma_len = min(dma_len, f->ampdu_pld_size);737 txh->PreloadSize = cpu_to_le16(dma_len);738 } else {739 txh->PreloadSize = 0;740 }741 742 mch = le16_to_cpu(txh->MacTxControlHigh);743 744 /* update RTS dur fields */745 if (use_rts || use_cts) {746 u16 durid;747 if ((mch & TXC_PREAMBLE_RTS_MAIN_SHORT) ==748 TXC_PREAMBLE_RTS_MAIN_SHORT)749 rts_preamble_type = BRCMS_SHORT_PREAMBLE;750 751 if ((mch & TXC_PREAMBLE_RTS_FB_SHORT) ==752 TXC_PREAMBLE_RTS_FB_SHORT)753 rts_fbr_preamble_type = BRCMS_SHORT_PREAMBLE;754 755 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec,756 rspec, rts_preamble_type,757 preamble_type,758 session->ampdu_len, true);759 rts->duration = cpu_to_le16(durid);760 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,761 rts_rspec_fallback,762 rspec_fallback,763 rts_fbr_preamble_type,764 fbr_preamble_type,765 session->ampdu_len, true);766 txh->RTSDurFallback = cpu_to_le16(durid);767 /* set TxFesTimeNormal */768 txh->TxFesTimeNormal = rts->duration;769 /* set fallback rate version of TxFesTimeNormal */770 txh->TxFesTimeFallback = txh->RTSDurFallback;771 }772 773 /* set flag and plcp for fallback rate */774 if (fbr) {775 mch |= TXC_AMPDU_FBR;776 txh->MacTxControlHigh = cpu_to_le16(mch);777 BRCMS_SET_MIMO_PLCP_AMPDU(plcp);778 BRCMS_SET_MIMO_PLCP_AMPDU(txh->FragPLCPFallback);779 }780 781 brcms_dbg_ht(wlc->hw->d11core, "wl%d: count %d ampdu_len %d\n",782 wlc->pub->unit, skb_queue_len(&session->skb_list),783 session->ampdu_len);784}785 786static void787brcms_c_ampdu_rate_status(struct brcms_c_info *wlc,788 struct ieee80211_tx_info *tx_info,789 struct tx_status *txs, u8 mcs)790{791 struct ieee80211_tx_rate *txrate = tx_info->status.rates;792 int i;793 794 /* clear the rest of the rates */795 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {796 txrate[i].idx = -1;797 txrate[i].count = 0;798 }799}800 801static void802brcms_c_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb,803 struct sk_buff *p, struct tx_status *txs,804 u32 s1, u32 s2)805{806 struct scb_ampdu *scb_ampdu;807 struct brcms_c_info *wlc = ampdu->wlc;808 struct scb_ampdu_tid_ini *ini;809 u8 bitmap[8], queue, tid;810 struct d11txh *txh;811 u8 *plcp;812 struct ieee80211_hdr *h;813 u16 seq, start_seq = 0, bindex, index, mcl;814 u8 mcs = 0;815 bool ba_recd = false, ack_recd = false;816 u8 tot_mpdu = 0;817 uint supr_status;818 bool retry = true;819 u16 mimoantsel = 0;820 u8 retry_limit;821 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(p);822 823#ifdef DEBUG824 u8 hole[AMPDU_MAX_MPDU];825 memset(hole, 0, sizeof(hole));826#endif827 828 scb_ampdu = &scb->scb_ampdu;829 tid = (u8) (p->priority);830 831 ini = &scb_ampdu->ini[tid];832 retry_limit = ampdu->retry_limit_tid[tid];833 memset(bitmap, 0, sizeof(bitmap));834 queue = txs->frameid & TXFID_QUEUE_MASK;835 supr_status = txs->status & TX_STATUS_SUPR_MASK;836 837 if (txs->status & TX_STATUS_ACK_RCV) {838 WARN_ON(!(txs->status & TX_STATUS_INTERMEDIATE));839 start_seq = txs->sequence >> SEQNUM_SHIFT;840 bitmap[0] = (txs->status & TX_STATUS_BA_BMAP03_MASK) >>841 TX_STATUS_BA_BMAP03_SHIFT;842 843 WARN_ON(s1 & TX_STATUS_INTERMEDIATE);844 WARN_ON(!(s1 & TX_STATUS_AMPDU));845 846 bitmap[0] |=847 (s1 & TX_STATUS_BA_BMAP47_MASK) <<848 TX_STATUS_BA_BMAP47_SHIFT;849 bitmap[1] = (s1 >> 8) & 0xff;850 bitmap[2] = (s1 >> 16) & 0xff;851 bitmap[3] = (s1 >> 24) & 0xff;852 853 bitmap[4] = s2 & 0xff;854 bitmap[5] = (s2 >> 8) & 0xff;855 bitmap[6] = (s2 >> 16) & 0xff;856 bitmap[7] = (s2 >> 24) & 0xff;857 858 ba_recd = true;859 } else {860 if (supr_status) {861 if (supr_status == TX_STATUS_SUPR_BADCH) {862 brcms_dbg_ht(wlc->hw->d11core,863 "%s: Pkt tx suppressed, illegal channel possibly %d\n",864 __func__, CHSPEC_CHANNEL(865 wlc->default_bss->chanspec));866 } else {867 if (supr_status != TX_STATUS_SUPR_FRAG)868 brcms_err(wlc->hw->d11core,869 "%s: supr_status 0x%x\n",870 __func__, supr_status);871 }872 /* no need to retry for badch; will fail again */873 if (supr_status == TX_STATUS_SUPR_BADCH ||874 supr_status == TX_STATUS_SUPR_EXPTIME) {875 retry = false;876 } else if (supr_status == TX_STATUS_SUPR_EXPTIME) {877 /* TX underflow:878 * try tuning pre-loading or ampdu size879 */880 } else if (supr_status == TX_STATUS_SUPR_FRAG) {881 /*882 * if there were underflows, but pre-loading883 * is not active, notify rate adaptation.884 */885 brcms_c_ffpld_check_txfunfl(wlc, queue);886 }887 } else if (txs->phyerr) {888 brcms_dbg_ht(wlc->hw->d11core,889 "%s: ampdu tx phy error (0x%x)\n",890 __func__, txs->phyerr);891 }892 }893 894 /* loop through all pkts and retry if not acked */895 while (p) {896 tx_info = IEEE80211_SKB_CB(p);897 txh = (struct d11txh *) p->data;898 mcl = le16_to_cpu(txh->MacTxControlLow);899 plcp = (u8 *) (txh + 1);900 h = (struct ieee80211_hdr *)(plcp + D11_PHY_HDR_LEN);901 seq = le16_to_cpu(h->seq_ctrl) >> SEQNUM_SHIFT;902 903 trace_brcms_txdesc(&wlc->hw->d11core->dev, txh, sizeof(*txh));904 905 if (tot_mpdu == 0) {906 mcs = plcp[0] & MIMO_PLCP_MCS_MASK;907 mimoantsel = le16_to_cpu(txh->ABI_MimoAntSel);908 }909 910 index = TX_SEQ_TO_INDEX(seq);911 ack_recd = false;912 if (ba_recd) {913 int block_acked;914 915 bindex = MODSUB_POW2(seq, start_seq, SEQNUM_MAX);916 if (bindex < AMPDU_TX_BA_MAX_WSIZE)917 block_acked = isset(bitmap, bindex);918 else919 block_acked = 0;920 brcms_dbg_ht(wlc->hw->d11core,921 "tid %d seq %d, start_seq %d, bindex %d set %d, index %d\n",922 tid, seq, start_seq, bindex,923 block_acked, index);924 /* if acked then clear bit and free packet */925 if (block_acked) {926 ini->txretry[index] = 0;927 928 /*929 * ampdu_ack_len:930 * number of acked aggregated frames931 */932 /* ampdu_len: number of aggregated frames */933 brcms_c_ampdu_rate_status(wlc, tx_info, txs,934 mcs);935 tx_info->flags |= IEEE80211_TX_STAT_ACK;936 tx_info->flags |= IEEE80211_TX_STAT_AMPDU;937 tx_info->status.ampdu_ack_len =938 tx_info->status.ampdu_len = 1;939 940 skb_pull(p, D11_PHY_HDR_LEN);941 skb_pull(p, D11_TXH_LEN);942 943 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw,944 p);945 ack_recd = true;946 }947 }948 /* either retransmit or send bar if ack not recd */949 if (!ack_recd) {950 if (retry && (ini->txretry[index] < (int)retry_limit)) {951 int ret;952 ini->txretry[index]++;953 ret = brcms_c_txfifo(wlc, queue, p);954 /*955 * We shouldn't be out of space in the DMA956 * ring here since we're reinserting a frame957 * that was just pulled out.958 */959 WARN_ONCE(ret, "queue %d out of txds\n", queue);960 } else {961 /* Retry timeout */962 ieee80211_tx_info_clear_status(tx_info);963 tx_info->status.ampdu_ack_len = 0;964 tx_info->status.ampdu_len = 1;965 tx_info->flags |=966 IEEE80211_TX_STAT_AMPDU_NO_BACK;967 skb_pull(p, D11_PHY_HDR_LEN);968 skb_pull(p, D11_TXH_LEN);969 brcms_dbg_ht(wlc->hw->d11core,970 "BA Timeout, seq %d\n",971 seq);972 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw,973 p);974 }975 }976 tot_mpdu++;977 978 /* break out if last packet of ampdu */979 if (((mcl & TXC_AMPDU_MASK) >> TXC_AMPDU_SHIFT) ==980 TXC_AMPDU_LAST)981 break;982 983 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);984 }985 986 /* update rate state */987 brcms_c_antsel_antsel2id(wlc->asi, mimoantsel);988}989 990void991brcms_c_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb,992 struct sk_buff *p, struct tx_status *txs)993{994 struct brcms_c_info *wlc = ampdu->wlc;995 u32 s1 = 0, s2 = 0;996 997 /* BMAC_NOTE: For the split driver, second level txstatus comes later998 * So if the ACK was received then wait for the second level else just999 * call the first one1000 */1001 if (txs->status & TX_STATUS_ACK_RCV) {1002 u8 status_delay = 0;1003 1004 /* wait till the next 8 bytes of txstatus is available */1005 s1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(frmtxstatus));1006 while ((s1 & TXS_V) == 0) {1007 udelay(1);1008 status_delay++;1009 if (status_delay > 10)1010 return; /* error condition */1011 s1 = bcma_read32(wlc->hw->d11core,1012 D11REGOFFS(frmtxstatus));1013 }1014 1015 s2 = bcma_read32(wlc->hw->d11core, D11REGOFFS(frmtxstatus2));1016 }1017 1018 if (scb) {1019 brcms_c_ampdu_dotxstatus_complete(ampdu, scb, p, txs, s1, s2);1020 } else {1021 /* loop through all pkts and free */1022 u8 queue = txs->frameid & TXFID_QUEUE_MASK;1023 struct d11txh *txh;1024 u16 mcl;1025 while (p) {1026 txh = (struct d11txh *) p->data;1027 trace_brcms_txdesc(&wlc->hw->d11core->dev, txh,1028 sizeof(*txh));1029 mcl = le16_to_cpu(txh->MacTxControlLow);1030 brcmu_pkt_buf_free_skb(p);1031 /* break out if last packet of ampdu */1032 if (((mcl & TXC_AMPDU_MASK) >> TXC_AMPDU_SHIFT) ==1033 TXC_AMPDU_LAST)1034 break;1035 p = dma_getnexttxp(wlc->hw->di[queue],1036 DMA_RANGE_TRANSMITTED);1037 }1038 }1039}1040 1041void brcms_c_ampdu_macaddr_upd(struct brcms_c_info *wlc)1042{1043 char template[T_RAM_ACCESS_SZ * 2];1044 1045 /* driver needs to write the ta in the template; ta is at offset 16 */1046 memset(template, 0, sizeof(template));1047 memcpy(template, wlc->pub->cur_etheraddr, ETH_ALEN);1048 brcms_b_write_template_ram(wlc->hw, (T_BA_TPL_BASE + 16),1049 (T_RAM_ACCESS_SZ * 2),1050 template);1051}1052 1053bool brcms_c_aggregatable(struct brcms_c_info *wlc, u8 tid)1054{1055 return wlc->ampdu->ini_enable[tid];1056}1057 1058void brcms_c_ampdu_shm_upd(struct ampdu_info *ampdu)1059{1060 struct brcms_c_info *wlc = ampdu->wlc;1061 1062 /*1063 * Extend ucode internal watchdog timer to1064 * match larger received frames1065 */1066 if ((ampdu->rx_factor & IEEE80211_HT_AMPDU_PARM_FACTOR) ==1067 IEEE80211_HT_MAX_AMPDU_64K) {1068 brcms_b_write_shm(wlc->hw, M_MIMO_MAXSYM, MIMO_MAXSYM_MAX);1069 brcms_b_write_shm(wlc->hw, M_WATCHDOG_8TU, WATCHDOG_8TU_MAX);1070 } else {1071 brcms_b_write_shm(wlc->hw, M_MIMO_MAXSYM, MIMO_MAXSYM_DEF);1072 brcms_b_write_shm(wlc->hw, M_WATCHDOG_8TU, WATCHDOG_8TU_DEF);1073 }1074}1075 1076/*1077 * callback function that helps invalidating ampdu packets in a DMA queue1078 */1079static void dma_cb_fn_ampdu(void *txi, void *arg_a)1080{1081 struct ieee80211_sta *sta = arg_a;1082 struct ieee80211_tx_info *tx_info = (struct ieee80211_tx_info *)txi;1083 1084 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) &&1085 (tx_info->rate_driver_data[0] == sta || sta == NULL))1086 tx_info->rate_driver_data[0] = NULL;1087}1088 1089/*1090 * When a remote party is no longer available for ampdu communication, any1091 * pending tx ampdu packets in the driver have to be flushed.1092 */1093void brcms_c_ampdu_flush(struct brcms_c_info *wlc,1094 struct ieee80211_sta *sta, u16 tid)1095{1096 brcms_c_inval_dma_pkts(wlc->hw, sta, dma_cb_fn_ampdu);1097}1098