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1// SPDX-License-Identifier: ISC2/*3 * Copyright (c) 2010 Broadcom Corporation4 */5 6#define NPHY_TBL_ID_GAIN1		07#define NPHY_TBL_ID_GAIN2		18#define NPHY_TBL_ID_GAINBITS1		29#define NPHY_TBL_ID_GAINBITS2		310#define NPHY_TBL_ID_GAINLIMIT		411#define NPHY_TBL_ID_WRSSIGainLimit	512#define NPHY_TBL_ID_RFSEQ		713#define NPHY_TBL_ID_AFECTRL		814#define NPHY_TBL_ID_ANTSWCTRLLUT	915#define NPHY_TBL_ID_IQLOCAL		1516#define NPHY_TBL_ID_NOISEVAR		1617#define NPHY_TBL_ID_SAMPLEPLAY		1718#define NPHY_TBL_ID_CORE1TXPWRCTL	2619#define NPHY_TBL_ID_CORE2TXPWRCTL	2720#define NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL	3021 22#define NPHY_TBL_ID_EPSILONTBL0   3123#define NPHY_TBL_ID_SCALARTBL0    3224#define NPHY_TBL_ID_EPSILONTBL1   3325#define NPHY_TBL_ID_SCALARTBL1    3426 27#define	NPHY_TO_BPHY_OFF	0xc0028 29#define NPHY_BandControl_currentBand			0x000130#define RFCC_CHIP0_PU			0x040031#define RFCC_POR_FORCE			0x004032#define RFCC_OE_POR_FORCE		0x008033#define NPHY_RfctrlIntc_override_OFF			034#define NPHY_RfctrlIntc_override_TRSW			135#define NPHY_RfctrlIntc_override_PA				236#define NPHY_RfctrlIntc_override_EXT_LNA_PU		337#define NPHY_RfctrlIntc_override_EXT_LNA_GAIN	438#define RIFS_ENABLE			0x8039#define BPHY_BAND_SEL_UP20		0x1040#define NPHY_MLenable			0x0241 42#define NPHY_RfseqMode_CoreActv_override 0x000143#define NPHY_RfseqMode_Trigger_override	0x000244#define NPHY_RfseqCoreActv_TxRxChain0	(0x11)45#define NPHY_RfseqCoreActv_TxRxChain1	(0x22)46 47#define NPHY_RfseqTrigger_rx2tx		0x000148#define NPHY_RfseqTrigger_tx2rx		0x000249#define NPHY_RfseqTrigger_updategainh	0x000450#define NPHY_RfseqTrigger_updategainl	0x000851#define NPHY_RfseqTrigger_updategainu	0x001052#define NPHY_RfseqTrigger_reset2rx	0x002053#define NPHY_RfseqStatus_rx2tx		0x000154#define NPHY_RfseqStatus_tx2rx		0x000255#define NPHY_RfseqStatus_updategainh	0x000456#define NPHY_RfseqStatus_updategainl	0x000857#define NPHY_RfseqStatus_updategainu	0x001058#define NPHY_RfseqStatus_reset2rx	0x002059#define NPHY_ClassifierCtrl_cck_en	0x160#define NPHY_ClassifierCtrl_ofdm_en	0x261#define NPHY_ClassifierCtrl_waited_en	0x462#define NPHY_IQFlip_ADC1		0x000163#define NPHY_IQFlip_ADC2		0x001064#define NPHY_sampleCmd_STOP		0x000265 66#define RX_GF_OR_MM			0x000467#define RX_GF_MM_AUTO			0x010068 69#define NPHY_iqloCalCmdGctl_IQLO_CAL_EN	0x800070 71#define NPHY_IqestCmd_iqstart		0x172#define NPHY_IqestCmd_iqMode		0x273 74#define NPHY_TxPwrCtrlCmd_pwrIndex_init		0x4075#define NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7	0x1976 77#define PRIM_SEL_UP20		0x800078 79#define NPHY_RFSEQ_RX2TX		0x080#define NPHY_RFSEQ_TX2RX		0x181#define NPHY_RFSEQ_RESET2RX		0x282#define NPHY_RFSEQ_UPDATEGAINH		0x383#define NPHY_RFSEQ_UPDATEGAINL		0x484#define NPHY_RFSEQ_UPDATEGAINU		0x585 86#define NPHY_RFSEQ_CMD_NOP		0x087#define NPHY_RFSEQ_CMD_RXG_FBW		0x188#define NPHY_RFSEQ_CMD_TR_SWITCH	0x289#define NPHY_RFSEQ_CMD_EXT_PA		0x390#define NPHY_RFSEQ_CMD_RXPD_TXPD	0x491#define NPHY_RFSEQ_CMD_TX_GAIN		0x592#define NPHY_RFSEQ_CMD_RX_GAIN		0x693#define NPHY_RFSEQ_CMD_SET_HPF_BW	0x794#define NPHY_RFSEQ_CMD_CLR_HIQ_DIS	0x895#define NPHY_RFSEQ_CMD_END		0xf96 97#define NPHY_REV3_RFSEQ_CMD_NOP		0x098#define NPHY_REV3_RFSEQ_CMD_RXG_FBW	0x199#define NPHY_REV3_RFSEQ_CMD_TR_SWITCH	0x2100#define NPHY_REV3_RFSEQ_CMD_INT_PA_PU	0x3101#define NPHY_REV3_RFSEQ_CMD_EXT_PA	0x4102#define NPHY_REV3_RFSEQ_CMD_RXPD_TXPD	0x5103#define NPHY_REV3_RFSEQ_CMD_TX_GAIN	0x6104#define NPHY_REV3_RFSEQ_CMD_RX_GAIN	0x7105#define NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS	0x8106#define NPHY_REV3_RFSEQ_CMD_SET_HPF_H_HPC	0x9107#define NPHY_REV3_RFSEQ_CMD_SET_LPF_H_HPC	0xa108#define NPHY_REV3_RFSEQ_CMD_SET_HPF_M_HPC	0xb109#define NPHY_REV3_RFSEQ_CMD_SET_LPF_M_HPC	0xc110#define NPHY_REV3_RFSEQ_CMD_SET_HPF_L_HPC	0xd111#define NPHY_REV3_RFSEQ_CMD_SET_LPF_L_HPC	0xe112#define NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS	0xf113#define NPHY_REV3_RFSEQ_CMD_END		0x1f114 115#define NPHY_RSSI_SEL_W1		0x0116#define NPHY_RSSI_SEL_W2		0x1117#define NPHY_RSSI_SEL_NB		0x2118#define NPHY_RSSI_SEL_IQ		0x3119#define NPHY_RSSI_SEL_TSSI_2G		0x4120#define NPHY_RSSI_SEL_TSSI_5G		0x5121#define NPHY_RSSI_SEL_TBD		0x6122 123#define NPHY_RAIL_I			0x0124#define NPHY_RAIL_Q			0x1125 126#define NPHY_FORCESIG_DECODEGATEDCLKS	0x8127 128#define NPHY_REV7_RfctrlOverride_cmd_rxrf_pu 0x0129#define NPHY_REV7_RfctrlOverride_cmd_rx_pu   0x1130#define NPHY_REV7_RfctrlOverride_cmd_tx_pu   0x2131#define NPHY_REV7_RfctrlOverride_cmd_rxgain  0x3132#define NPHY_REV7_RfctrlOverride_cmd_txgain  0x4133 134#define NPHY_REV7_RXGAINCODE_RFMXGAIN_MASK 0x000ff135#define NPHY_REV7_RXGAINCODE_LPFGAIN_MASK  0x0ff00136#define NPHY_REV7_RXGAINCODE_DVGAGAIN_MASK 0xf0000137 138#define NPHY_REV7_TXGAINCODE_TGAIN_MASK     0x7fff139#define NPHY_REV7_TXGAINCODE_LPFGAIN_MASK   0x8000140#define NPHY_REV7_TXGAINCODE_BIQ0GAIN_SHIFT 14141 142#define NPHY_REV7_RFCTRLOVERRIDE_ID0 0x0143#define NPHY_REV7_RFCTRLOVERRIDE_ID1 0x1144#define NPHY_REV7_RFCTRLOVERRIDE_ID2 0x2145 146#define NPHY_IqestIqAccLo(core)  ((core == 0) ? 0x12c : 0x134)147 148#define NPHY_IqestIqAccHi(core)  ((core == 0) ? 0x12d : 0x135)149 150#define NPHY_IqestipwrAccLo(core)  ((core == 0) ? 0x12e : 0x136)151 152#define NPHY_IqestipwrAccHi(core)  ((core == 0) ? 0x12f : 0x137)153 154#define NPHY_IqestqpwrAccLo(core)  ((core == 0) ? 0x130 : 0x138)155 156#define NPHY_IqestqpwrAccHi(core)  ((core == 0) ? 0x131 : 0x139)157