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1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */2/*3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation4 * Copyright (C) 2016-2017 Intel Deutschland GmbH5 * Copyright (C) 2018-2024 Intel Corporation6 */7#ifndef __IWL_CONFIG_H__8#define __IWL_CONFIG_H__9 10#include <linux/types.h>11#include <linux/netdevice.h>12#include <linux/ieee80211.h>13#include <linux/nl80211.h>14#include <linux/mod_devicetable.h>15#include "iwl-csr.h"16#include "iwl-drv.h"17 18enum iwl_device_family {19 IWL_DEVICE_FAMILY_UNDEFINED,20 IWL_DEVICE_FAMILY_1000,21 IWL_DEVICE_FAMILY_100,22 IWL_DEVICE_FAMILY_2000,23 IWL_DEVICE_FAMILY_2030,24 IWL_DEVICE_FAMILY_105,25 IWL_DEVICE_FAMILY_135,26 IWL_DEVICE_FAMILY_5000,27 IWL_DEVICE_FAMILY_5150,28 IWL_DEVICE_FAMILY_6000,29 IWL_DEVICE_FAMILY_6000i,30 IWL_DEVICE_FAMILY_6005,31 IWL_DEVICE_FAMILY_6030,32 IWL_DEVICE_FAMILY_6050,33 IWL_DEVICE_FAMILY_6150,34 IWL_DEVICE_FAMILY_7000,35 IWL_DEVICE_FAMILY_8000,36 IWL_DEVICE_FAMILY_9000,37 IWL_DEVICE_FAMILY_22000,38 IWL_DEVICE_FAMILY_AX210,39 IWL_DEVICE_FAMILY_BZ,40 IWL_DEVICE_FAMILY_SC,41};42 43/*44 * LED mode45 * IWL_LED_DEFAULT: use device default46 * IWL_LED_RF_STATE: turn LED on/off based on RF state47 * LED ON = RF ON48 * LED OFF = RF OFF49 * IWL_LED_BLINK: adjust led blink rate based on blink table50 * IWL_LED_DISABLE: led disabled51 */52enum iwl_led_mode {53 IWL_LED_DEFAULT,54 IWL_LED_RF_STATE,55 IWL_LED_BLINK,56 IWL_LED_DISABLE,57};58 59/**60 * enum iwl_nvm_type - nvm formats61 * @IWL_NVM: the regular format62 * @IWL_NVM_EXT: extended NVM format63 * @IWL_NVM_SDP: NVM format used by 3168 series64 */65enum iwl_nvm_type {66 IWL_NVM,67 IWL_NVM_EXT,68 IWL_NVM_SDP,69};70 71/*72 * This is the threshold value of plcp error rate per 100mSecs. It is73 * used to set and check for the validity of plcp_delta.74 */75#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 176#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 5077#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 10078#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 20079#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 25580#define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 081 82/* TX queue watchdog timeouts in mSecs */83#define IWL_WATCHDOG_DISABLED 084#define IWL_DEF_WD_TIMEOUT 250085#define IWL_LONG_WD_TIMEOUT 1000086#define IWL_MAX_WD_TIMEOUT 12000087 88#define IWL_DEFAULT_MAX_TX_POWER 2289#define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\90 NETIF_F_TSO | NETIF_F_TSO6)91#define IWL_CSUM_NETIF_FLAGS_MASK (IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM)92 93/* Antenna presence definitions */94#define ANT_NONE 0x095#define ANT_INVALID 0xff96#define ANT_A BIT(0)97#define ANT_B BIT(1)98#define ANT_C BIT(2)99#define ANT_AB (ANT_A | ANT_B)100#define ANT_AC (ANT_A | ANT_C)101#define ANT_BC (ANT_B | ANT_C)102#define ANT_ABC (ANT_A | ANT_B | ANT_C)103 104 105static inline u8 num_of_ant(u8 mask)106{107 return !!((mask) & ANT_A) +108 !!((mask) & ANT_B) +109 !!((mask) & ANT_C);110}111 112/**113 * struct iwl_base_params - params not likely to change within a device family114 * @max_ll_items: max number of OTP blocks115 * @shadow_ram_support: shadow support for OTP memory116 * @led_compensation: compensate on the led on/off time per HW according117 * to the deviation to achieve the desired led frequency.118 * The detail algorithm is described in iwl-led.c119 * @wd_timeout: TX queues watchdog timeout120 * @max_event_log_size: size of event log buffer size for ucode event logging121 * @shadow_reg_enable: HW shadow register support122 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command123 * is in flight. This is due to a HW bug in 7260, 3160 and 7265.124 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.125 * @max_tfd_queue_size: max number of entries in tfd queue.126 */127struct iwl_base_params {128 unsigned int wd_timeout;129 130 u16 eeprom_size;131 u16 max_event_log_size;132 133 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */134 shadow_ram_support:1,135 shadow_reg_enable:1,136 pcie_l1_allowed:1,137 apmg_wake_up_wa:1,138 scd_chain_ext_wa:1;139 140 u16 num_of_queues; /* def: HW dependent */141 u32 max_tfd_queue_size; /* def: HW dependent */142 143 u8 max_ll_items;144 u8 led_compensation;145};146 147/*148 * @stbc: support Tx STBC and 1*SS Rx STBC149 * @ldpc: support Tx/Rx with LDPC150 * @use_rts_for_aggregation: use rts/cts protection for HT traffic151 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40152 */153struct iwl_ht_params {154 u8 ht_greenfield_support:1,155 stbc:1,156 ldpc:1,157 use_rts_for_aggregation:1;158 u8 ht40_bands;159};160 161/*162 * Tx-backoff threshold163 * @temperature: The threshold in Celsius164 * @backoff: The tx-backoff in uSec165 */166struct iwl_tt_tx_backoff {167 s32 temperature;168 u32 backoff;169};170 171#define TT_TX_BACKOFF_SIZE 6172 173/**174 * struct iwl_tt_params - thermal throttling parameters175 * @ct_kill_entry: CT Kill entry threshold176 * @ct_kill_exit: CT Kill exit threshold177 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs178 * to checks whether to exit CT Kill.179 * @dynamic_smps_entry: Dynamic SMPS entry threshold180 * @dynamic_smps_exit: Dynamic SMPS exit threshold181 * @tx_protection_entry: TX protection entry threshold182 * @tx_protection_exit: TX protection exit threshold183 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.184 * @support_ct_kill: Support CT Kill?185 * @support_dynamic_smps: Support dynamic SMPS?186 * @support_tx_protection: Support tx protection?187 * @support_tx_backoff: Support tx-backoff?188 */189struct iwl_tt_params {190 u32 ct_kill_entry;191 u32 ct_kill_exit;192 u32 ct_kill_duration;193 u32 dynamic_smps_entry;194 u32 dynamic_smps_exit;195 u32 tx_protection_entry;196 u32 tx_protection_exit;197 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];198 u8 support_ct_kill:1,199 support_dynamic_smps:1,200 support_tx_protection:1,201 support_tx_backoff:1;202};203 204/*205 * information on how to parse the EEPROM206 */207#define EEPROM_REG_BAND_1_CHANNELS 0x08208#define EEPROM_REG_BAND_2_CHANNELS 0x26209#define EEPROM_REG_BAND_3_CHANNELS 0x42210#define EEPROM_REG_BAND_4_CHANNELS 0x5C211#define EEPROM_REG_BAND_5_CHANNELS 0x74212#define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82213#define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92214#define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80215#define EEPROM_REGULATORY_BAND_NO_HT40 0216 217/* lower blocks contain EEPROM image and calibration data */218#define OTP_LOW_IMAGE_SIZE_2K (2 * 512 * sizeof(u16)) /* 2 KB */219#define OTP_LOW_IMAGE_SIZE_16K (16 * 512 * sizeof(u16)) /* 16 KB */220#define OTP_LOW_IMAGE_SIZE_32K (32 * 512 * sizeof(u16)) /* 32 KB */221 222struct iwl_eeprom_params {223 const u8 regulatory_bands[7];224 bool enhanced_txpower;225};226 227/* Tx-backoff power threshold228 * @pwr: The power limit in mw229 * @backoff: The tx-backoff in uSec230 */231struct iwl_pwr_tx_backoff {232 u32 pwr;233 u32 backoff;234};235 236enum iwl_cfg_trans_ltr_delay {237 IWL_CFG_TRANS_LTR_DELAY_NONE = 0,238 IWL_CFG_TRANS_LTR_DELAY_200US = 1,239 IWL_CFG_TRANS_LTR_DELAY_2500US = 2,240 IWL_CFG_TRANS_LTR_DELAY_1820US = 3,241};242 243/**244 * struct iwl_cfg_trans_params - information needed to start the trans245 *246 * These values are specific to the device ID and do not change when247 * multiple configs are used for a single device ID. They values are248 * used, among other things, to boot the NIC so that the HW REV or249 * RFID can be read before deciding the remaining parameters to use.250 *251 * @base_params: pointer to basic parameters252 * @device_family: the device family253 * @umac_prph_offset: offset to add to UMAC periphery address254 * @xtal_latency: power up latency to get the xtal stabilized255 * @extra_phy_cfg_flags: extra configuration flags to pass to the PHY256 * @rf_id: need to read rf_id to determine the firmware image257 * @gen2: 22000 and on transport operation258 * @mq_rx_supported: multi-queue rx support259 * @integrated: discrete or integrated260 * @low_latency_xtal: use the low latency xtal if supported261 * @bisr_workaround: BISR hardware workaround (for 22260 series devices)262 * @ltr_delay: LTR delay parameter, &enum iwl_cfg_trans_ltr_delay.263 * @imr_enabled: use the IMR if supported.264 */265struct iwl_cfg_trans_params {266 const struct iwl_base_params *base_params;267 enum iwl_device_family device_family;268 u32 umac_prph_offset;269 u32 xtal_latency;270 u32 extra_phy_cfg_flags;271 u32 rf_id:1,272 gen2:1,273 mq_rx_supported:1,274 integrated:1,275 low_latency_xtal:1,276 bisr_workaround:1,277 ltr_delay:2,278 imr_enabled:1;279};280 281/**282 * struct iwl_fw_mon_reg - FW monitor register info283 * @addr: register address284 * @mask: register mask285 */286struct iwl_fw_mon_reg {287 u32 addr;288 u32 mask;289};290 291/**292 * struct iwl_fw_mon_regs - FW monitor registers293 * @write_ptr: write pointer register294 * @cycle_cnt: cycle count register295 * @cur_frag: current fragment in use296 */297struct iwl_fw_mon_regs {298 struct iwl_fw_mon_reg write_ptr;299 struct iwl_fw_mon_reg cycle_cnt;300 struct iwl_fw_mon_reg cur_frag;301};302 303/**304 * struct iwl_cfg305 * @trans: the trans-specific configuration part306 * @name: Official name of the device307 * @fw_name_pre: Firmware filename prefix. The api version and extension308 * (.ucode) will be added to filename before loading from disk. The309 * filename is constructed as <fw_name_pre>-<api>.ucode.310 * @fw_name_mac: MAC name for this config, the remaining pieces of the311 * name will be generated dynamically312 * @ucode_api_max: Highest version of uCode API supported by driver.313 * @ucode_api_min: Lowest version of uCode API supported by driver.314 * @max_inst_size: The maximal length of the fw inst section (only DVM)315 * @max_data_size: The maximal length of the fw data section (only DVM)316 * @valid_tx_ant: valid transmit antenna317 * @valid_rx_ant: valid receive antenna318 * @non_shared_ant: the antenna that is for WiFi only319 * @nvm_ver: NVM version320 * @nvm_calib_ver: NVM calibration version321 * @ht_params: point to ht parameters322 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)323 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity324 * @tx_with_siso_diversity: 1x1 device with tx antenna diversity325 * @internal_wimax_coex: internal wifi/wimax combo device326 * @high_temp: Is this NIC is designated to be in high temperature.327 * @host_interrupt_operation_mode: device needs host interrupt operation328 * mode set329 * @nvm_hw_section_num: the ID of the HW NVM section330 * @mac_addr_from_csr: read HW address from CSR registers at this offset331 * @features: hw features, any combination of feature_passlist332 * @pwr_tx_backoffs: translation table between power limits and backoffs333 * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response334 * @dccm_offset: offset from which DCCM begins335 * @dccm_len: length of DCCM (including runtime stack CCM)336 * @dccm2_offset: offset from which the second DCCM begins337 * @dccm2_len: length of the second DCCM338 * @smem_offset: offset from which the SMEM begins339 * @smem_len: the length of SMEM340 * @vht_mu_mimo_supported: VHT MU-MIMO support341 * @cdb: CDB support342 * @nvm_type: see &enum iwl_nvm_type343 * @d3_debug_data_base_addr: base address where D3 debug data is stored344 * @d3_debug_data_length: length of the D3 debug data345 * @min_txq_size: minimum number of slots required in a TX queue346 * @uhb_supported: ultra high band channels supported347 * @min_ba_txq_size: minimum number of slots required in a TX queue which348 * based on hardware support (HE - 256, EHT - 1K).349 * @num_rbds: number of receive buffer descriptors to use350 * (only used for multi-queue capable devices)351 *352 * We enable the driver to be backward compatible wrt. hardware features.353 * API differences in uCode shouldn't be handled here but through TLVs354 * and/or the uCode API version instead.355 */356struct iwl_cfg {357 struct iwl_cfg_trans_params trans;358 /* params specific to an individual device within a device family */359 const char *name;360 const char *fw_name_pre;361 const char *fw_name_mac;362 /* params likely to change within a device family */363 const struct iwl_ht_params *ht_params;364 const struct iwl_eeprom_params *eeprom_params;365 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;366 const char *default_nvm_file_C_step;367 const struct iwl_tt_params *thermal_params;368 enum iwl_led_mode led_mode;369 enum iwl_nvm_type nvm_type;370 u32 max_data_size;371 u32 max_inst_size;372 netdev_features_t features;373 u32 dccm_offset;374 u32 dccm_len;375 u32 dccm2_offset;376 u32 dccm2_len;377 u32 smem_offset;378 u32 smem_len;379 u16 nvm_ver;380 u16 nvm_calib_ver;381 u32 rx_with_siso_diversity:1,382 tx_with_siso_diversity:1,383 internal_wimax_coex:1,384 host_interrupt_operation_mode:1,385 high_temp:1,386 mac_addr_from_csr:10,387 lp_xtal_workaround:1,388 apmg_not_supported:1,389 vht_mu_mimo_supported:1,390 cdb:1,391 dbgc_supported:1,392 uhb_supported:1;393 u8 valid_tx_ant;394 u8 valid_rx_ant;395 u8 non_shared_ant;396 u8 nvm_hw_section_num;397 u8 max_tx_agg_size;398 u8 ucode_api_max;399 u8 ucode_api_min;400 u16 num_rbds;401 u32 min_umac_error_event_table;402 u32 d3_debug_data_base_addr;403 u32 d3_debug_data_length;404 u32 min_txq_size;405 u32 gp2_reg_addr;406 u32 min_ba_txq_size;407 const struct iwl_fw_mon_regs mon_dram_regs;408 const struct iwl_fw_mon_regs mon_smem_regs;409 const struct iwl_fw_mon_regs mon_dbgi_regs;410};411 412#define IWL_CFG_ANY (~0)413 414#define IWL_CFG_MAC_TYPE_PU 0x31415#define IWL_CFG_MAC_TYPE_TH 0x32416#define IWL_CFG_MAC_TYPE_QU 0x33417#define IWL_CFG_MAC_TYPE_QUZ 0x35418#define IWL_CFG_MAC_TYPE_SO 0x37419#define IWL_CFG_MAC_TYPE_SOF 0x43420#define IWL_CFG_MAC_TYPE_MA 0x44421#define IWL_CFG_MAC_TYPE_BZ 0x46422#define IWL_CFG_MAC_TYPE_GL 0x47423#define IWL_CFG_MAC_TYPE_SC 0x48424#define IWL_CFG_MAC_TYPE_SC2 0x49425#define IWL_CFG_MAC_TYPE_SC2F 0x4A426#define IWL_CFG_MAC_TYPE_BZ_W 0x4B427 428#define IWL_CFG_RF_TYPE_TH 0x105429#define IWL_CFG_RF_TYPE_TH1 0x108430#define IWL_CFG_RF_TYPE_JF2 0x105431#define IWL_CFG_RF_TYPE_JF1 0x108432#define IWL_CFG_RF_TYPE_HR2 0x10A433#define IWL_CFG_RF_TYPE_HR1 0x10C434#define IWL_CFG_RF_TYPE_GF 0x10D435#define IWL_CFG_RF_TYPE_FM 0x112436#define IWL_CFG_RF_TYPE_WH 0x113437 438#define IWL_CFG_RF_ID_TH 0x1439#define IWL_CFG_RF_ID_TH1 0x1440#define IWL_CFG_RF_ID_JF 0x3441#define IWL_CFG_RF_ID_JF1 0x6442#define IWL_CFG_RF_ID_JF1_DIV 0xA443#define IWL_CFG_RF_ID_HR 0x7444#define IWL_CFG_RF_ID_HR1 0x4445 446#define IWL_CFG_NO_160 0x1447#define IWL_CFG_160 0x0448 449#define IWL_CFG_NO_320 0x1450#define IWL_CFG_320 0x0451 452#define IWL_CFG_CORES_BT 0x0453#define IWL_CFG_CORES_BT_GNSS 0x5454 455#define IWL_CFG_NO_CDB 0x0456#define IWL_CFG_CDB 0x1457 458#define IWL_CFG_NO_JACKET 0x0459#define IWL_CFG_IS_JACKET 0x1460 461#define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4)462#define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0200) >> 9)463#define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10)464 465struct iwl_dev_info {466 u16 device;467 u16 subdevice;468 u16 mac_type;469 u16 rf_type;470 u8 mac_step;471 u8 rf_step;472 u8 rf_id;473 u8 no_160;474 u8 cores;475 u8 cdb;476 u8 jacket;477 const struct iwl_cfg *cfg;478 const char *name;479};480 481#if IS_ENABLED(CONFIG_IWLWIFI_KUNIT_TESTS)482extern const struct iwl_dev_info iwl_dev_info_table[];483extern const unsigned int iwl_dev_info_table_size;484const struct iwl_dev_info *485iwl_pci_find_dev_info(u16 device, u16 subsystem_device,486 u16 mac_type, u8 mac_step, u16 rf_type, u8 cdb,487 u8 jacket, u8 rf_id, u8 no_160, u8 cores, u8 rf_step);488extern const struct pci_device_id iwl_hw_card_ids[];489#endif490 491/*492 * This list declares the config structures for all devices.493 */494extern const struct iwl_cfg_trans_params iwl9000_trans_cfg;495extern const struct iwl_cfg_trans_params iwl9560_trans_cfg;496extern const struct iwl_cfg_trans_params iwl9560_long_latency_trans_cfg;497extern const struct iwl_cfg_trans_params iwl9560_shared_clk_trans_cfg;498extern const struct iwl_cfg_trans_params iwl_qu_trans_cfg;499extern const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg;500extern const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg;501extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg;502extern const struct iwl_cfg_trans_params iwl_so_trans_cfg;503extern const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg;504extern const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg;505extern const struct iwl_cfg_trans_params iwl_ma_trans_cfg;506extern const struct iwl_cfg_trans_params iwl_bz_trans_cfg;507extern const struct iwl_cfg_trans_params iwl_gl_trans_cfg;508extern const struct iwl_cfg_trans_params iwl_sc_trans_cfg;509extern const char iwl9162_name[];510extern const char iwl9260_name[];511extern const char iwl9260_1_name[];512extern const char iwl9270_name[];513extern const char iwl9461_name[];514extern const char iwl9462_name[];515extern const char iwl9560_name[];516extern const char iwl9162_160_name[];517extern const char iwl9260_160_name[];518extern const char iwl9270_160_name[];519extern const char iwl9461_160_name[];520extern const char iwl9462_160_name[];521extern const char iwl9560_160_name[];522extern const char iwl9260_killer_1550_name[];523extern const char iwl9560_killer_1550i_name[];524extern const char iwl9560_killer_1550s_name[];525extern const char iwl_ax200_name[];526extern const char iwl_ax203_name[];527extern const char iwl_ax204_name[];528extern const char iwl_ax201_name[];529extern const char iwl_ax101_name[];530extern const char iwl_ax200_killer_1650w_name[];531extern const char iwl_ax200_killer_1650x_name[];532extern const char iwl_ax201_killer_1650s_name[];533extern const char iwl_ax201_killer_1650i_name[];534extern const char iwl_ax210_killer_1675w_name[];535extern const char iwl_ax210_killer_1675x_name[];536extern const char iwl9560_killer_1550i_160_name[];537extern const char iwl9560_killer_1550s_160_name[];538extern const char iwl_ax211_killer_1675s_name[];539extern const char iwl_ax211_killer_1675i_name[];540extern const char iwl_ax411_killer_1690s_name[];541extern const char iwl_ax411_killer_1690i_name[];542extern const char iwl_ax211_name[];543extern const char iwl_ax221_name[];544extern const char iwl_ax231_name[];545extern const char iwl_ax411_name[];546extern const char iwl_bz_name[];547extern const char iwl_fm_name[];548extern const char iwl_gl_name[];549extern const char iwl_mtp_name[];550extern const char iwl_sc_name[];551extern const char iwl_sc2_name[];552extern const char iwl_sc2f_name[];553#if IS_ENABLED(CONFIG_IWLDVM)554extern const struct iwl_cfg iwl5300_agn_cfg;555extern const struct iwl_cfg iwl5100_agn_cfg;556extern const struct iwl_cfg iwl5350_agn_cfg;557extern const struct iwl_cfg iwl5100_bgn_cfg;558extern const struct iwl_cfg iwl5100_abg_cfg;559extern const struct iwl_cfg iwl5150_agn_cfg;560extern const struct iwl_cfg iwl5150_abg_cfg;561extern const struct iwl_cfg iwl6005_2agn_cfg;562extern const struct iwl_cfg iwl6005_2abg_cfg;563extern const struct iwl_cfg iwl6005_2bg_cfg;564extern const struct iwl_cfg iwl6005_2agn_sff_cfg;565extern const struct iwl_cfg iwl6005_2agn_d_cfg;566extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;567extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;568extern const struct iwl_cfg iwl1030_bgn_cfg;569extern const struct iwl_cfg iwl1030_bg_cfg;570extern const struct iwl_cfg iwl6030_2agn_cfg;571extern const struct iwl_cfg iwl6030_2abg_cfg;572extern const struct iwl_cfg iwl6030_2bgn_cfg;573extern const struct iwl_cfg iwl6030_2bg_cfg;574extern const struct iwl_cfg iwl6000i_2agn_cfg;575extern const struct iwl_cfg iwl6000i_2abg_cfg;576extern const struct iwl_cfg iwl6000i_2bg_cfg;577extern const struct iwl_cfg iwl6000_3agn_cfg;578extern const struct iwl_cfg iwl6050_2agn_cfg;579extern const struct iwl_cfg iwl6050_2abg_cfg;580extern const struct iwl_cfg iwl6150_bgn_cfg;581extern const struct iwl_cfg iwl6150_bg_cfg;582extern const struct iwl_cfg iwl1000_bgn_cfg;583extern const struct iwl_cfg iwl1000_bg_cfg;584extern const struct iwl_cfg iwl100_bgn_cfg;585extern const struct iwl_cfg iwl100_bg_cfg;586extern const struct iwl_cfg iwl130_bgn_cfg;587extern const struct iwl_cfg iwl130_bg_cfg;588extern const struct iwl_cfg iwl2000_2bgn_cfg;589extern const struct iwl_cfg iwl2000_2bgn_d_cfg;590extern const struct iwl_cfg iwl2030_2bgn_cfg;591extern const struct iwl_cfg iwl6035_2agn_cfg;592extern const struct iwl_cfg iwl6035_2agn_sff_cfg;593extern const struct iwl_cfg iwl105_bgn_cfg;594extern const struct iwl_cfg iwl105_bgn_d_cfg;595extern const struct iwl_cfg iwl135_bgn_cfg;596#endif /* CONFIG_IWLDVM */597#if IS_ENABLED(CONFIG_IWLMVM)598extern const struct iwl_ht_params iwl_22000_ht_params;599extern const struct iwl_cfg iwl7260_2ac_cfg;600extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;601extern const struct iwl_cfg iwl7260_2n_cfg;602extern const struct iwl_cfg iwl7260_n_cfg;603extern const struct iwl_cfg iwl3160_2ac_cfg;604extern const struct iwl_cfg iwl3160_2n_cfg;605extern const struct iwl_cfg iwl3160_n_cfg;606extern const struct iwl_cfg iwl3165_2ac_cfg;607extern const struct iwl_cfg iwl3168_2ac_cfg;608extern const struct iwl_cfg iwl7265_2ac_cfg;609extern const struct iwl_cfg iwl7265_2n_cfg;610extern const struct iwl_cfg iwl7265_n_cfg;611extern const struct iwl_cfg iwl7265d_2ac_cfg;612extern const struct iwl_cfg iwl7265d_2n_cfg;613extern const struct iwl_cfg iwl7265d_n_cfg;614extern const struct iwl_cfg iwl8260_2n_cfg;615extern const struct iwl_cfg iwl8260_2ac_cfg;616extern const struct iwl_cfg iwl8265_2ac_cfg;617extern const struct iwl_cfg iwl8275_2ac_cfg;618extern const struct iwl_cfg iwl4165_2ac_cfg;619extern const struct iwl_cfg iwl9260_2ac_cfg;620extern const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg;621extern const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg;622extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg;623extern const struct iwl_cfg iwl9560_2ac_cfg_soc;624extern const struct iwl_cfg iwl_qu_b0_hr1_b0;625extern const struct iwl_cfg iwl_qu_c0_hr1_b0;626extern const struct iwl_cfg iwl_quz_a0_hr1_b0;627extern const struct iwl_cfg iwl_qu_b0_hr_b0;628extern const struct iwl_cfg iwl_qu_c0_hr_b0;629extern const struct iwl_cfg iwl_ax200_cfg_cc;630extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;631extern const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0;632extern const struct iwl_cfg iwl_ax201_cfg_quz_hr;633extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr;634extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr;635extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0;636extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0;637extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0;638extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0;639extern const struct iwl_cfg killer1650x_2ax_cfg;640extern const struct iwl_cfg killer1650w_2ax_cfg;641extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0;642extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0;643extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long;644extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0;645extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0;646extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long;647 648extern const struct iwl_cfg iwl_cfg_ma;649 650extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0;651extern const struct iwl_cfg iwl_cfg_so_a0_ms_a0;652extern const struct iwl_cfg iwl_cfg_quz_a0_hr_b0;653 654extern const struct iwl_cfg iwl_cfg_bz;655extern const struct iwl_cfg iwl_cfg_gl;656 657extern const struct iwl_cfg iwl_cfg_sc;658extern const struct iwl_cfg iwl_cfg_sc2;659extern const struct iwl_cfg iwl_cfg_sc2f;660#endif /* CONFIG_IWLMVM */661 662#endif /* __IWL_CONFIG_H__ */663