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1/* SPDX-License-Identifier: GPL-2.0-only */2#ifndef P54USB_H3#define P54USB_H4 5/*6 * Defines for USB based mac80211 Prism54 driver7 *8 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>9 *10 * Based on the islsm (softmac prism54) driver, which is:11 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.12 */13 14/* for isl3886 register definitions used on ver 1 devices */15#include "p54pci.h"16#include <linux/usb/net2280.h>17 18/* pci */19#define NET2280_BASE 0x1000000020#define NET2280_BASE2 0x2000000021 22/* gpio */23#define P54U_BRG_POWER_UP (1 << GPIO0_DATA)24#define P54U_BRG_POWER_DOWN (1 << GPIO1_DATA)25 26/* devinit */27#define NET2280_CLK_4Mhz (15 << LOCAL_CLOCK_FREQUENCY)28#define NET2280_CLK_30Mhz (2 << LOCAL_CLOCK_FREQUENCY)29#define NET2280_CLK_60Mhz (1 << LOCAL_CLOCK_FREQUENCY)30#define NET2280_CLK_STOP (0 << LOCAL_CLOCK_FREQUENCY)31#define NET2280_PCI_ENABLE (1 << PCI_ENABLE)32#define NET2280_PCI_SOFT_RESET (1 << PCI_SOFT_RESET)33 34/* endpoints */35#define NET2280_CLEAR_NAK_OUT_PACKETS_MODE (1 << CLEAR_NAK_OUT_PACKETS_MODE)36#define NET2280_FIFO_FLUSH (1 << FIFO_FLUSH)37 38/* irq */39#define NET2280_USB_INTERRUPT_ENABLE (1 << USB_INTERRUPT_ENABLE)40#define NET2280_PCI_INTA_INTERRUPT (1 << PCI_INTA_INTERRUPT)41#define NET2280_PCI_INTA_INTERRUPT_ENABLE (1 << PCI_INTA_INTERRUPT_ENABLE)42 43/* registers */44#define NET2280_DEVINIT 0x0045#define NET2280_USBIRQENB1 0x2446#define NET2280_IRQSTAT1 0x2c47#define NET2280_FIFOCTL 0x3848#define NET2280_GPIOCTL 0x5049#define NET2280_RELNUM 0x8850#define NET2280_EPA_RSP 0x32451#define NET2280_EPA_STAT 0x32c52#define NET2280_EPB_STAT 0x34c53#define NET2280_EPC_RSP 0x36454#define NET2280_EPC_STAT 0x36c55#define NET2280_EPD_STAT 0x38c56 57#define NET2280_EPA_CFG 0x32058#define NET2280_EPB_CFG 0x34059#define NET2280_EPC_CFG 0x36060#define NET2280_EPD_CFG 0x38061#define NET2280_EPE_CFG 0x3A062#define NET2280_EPF_CFG 0x3C063#define P54U_DEV_BASE 0x4000000064 65struct net2280_tx_hdr {66 __le32 device_addr;67 __le16 len;68 __le16 follower; /* ? */69 u8 padding[8];70} __packed;71 72struct lm87_tx_hdr {73 __le32 device_addr;74 __le32 chksum;75} __packed;76 77/* Some flags for the isl hardware registers controlling DMA inside the78 * chip */79#define ISL38XX_DMA_STATUS_DONE 0x0000000180#define ISL38XX_DMA_STATUS_READY 0x0000000281#define NET2280_EPA_FIFO_PCI_ADDR 0x2000000082#define ISL38XX_DMA_MASTER_CONTROL_TRIGGER 0x0000000483 84enum net2280_op_type {85 NET2280_BRG_U32 = 0x001F,86 NET2280_BRG_CFG_U32 = 0x000F,87 NET2280_BRG_CFG_U16 = 0x0003,88 NET2280_DEV_U32 = 0x080F,89 NET2280_DEV_CFG_U32 = 0x088F,90 NET2280_DEV_CFG_U16 = 0x088391};92 93struct net2280_reg_write {94 __le16 port;95 __le32 addr;96 __le32 val;97} __packed;98 99struct net2280_reg_read {100 __le16 port;101 __le32 addr;102} __packed;103 104#define P54U_FW_BLOCK 2048105 106#define X2_SIGNATURE "x2 "107#define X2_SIGNATURE_SIZE 4108 109struct x2_header {110 u8 signature[X2_SIGNATURE_SIZE];111 __le32 fw_load_addr;112 __le32 fw_length;113 __le32 crc;114} __packed;115 116/* pipes 3 and 4 are not used by the driver */117#define P54U_PIPE_NUMBER 9118 119enum p54u_pipe_addr {120 P54U_PIPE_DATA = 0x01,121 P54U_PIPE_MGMT = 0x02,122 P54U_PIPE_3 = 0x03,123 P54U_PIPE_4 = 0x04,124 P54U_PIPE_BRG = 0x0d,125 P54U_PIPE_DEV = 0x0e,126 P54U_PIPE_INT = 0x0f127};128 129struct p54u_rx_info {130 struct urb *urb;131 struct ieee80211_hw *dev;132};133 134enum p54u_hw_type {135 P54U_INVALID_HW,136 P54U_NET2280,137 P54U_3887,138 139 /* keep last */140 __NUM_P54U_HWTYPES,141};142 143struct p54u_priv {144 struct p54_common common;145 struct usb_device *udev;146 struct usb_interface *intf;147 int (*upload_fw)(struct ieee80211_hw *dev);148 149 enum p54u_hw_type hw_type;150 spinlock_t lock;151 struct sk_buff_head rx_queue;152 struct usb_anchor submitted;153 const struct firmware *fw;154 155 /* asynchronous firmware callback */156 struct completion fw_wait_load;157};158 159#endif /* P54USB_H */160