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1// SPDX-License-Identifier: ISC2/* Copyright (C) 2020 MediaTek Inc. */3 4#include "mt76_connac.h"5#include "mt76_connac2_mac.h"6#include "dma.h"7 8#define HE_BITS(f)		cpu_to_le16(IEEE80211_RADIOTAP_HE_##f)9#define HE_PREP(f, m, v)	le16_encode_bits(le32_get_bits(v, MT_CRXV_HE_##m),\10						 IEEE80211_RADIOTAP_HE_##f)11 12void mt76_connac_gen_ppe_thresh(u8 *he_ppet, int nss)13{14	static const u8 ppet16_ppet8_ru3_ru0[] = { 0x1c, 0xc7, 0x71 };15	u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */16 17	he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) |18		     FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK,19				ru_bit_mask);20 21	ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE *22		    nss * hweight8(ru_bit_mask) * 2;23	ppet_size = DIV_ROUND_UP(ppet_bits, 8);24 25	for (i = 0; i < ppet_size - 1; i++)26		he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3];27 28	he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] &29			 (0xff >> (8 - (ppet_bits - 1) % 8));30}31EXPORT_SYMBOL_GPL(mt76_connac_gen_ppe_thresh);32 33int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm)34{35	struct mt76_dev *dev = phy->dev;36 37	if (mt76_is_usb(dev))38		return 0;39 40	cancel_delayed_work_sync(&pm->ps_work);41	if (!test_bit(MT76_STATE_PM, &phy->state))42		return 0;43 44	if (pm->suspended)45		return 0;46 47	queue_work(dev->wq, &pm->wake_work);48	if (!wait_event_timeout(pm->wait,49				!test_bit(MT76_STATE_PM, &phy->state),50				3 * HZ)) {51		ieee80211_wake_queues(phy->hw);52		return -ETIMEDOUT;53	}54 55	return 0;56}57EXPORT_SYMBOL_GPL(mt76_connac_pm_wake);58 59void mt76_connac_power_save_sched(struct mt76_phy *phy,60				  struct mt76_connac_pm *pm)61{62	struct mt76_dev *dev = phy->dev;63 64	if (mt76_is_usb(dev))65		return;66 67	if (!pm->enable)68		return;69 70	if (pm->suspended)71		return;72 73	pm->last_activity = jiffies;74 75	if (!test_bit(MT76_STATE_PM, &phy->state)) {76		cancel_delayed_work(&phy->mac_work);77		queue_delayed_work(dev->wq, &pm->ps_work, pm->idle_timeout);78	}79}80EXPORT_SYMBOL_GPL(mt76_connac_power_save_sched);81 82void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm,83				      struct mt76_wcid *wcid)84{85	int i;86 87	spin_lock_bh(&pm->txq_lock);88	for (i = 0; i < IEEE80211_NUM_ACS; i++) {89		if (wcid && pm->tx_q[i].wcid != wcid)90			continue;91 92		dev_kfree_skb(pm->tx_q[i].skb);93		pm->tx_q[i].skb = NULL;94	}95	spin_unlock_bh(&pm->txq_lock);96}97EXPORT_SYMBOL_GPL(mt76_connac_free_pending_tx_skbs);98 99void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw,100			      struct mt76_connac_pm *pm,101			      struct mt76_wcid *wcid,102			      struct sk_buff *skb)103{104	int qid = skb_get_queue_mapping(skb);105	struct mt76_phy *phy = hw->priv;106 107	spin_lock_bh(&pm->txq_lock);108	if (!pm->tx_q[qid].skb) {109		ieee80211_stop_queues(hw);110		pm->tx_q[qid].wcid = wcid;111		pm->tx_q[qid].skb = skb;112		queue_work(phy->dev->wq, &pm->wake_work);113	} else {114		dev_kfree_skb(skb);115	}116	spin_unlock_bh(&pm->txq_lock);117}118EXPORT_SYMBOL_GPL(mt76_connac_pm_queue_skb);119 120void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy,121				 struct mt76_connac_pm *pm)122{123	int i;124 125	spin_lock_bh(&pm->txq_lock);126	for (i = 0; i < IEEE80211_NUM_ACS; i++) {127		struct mt76_wcid *wcid = pm->tx_q[i].wcid;128		struct ieee80211_sta *sta = NULL;129 130		if (!pm->tx_q[i].skb)131			continue;132 133		if (wcid && wcid->sta)134			sta = container_of((void *)wcid, struct ieee80211_sta,135					   drv_priv);136 137		mt76_tx(phy, sta, wcid, pm->tx_q[i].skb);138		pm->tx_q[i].skb = NULL;139	}140	spin_unlock_bh(&pm->txq_lock);141 142	mt76_worker_schedule(&phy->dev->tx_worker);143}144EXPORT_SYMBOL_GPL(mt76_connac_pm_dequeue_skbs);145 146void mt76_connac_tx_complete_skb(struct mt76_dev *mdev,147				 struct mt76_queue_entry *e)148{149	if (!e->txwi) {150		dev_kfree_skb_any(e->skb);151		return;152	}153 154	if (e->skb)155		mt76_tx_complete_skb(mdev, e->wcid, e->skb);156}157EXPORT_SYMBOL_GPL(mt76_connac_tx_complete_skb);158 159void mt76_connac_write_hw_txp(struct mt76_dev *dev,160			      struct mt76_tx_info *tx_info,161			      void *txp_ptr, u32 id)162{163	struct mt76_connac_hw_txp *txp = txp_ptr;164	struct mt76_connac_txp_ptr *ptr = &txp->ptr[0];165	int i, nbuf = tx_info->nbuf - 1;166	u32 last_mask;167 168	tx_info->buf[0].len = MT_TXD_SIZE + sizeof(*txp);169	tx_info->nbuf = 1;170 171	txp->msdu_id[0] = cpu_to_le16(id | MT_MSDU_ID_VALID);172 173	if (is_mt7663(dev) || is_mt7921(dev) || is_mt7925(dev))174		last_mask = MT_TXD_LEN_LAST;175	else176		last_mask = MT_TXD_LEN_AMSDU_LAST |177			    MT_TXD_LEN_MSDU_LAST;178 179	for (i = 0; i < nbuf; i++) {180		u16 len = tx_info->buf[i + 1].len & MT_TXD_LEN_MASK;181		u32 addr = tx_info->buf[i + 1].addr;182 183		if (i == nbuf - 1)184			len |= last_mask;185 186		if (i & 1) {187			ptr->buf1 = cpu_to_le32(addr);188			ptr->len1 = cpu_to_le16(len);189			ptr++;190		} else {191			ptr->buf0 = cpu_to_le32(addr);192			ptr->len0 = cpu_to_le16(len);193		}194	}195}196EXPORT_SYMBOL_GPL(mt76_connac_write_hw_txp);197 198static void199mt76_connac_txp_skb_unmap_fw(struct mt76_dev *mdev,200			     struct mt76_connac_fw_txp *txp)201{202	struct device *dev = is_connac_v1(mdev) ? mdev->dev : mdev->dma_dev;203	int i;204 205	for (i = 0; i < txp->nbuf; i++)206		dma_unmap_single(dev, le32_to_cpu(txp->buf[i]),207				 le16_to_cpu(txp->len[i]), DMA_TO_DEVICE);208}209 210static void211mt76_connac_txp_skb_unmap_hw(struct mt76_dev *dev,212			     struct mt76_connac_hw_txp *txp)213{214	u32 last_mask;215	int i;216 217	if (is_mt7663(dev) || is_mt7921(dev) || is_mt7925(dev))218		last_mask = MT_TXD_LEN_LAST;219	else220		last_mask = MT_TXD_LEN_MSDU_LAST;221 222	for (i = 0; i < ARRAY_SIZE(txp->ptr); i++) {223		struct mt76_connac_txp_ptr *ptr = &txp->ptr[i];224		bool last;225		u16 len;226 227		len = le16_to_cpu(ptr->len0);228		last = len & last_mask;229		len &= MT_TXD_LEN_MASK;230		dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf0), len,231				 DMA_TO_DEVICE);232		if (last)233			break;234 235		len = le16_to_cpu(ptr->len1);236		last = len & last_mask;237		len &= MT_TXD_LEN_MASK;238		dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf1), len,239				 DMA_TO_DEVICE);240		if (last)241			break;242	}243}244 245void mt76_connac_txp_skb_unmap(struct mt76_dev *dev,246			       struct mt76_txwi_cache *t)247{248	struct mt76_connac_txp_common *txp;249 250	txp = mt76_connac_txwi_to_txp(dev, t);251	if (is_mt76_fw_txp(dev))252		mt76_connac_txp_skb_unmap_fw(dev, &txp->fw);253	else254		mt76_connac_txp_skb_unmap_hw(dev, &txp->hw);255}256EXPORT_SYMBOL_GPL(mt76_connac_txp_skb_unmap);257 258int mt76_connac_init_tx_queues(struct mt76_phy *phy, int idx, int n_desc,259			       int ring_base, void *wed, u32 flags)260{261	int i, err;262 263	err = mt76_init_tx_queue(phy, 0, idx, n_desc, ring_base,264				 wed, flags);265	if (err < 0)266		return err;267 268	for (i = 1; i <= MT_TXQ_PSD; i++)269		phy->q_tx[i] = phy->q_tx[0];270 271	return 0;272}273EXPORT_SYMBOL_GPL(mt76_connac_init_tx_queues);274 275#define __bitrate_mask_check(_mcs, _mode)				\276({									\277	u8 i = 0;							\278	for (nss = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) {	\279		if (!mask->control[band]._mcs[i])			\280			continue;					\281		if (hweight16(mask->control[band]._mcs[i]) == 1) {	\282			mode = MT_PHY_TYPE_##_mode;			\283			rateidx = ffs(mask->control[band]._mcs[i]) - 1;	\284			if (mode == MT_PHY_TYPE_HT)			\285				rateidx += 8 * i;			\286			else						\287				nss = i + 1;				\288			goto out;					\289		}							\290	}								\291})292 293u16 mt76_connac2_mac_tx_rate_val(struct mt76_phy *mphy,294				 struct ieee80211_vif *vif,295				 bool beacon, bool mcast)296{297	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;298	struct cfg80211_chan_def *chandef = mvif->ctx ?299					    &mvif->ctx->def : &mphy->chandef;300	u8 nss = 0, mode = 0, band = chandef->chan->band;301	int rateidx = 0, mcast_rate;302 303	if (!vif)304		goto legacy;305 306	if (is_mt7921(mphy->dev)) {307		rateidx = ffs(vif->bss_conf.basic_rates) - 1;308		goto legacy;309	}310 311	if (beacon) {312		struct cfg80211_bitrate_mask *mask;313 314		mask = &vif->bss_conf.beacon_tx_rate;315 316		__bitrate_mask_check(he_mcs, HE_SU);317		__bitrate_mask_check(vht_mcs, VHT);318		__bitrate_mask_check(ht_mcs, HT);319 320		if (hweight32(mask->control[band].legacy) == 1) {321			rateidx = ffs(mask->control[band].legacy) - 1;322			goto legacy;323		}324	}325 326	mcast_rate = vif->bss_conf.mcast_rate[band];327	if (mcast && mcast_rate > 0)328		rateidx = mcast_rate - 1;329	else330		rateidx = ffs(vif->bss_conf.basic_rates) - 1;331 332legacy:333	rateidx = mt76_calculate_default_rate(mphy, vif, rateidx);334	mode = rateidx >> 8;335	rateidx &= GENMASK(7, 0);336out:337	return FIELD_PREP(MT_TX_RATE_NSS, nss) |338	       FIELD_PREP(MT_TX_RATE_IDX, rateidx) |339	       FIELD_PREP(MT_TX_RATE_MODE, mode);340}341EXPORT_SYMBOL_GPL(mt76_connac2_mac_tx_rate_val);342 343static void344mt76_connac2_mac_write_txwi_8023(__le32 *txwi, struct sk_buff *skb,345				 struct mt76_wcid *wcid)346{347	u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;348	u8 fc_type, fc_stype;349	u16 ethertype;350	bool wmm = false;351	u32 val;352 353	if (wcid->sta) {354		struct ieee80211_sta *sta;355 356		sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv);357		wmm = sta->wme;358	}359 360	val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) |361	      FIELD_PREP(MT_TXD1_TID, tid);362 363	ethertype = get_unaligned_be16(&skb->data[12]);364	if (ethertype >= ETH_P_802_3_MIN)365		val |= MT_TXD1_ETH_802_3;366 367	txwi[1] |= cpu_to_le32(val);368 369	fc_type = IEEE80211_FTYPE_DATA >> 2;370	fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0;371 372	val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |373	      FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);374 375	txwi[2] |= cpu_to_le32(val);376 377	val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |378	      FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);379 380	txwi[7] |= cpu_to_le32(val);381}382 383static void384mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi,385				  struct sk_buff *skb,386				  struct ieee80211_key_conf *key)387{388	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;389	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;390	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);391	bool multicast = is_multicast_ether_addr(hdr->addr1);392	u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;393	__le16 fc = hdr->frame_control;394	__le16 sc = hdr->seq_ctrl;395	u8 fc_type, fc_stype;396	u32 val;397 398	if (ieee80211_is_action(fc) &&399	    mgmt->u.action.category == WLAN_CATEGORY_BACK &&400	    mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ) {401		u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);402 403		txwi[5] |= cpu_to_le32(MT_TXD5_ADD_BA);404		tid = (capab >> 2) & IEEE80211_QOS_CTL_TID_MASK;405	} else if (ieee80211_is_back_req(hdr->frame_control)) {406		struct ieee80211_bar *bar = (struct ieee80211_bar *)hdr;407		u16 control = le16_to_cpu(bar->control);408 409		tid = FIELD_GET(IEEE80211_BAR_CTRL_TID_INFO_MASK, control);410	}411 412	val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |413	      FIELD_PREP(MT_TXD1_HDR_INFO,414			 ieee80211_get_hdrlen_from_skb(skb) / 2) |415	      FIELD_PREP(MT_TXD1_TID, tid);416 417	txwi[1] |= cpu_to_le32(val);418 419	fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;420	fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;421 422	val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |423	      FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) |424	      FIELD_PREP(MT_TXD2_MULTICAST, multicast);425 426	if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) &&427	    key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) {428		val |= MT_TXD2_BIP;429		txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME);430	}431 432	if (!ieee80211_is_data(fc) || multicast ||433	    info->flags & IEEE80211_TX_CTL_USE_MINRATE)434		val |= MT_TXD2_FIX_RATE;435 436	if (ieee80211_has_morefrags(fc) && ieee80211_is_first_frag(sc))437		val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_FIRST);438	else if (ieee80211_has_morefrags(fc) && !ieee80211_is_first_frag(sc))439		val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_MID);440	else if (!ieee80211_has_morefrags(fc) && !ieee80211_is_first_frag(sc))441		val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_LAST);442 443	txwi[2] |= cpu_to_le32(val);444 445	if (ieee80211_is_beacon(fc)) {446		txwi[3] &= ~cpu_to_le32(MT_TXD3_SW_POWER_MGMT);447		txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT);448	}449 450	if (info->flags & IEEE80211_TX_CTL_INJECTED) {451		u16 seqno = le16_to_cpu(sc);452 453		if (ieee80211_is_back_req(hdr->frame_control)) {454			struct ieee80211_bar *bar;455 456			bar = (struct ieee80211_bar *)skb->data;457			seqno = le16_to_cpu(bar->start_seq_num);458		}459 460		val = MT_TXD3_SN_VALID |461		      FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));462		txwi[3] |= cpu_to_le32(val);463		txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU);464	}465 466	if (mt76_is_mmio(dev)) {467		val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |468		      FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);469		txwi[7] |= cpu_to_le32(val);470	} else {471		val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) |472		      FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype);473		txwi[8] |= cpu_to_le32(val);474	}475}476 477void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,478				 struct sk_buff *skb, struct mt76_wcid *wcid,479				 struct ieee80211_key_conf *key, int pid,480				 enum mt76_txq_id qid, u32 changed)481{482	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);483	u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2;484	struct ieee80211_vif *vif = info->control.vif;485	struct mt76_phy *mphy = &dev->phy;486	u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0, band_idx = 0;487	u32 val, sz_txd = mt76_is_mmio(dev) ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE;488	bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP;489	bool beacon = !!(changed & (BSS_CHANGED_BEACON |490				    BSS_CHANGED_BEACON_ENABLED));491	bool inband_disc = !!(changed & (BSS_CHANGED_UNSOL_BCAST_PROBE_RESP |492					 BSS_CHANGED_FILS_DISCOVERY));493	bool amsdu_en = wcid->amsdu;494 495	if (vif) {496		struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;497 498		omac_idx = mvif->omac_idx;499		wmm_idx = mvif->wmm_idx;500		band_idx = mvif->band_idx;501	}502 503	if (phy_idx && dev->phys[MT_BAND1])504		mphy = dev->phys[MT_BAND1];505 506	if (inband_disc) {507		p_fmt = MT_TX_TYPE_FW;508		q_idx = MT_LMAC_ALTX0;509	} else if (beacon) {510		p_fmt = MT_TX_TYPE_FW;511		q_idx = MT_LMAC_BCN0;512	} else if (qid >= MT_TXQ_PSD) {513		p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;514		q_idx = MT_LMAC_ALTX0;515	} else {516		p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;517		q_idx = wmm_idx * MT76_CONNAC_MAX_WMM_SETS +518			mt76_connac_lmac_mapping(skb_get_queue_mapping(skb));519 520		/* mt7915 WA only counts WED path */521		if (is_mt7915(dev) && mtk_wed_device_active(&dev->mmio.wed))522			wcid->stats.tx_packets++;523	}524 525	val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |526	      FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) |527	      FIELD_PREP(MT_TXD0_Q_IDX, q_idx);528	txwi[0] = cpu_to_le32(val);529 530	val = MT_TXD1_LONG_FORMAT |531	      FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |532	      FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);533	if (!is_mt7921(dev))534		val |= MT_TXD1_VTA;535	if (phy_idx || band_idx)536		val |= MT_TXD1_TGID;537 538	txwi[1] = cpu_to_le32(val);539	txwi[2] = 0;540 541	val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15);542	if (!is_mt7921(dev))543		val |= MT_TXD3_SW_POWER_MGMT;544	if (key)545		val |= MT_TXD3_PROTECT_FRAME;546	if (info->flags & IEEE80211_TX_CTL_NO_ACK)547		val |= MT_TXD3_NO_ACK;548 549	txwi[3] = cpu_to_le32(val);550	txwi[4] = 0;551 552	val = FIELD_PREP(MT_TXD5_PID, pid);553	if (pid >= MT_PACKET_ID_FIRST) {554		val |= MT_TXD5_TX_STATUS_HOST;555		amsdu_en = 0;556	}557 558	txwi[5] = cpu_to_le32(val);559	txwi[6] = 0;560	txwi[7] = amsdu_en ? cpu_to_le32(MT_TXD7_HW_AMSDU) : 0;561 562	if (is_8023)563		mt76_connac2_mac_write_txwi_8023(txwi, skb, wcid);564	else565		mt76_connac2_mac_write_txwi_80211(dev, txwi, skb, key);566 567	if (txwi[2] & cpu_to_le32(MT_TXD2_FIX_RATE)) {568		/* Fixed rata is available just for 802.11 txd */569		struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;570		bool multicast = ieee80211_is_data(hdr->frame_control) &&571				 is_multicast_ether_addr(hdr->addr1);572		u16 rate = mt76_connac2_mac_tx_rate_val(mphy, vif, beacon,573							multicast);574		u32 val = MT_TXD6_FIXED_BW;575 576		/* hardware won't add HTC for mgmt/ctrl frame */577		txwi[2] |= cpu_to_le32(MT_TXD2_HTC_VLD);578 579		val |= FIELD_PREP(MT_TXD6_TX_RATE, rate);580		txwi[6] |= cpu_to_le32(val);581		txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE);582 583		if (!is_mt7921(dev)) {584			u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask);585 586			if (!spe_idx)587				spe_idx = 24 + phy_idx;588			txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, spe_idx));589		}590 591		txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU);592	}593}594EXPORT_SYMBOL_GPL(mt76_connac2_mac_write_txwi);595 596bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid,597			       __le32 *txs_data)598{599	struct mt76_sta_stats *stats = &wcid->stats;600	struct ieee80211_supported_band *sband;601	struct mt76_phy *mphy;602	struct rate_info rate = {};603	bool cck = false;604	u32 txrate, txs, mode, stbc;605 606	txs = le32_to_cpu(txs_data[0]);607 608	/* PPDU based reporting */609	if (mtk_wed_device_active(&dev->mmio.wed) &&610	    FIELD_GET(MT_TXS0_TXS_FORMAT, txs) > 1) {611		stats->tx_bytes +=612			le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_BYTE) -613			le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_BYTE);614		stats->tx_failed +=615			le32_get_bits(txs_data[6], MT_TXS6_MPDU_FAIL_CNT);616		stats->tx_retries +=617			le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_CNT);618 619		if (wcid->sta) {620			struct ieee80211_sta *sta;621			u8 tid;622 623			sta = container_of((void *)wcid, struct ieee80211_sta,624					   drv_priv);625			tid = FIELD_GET(MT_TXS0_TID, txs);626 627			ieee80211_refresh_tx_agg_session_timer(sta, tid);628		}629	}630 631	txrate = FIELD_GET(MT_TXS0_TX_RATE, txs);632 633	rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate);634	rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1;635	stbc = FIELD_GET(MT_TX_RATE_STBC, txrate);636 637	if (stbc && rate.nss > 1)638		rate.nss >>= 1;639 640	if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss))641		stats->tx_nss[rate.nss - 1]++;642	if (rate.mcs < ARRAY_SIZE(stats->tx_mcs))643		stats->tx_mcs[rate.mcs]++;644 645	mode = FIELD_GET(MT_TX_RATE_MODE, txrate);646	switch (mode) {647	case MT_PHY_TYPE_CCK:648		cck = true;649		fallthrough;650	case MT_PHY_TYPE_OFDM:651		mphy = &dev->phy;652		if (wcid->phy_idx == MT_BAND1 && dev->phys[MT_BAND1])653			mphy = dev->phys[MT_BAND1];654 655		if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)656			sband = &mphy->sband_5g.sband;657		else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ)658			sband = &mphy->sband_6g.sband;659		else660			sband = &mphy->sband_2g.sband;661 662		rate.mcs = mt76_get_rate(mphy->dev, sband, rate.mcs, cck);663		rate.legacy = sband->bitrates[rate.mcs].bitrate;664		break;665	case MT_PHY_TYPE_HT:666	case MT_PHY_TYPE_HT_GF:667		if (rate.mcs > 31)668			return false;669 670		rate.flags = RATE_INFO_FLAGS_MCS;671		if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI)672			rate.flags |= RATE_INFO_FLAGS_SHORT_GI;673		break;674	case MT_PHY_TYPE_VHT:675		if (rate.mcs > 9)676			return false;677 678		rate.flags = RATE_INFO_FLAGS_VHT_MCS;679		break;680	case MT_PHY_TYPE_HE_SU:681	case MT_PHY_TYPE_HE_EXT_SU:682	case MT_PHY_TYPE_HE_TB:683	case MT_PHY_TYPE_HE_MU:684		if (rate.mcs > 11)685			return false;686 687		rate.he_gi = wcid->rate.he_gi;688		rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate);689		rate.flags = RATE_INFO_FLAGS_HE_MCS;690		break;691	default:692		return false;693	}694 695	stats->tx_mode[mode]++;696 697	switch (FIELD_GET(MT_TXS0_BW, txs)) {698	case IEEE80211_STA_RX_BW_160:699		rate.bw = RATE_INFO_BW_160;700		stats->tx_bw[3]++;701		break;702	case IEEE80211_STA_RX_BW_80:703		rate.bw = RATE_INFO_BW_80;704		stats->tx_bw[2]++;705		break;706	case IEEE80211_STA_RX_BW_40:707		rate.bw = RATE_INFO_BW_40;708		stats->tx_bw[1]++;709		break;710	default:711		rate.bw = RATE_INFO_BW_20;712		stats->tx_bw[0]++;713		break;714	}715	wcid->rate = rate;716 717	return true;718}719EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_txs);720 721bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid,722				  int pid, __le32 *txs_data)723{724	struct sk_buff_head list;725	struct sk_buff *skb;726 727	if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) == MT_TXS_PPDU_FMT)728		return false;729 730	mt76_tx_status_lock(dev, &list);731	skb = mt76_tx_status_skb_get(dev, wcid, pid, &list);732	if (skb) {733		struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);734 735		if (!(le32_to_cpu(txs_data[0]) & MT_TXS0_ACK_ERROR_MASK))736			info->flags |= IEEE80211_TX_STAT_ACK;737 738		info->status.ampdu_len = 1;739		info->status.ampdu_ack_len =740			!!(info->flags & IEEE80211_TX_STAT_ACK);741		info->status.rates[0].idx = -1;742 743		mt76_connac2_mac_fill_txs(dev, wcid, txs_data);744		mt76_tx_status_skb_done(dev, skb, &list);745	}746	mt76_tx_status_unlock(dev, &list);747 748	return !!skb;749}750EXPORT_SYMBOL_GPL(mt76_connac2_mac_add_txs_skb);751 752static void753mt76_connac2_mac_decode_he_radiotap_ru(struct mt76_rx_status *status,754				       struct ieee80211_radiotap_he *he,755				       __le32 *rxv)756{757	u32 ru_h, ru_l;758	u8 ru, offs = 0;759 760	ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L);761	ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H);762	ru = (u8)(ru_l | ru_h << 4);763 764	status->bw = RATE_INFO_BW_HE_RU;765 766	switch (ru) {767	case 0 ... 36:768		status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_26;769		offs = ru;770		break;771	case 37 ... 52:772		status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_52;773		offs = ru - 37;774		break;775	case 53 ... 60:776		status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_106;777		offs = ru - 53;778		break;779	case 61 ... 64:780		status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_242;781		offs = ru - 61;782		break;783	case 65 ... 66:784		status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_484;785		offs = ru - 65;786		break;787	case 67:788		status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_996;789		break;790	case 68:791		status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_2x996;792		break;793	}794 795	he->data1 |= HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);796	he->data2 |= HE_BITS(DATA2_RU_OFFSET_KNOWN) |797		     le16_encode_bits(offs,798				      IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET);799}800 801static void802mt76_connac2_mac_decode_he_mu_radiotap(struct mt76_dev *dev, struct sk_buff *skb,803				       __le32 *rxv)804{805	struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;806	static struct ieee80211_radiotap_he_mu mu_known = {807		.flags1 = HE_BITS(MU_FLAGS1_SIG_B_MCS_KNOWN) |808			  HE_BITS(MU_FLAGS1_SIG_B_DCM_KNOWN) |809			  HE_BITS(MU_FLAGS1_CH1_RU_KNOWN) |810			  HE_BITS(MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN),811		.flags2 = HE_BITS(MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN),812	};813	struct ieee80211_radiotap_he_mu *he_mu;814 815	if (is_mt7921(dev)) {816		mu_known.flags1 |= HE_BITS(MU_FLAGS1_SIG_B_COMP_KNOWN);817		mu_known.flags2 |= HE_BITS(MU_FLAGS2_PUNC_FROM_SIG_A_BW_KNOWN);818	}819 820	status->flag |= RX_FLAG_RADIOTAP_HE_MU;821 822	he_mu = skb_push(skb, sizeof(mu_known));823	memcpy(he_mu, &mu_known, sizeof(mu_known));824 825#define MU_PREP(f, v)	le16_encode_bits(v, IEEE80211_RADIOTAP_HE_MU_##f)826 827	he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_MCS, status->rate_idx);828	if (status->he_dcm)829		he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_DCM, status->he_dcm);830 831	he_mu->flags2 |= MU_PREP(FLAGS2_BW_FROM_SIG_A_BW, status->bw) |832			 MU_PREP(FLAGS2_SIG_B_SYMS_USERS,833				 le32_get_bits(rxv[2], MT_CRXV_HE_NUM_USER));834 835	he_mu->ru_ch1[0] = le32_get_bits(rxv[3], MT_CRXV_HE_RU0);836 837	if (status->bw >= RATE_INFO_BW_40) {838		he_mu->flags1 |= HE_BITS(MU_FLAGS1_CH2_RU_KNOWN);839		he_mu->ru_ch2[0] =840			le32_get_bits(rxv[3], MT_CRXV_HE_RU1);841	}842 843	if (status->bw >= RATE_INFO_BW_80) {844		he_mu->ru_ch1[1] =845			le32_get_bits(rxv[3], MT_CRXV_HE_RU2);846		he_mu->ru_ch2[1] =847			le32_get_bits(rxv[3], MT_CRXV_HE_RU3);848	}849}850 851void mt76_connac2_mac_decode_he_radiotap(struct mt76_dev *dev,852					 struct sk_buff *skb,853					 __le32 *rxv, u32 mode)854{855	struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;856	static const struct ieee80211_radiotap_he known = {857		.data1 = HE_BITS(DATA1_DATA_MCS_KNOWN) |858			 HE_BITS(DATA1_DATA_DCM_KNOWN) |859			 HE_BITS(DATA1_STBC_KNOWN) |860			 HE_BITS(DATA1_CODING_KNOWN) |861			 HE_BITS(DATA1_LDPC_XSYMSEG_KNOWN) |862			 HE_BITS(DATA1_DOPPLER_KNOWN) |863			 HE_BITS(DATA1_SPTL_REUSE_KNOWN) |864			 HE_BITS(DATA1_BSS_COLOR_KNOWN),865		.data2 = HE_BITS(DATA2_GI_KNOWN) |866			 HE_BITS(DATA2_TXBF_KNOWN) |867			 HE_BITS(DATA2_PE_DISAMBIG_KNOWN) |868			 HE_BITS(DATA2_TXOP_KNOWN),869	};870	u32 ltf_size = le32_get_bits(rxv[2], MT_CRXV_HE_LTF_SIZE) + 1;871	struct ieee80211_radiotap_he *he;872 873	status->flag |= RX_FLAG_RADIOTAP_HE;874 875	he = skb_push(skb, sizeof(known));876	memcpy(he, &known, sizeof(known));877 878	he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[14]) |879		    HE_PREP(DATA3_LDPC_XSYMSEG, LDPC_EXT_SYM, rxv[2]);880	he->data4 = HE_PREP(DATA4_SU_MU_SPTL_REUSE, SR_MASK, rxv[11]);881	he->data5 = HE_PREP(DATA5_PE_DISAMBIG, PE_DISAMBIG, rxv[2]) |882		    le16_encode_bits(ltf_size,883				     IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE);884	if (le32_to_cpu(rxv[0]) & MT_PRXV_TXBF)885		he->data5 |= HE_BITS(DATA5_TXBF);886	he->data6 = HE_PREP(DATA6_TXOP, TXOP_DUR, rxv[14]) |887		    HE_PREP(DATA6_DOPPLER, DOPPLER, rxv[14]);888 889	switch (mode) {890	case MT_PHY_TYPE_HE_SU:891		he->data1 |= HE_BITS(DATA1_FORMAT_SU) |892			     HE_BITS(DATA1_UL_DL_KNOWN) |893			     HE_BITS(DATA1_BEAM_CHANGE_KNOWN) |894			     HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);895 896		he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) |897			     HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);898		break;899	case MT_PHY_TYPE_HE_EXT_SU:900		he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) |901			     HE_BITS(DATA1_UL_DL_KNOWN) |902			     HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);903 904		he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);905		break;906	case MT_PHY_TYPE_HE_MU:907		he->data1 |= HE_BITS(DATA1_FORMAT_MU) |908			     HE_BITS(DATA1_UL_DL_KNOWN);909 910		he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);911		he->data4 |= HE_PREP(DATA4_MU_STA_ID, MU_AID, rxv[7]);912 913		mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv);914		mt76_connac2_mac_decode_he_mu_radiotap(dev, skb, rxv);915		break;916	case MT_PHY_TYPE_HE_TB:917		he->data1 |= HE_BITS(DATA1_FORMAT_TRIG) |918			     HE_BITS(DATA1_SPTL_REUSE2_KNOWN) |919			     HE_BITS(DATA1_SPTL_REUSE3_KNOWN) |920			     HE_BITS(DATA1_SPTL_REUSE4_KNOWN);921 922		he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE1, SR_MASK, rxv[11]) |923			     HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) |924			     HE_PREP(DATA4_TB_SPTL_REUSE3, SR2_MASK, rxv[11]) |925			     HE_PREP(DATA4_TB_SPTL_REUSE4, SR3_MASK, rxv[11]);926 927		mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv);928		break;929	default:930		break;931	}932}933EXPORT_SYMBOL_GPL(mt76_connac2_mac_decode_he_radiotap);934 935/* The HW does not translate the mac header to 802.3 for mesh point */936int mt76_connac2_reverse_frag0_hdr_trans(struct ieee80211_vif *vif,937					 struct sk_buff *skb, u16 hdr_offset)938{939	struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;940	struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_offset);941	__le32 *rxd = (__le32 *)skb->data;942	struct ieee80211_sta *sta;943	struct ieee80211_hdr hdr;944	u16 frame_control;945 946	if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) !=947	    MT_RXD3_NORMAL_U2M)948		return -EINVAL;949 950	if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4))951		return -EINVAL;952 953	sta = container_of((void *)status->wcid, struct ieee80211_sta, drv_priv);954 955	/* store the info from RXD and ethhdr to avoid being overridden */956	frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL);957	hdr.frame_control = cpu_to_le16(frame_control);958	hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL));959	hdr.duration_id = 0;960 961	ether_addr_copy(hdr.addr1, vif->addr);962	ether_addr_copy(hdr.addr2, sta->addr);963	switch (frame_control & (IEEE80211_FCTL_TODS |964				 IEEE80211_FCTL_FROMDS)) {965	case 0:966		ether_addr_copy(hdr.addr3, vif->bss_conf.bssid);967		break;968	case IEEE80211_FCTL_FROMDS:969		ether_addr_copy(hdr.addr3, eth_hdr->h_source);970		break;971	case IEEE80211_FCTL_TODS:972		ether_addr_copy(hdr.addr3, eth_hdr->h_dest);973		break;974	case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS:975		ether_addr_copy(hdr.addr3, eth_hdr->h_dest);976		ether_addr_copy(hdr.addr4, eth_hdr->h_source);977		break;978	default:979		return -EINVAL;980	}981 982	skb_pull(skb, hdr_offset + sizeof(struct ethhdr) - 2);983	if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) ||984	    eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX))985		ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header);986	else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN)987		ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header);988	else989		skb_pull(skb, 2);990 991	if (ieee80211_has_order(hdr.frame_control))992		memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9],993		       IEEE80211_HT_CTL_LEN);994	if (ieee80211_is_data_qos(hdr.frame_control)) {995		__le16 qos_ctrl;996 997		qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL));998		memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl,999		       IEEE80211_QOS_CTL_LEN);1000	}1001 1002	if (ieee80211_has_a4(hdr.frame_control))1003		memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));1004	else1005		memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6);1006 1007	return 0;1008}1009EXPORT_SYMBOL_GPL(mt76_connac2_reverse_frag0_hdr_trans);1010 1011int mt76_connac2_mac_fill_rx_rate(struct mt76_dev *dev,1012				  struct mt76_rx_status *status,1013				  struct ieee80211_supported_band *sband,1014				  __le32 *rxv, u8 *mode)1015{1016	u32 v0, v2;1017	u8 stbc, gi, bw, dcm, nss;1018	int i, idx;1019	bool cck = false;1020 1021	v0 = le32_to_cpu(rxv[0]);1022	v2 = le32_to_cpu(rxv[2]);1023 1024	idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0);1025	nss = FIELD_GET(MT_PRXV_NSTS, v0) + 1;1026 1027	if (!is_mt7915(dev)) {1028		stbc = FIELD_GET(MT_PRXV_HT_STBC, v0);1029		gi = FIELD_GET(MT_PRXV_HT_SGI, v0);1030		*mode = FIELD_GET(MT_PRXV_TX_MODE, v0);1031		if (is_mt7921(dev))1032			dcm = !!(idx & MT_PRXV_TX_DCM);1033		else1034			dcm = FIELD_GET(MT_PRXV_DCM, v0);1035		bw = FIELD_GET(MT_PRXV_FRAME_MODE, v0);1036	} else {1037		stbc = FIELD_GET(MT_CRXV_HT_STBC, v2);1038		gi = FIELD_GET(MT_CRXV_HT_SHORT_GI, v2);1039		*mode = FIELD_GET(MT_CRXV_TX_MODE, v2);1040		dcm = !!(idx & GENMASK(3, 0) & MT_PRXV_TX_DCM);1041		bw = FIELD_GET(MT_CRXV_FRAME_MODE, v2);1042	}1043 1044	switch (*mode) {1045	case MT_PHY_TYPE_CCK:1046		cck = true;1047		fallthrough;1048	case MT_PHY_TYPE_OFDM:1049		i = mt76_get_rate(dev, sband, i, cck);1050		break;1051	case MT_PHY_TYPE_HT_GF:1052	case MT_PHY_TYPE_HT:1053		status->encoding = RX_ENC_HT;1054		if (gi)1055			status->enc_flags |= RX_ENC_FLAG_SHORT_GI;1056		if (i > 31)1057			return -EINVAL;1058		break;1059	case MT_PHY_TYPE_VHT:1060		status->nss = nss;1061		status->encoding = RX_ENC_VHT;1062		if (gi)1063			status->enc_flags |= RX_ENC_FLAG_SHORT_GI;1064		if (i > 11)1065			return -EINVAL;1066		break;1067	case MT_PHY_TYPE_HE_MU:1068	case MT_PHY_TYPE_HE_SU:1069	case MT_PHY_TYPE_HE_EXT_SU:1070	case MT_PHY_TYPE_HE_TB:1071		status->nss = nss;1072		status->encoding = RX_ENC_HE;1073		i &= GENMASK(3, 0);1074 1075		if (gi <= NL80211_RATE_INFO_HE_GI_3_2)1076			status->he_gi = gi;1077 1078		status->he_dcm = dcm;1079		break;1080	default:1081		return -EINVAL;1082	}1083	status->rate_idx = i;1084 1085	switch (bw) {1086	case IEEE80211_STA_RX_BW_20:1087		break;1088	case IEEE80211_STA_RX_BW_40:1089		if (*mode & MT_PHY_TYPE_HE_EXT_SU &&1090		    (idx & MT_PRXV_TX_ER_SU_106T)) {1091			status->bw = RATE_INFO_BW_HE_RU;1092			status->he_ru =1093				NL80211_RATE_INFO_HE_RU_ALLOC_106;1094		} else {1095			status->bw = RATE_INFO_BW_40;1096		}1097		break;1098	case IEEE80211_STA_RX_BW_80:1099		status->bw = RATE_INFO_BW_80;1100		break;1101	case IEEE80211_STA_RX_BW_160:1102		status->bw = RATE_INFO_BW_160;1103		break;1104	default:1105		return -EINVAL;1106	}1107 1108	status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;1109	if (*mode < MT_PHY_TYPE_HE_SU && gi)1110		status->enc_flags |= RX_ENC_FLAG_SHORT_GI;1111 1112	return 0;1113}1114EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_rx_rate);1115 1116void mt76_connac2_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi)1117{1118	struct mt76_wcid *wcid;1119	u16 fc, tid;1120	u32 val;1121 1122	if (!sta ||1123	    !(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))1124		return;1125 1126	tid = le32_get_bits(txwi[1], MT_TXD1_TID);1127	if (tid >= 6) /* skip VO queue */1128		return;1129 1130	val = le32_to_cpu(txwi[2]);1131	fc = FIELD_GET(MT_TXD2_FRAME_TYPE, val) << 2 |1132	     FIELD_GET(MT_TXD2_SUB_TYPE, val) << 4;1133	if (unlikely(fc != (IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA)))1134		return;1135 1136	wcid = (struct mt76_wcid *)sta->drv_priv;1137	if (!test_and_set_bit(tid, &wcid->ampdu_state))1138		ieee80211_start_tx_ba_session(sta, tid, 0);1139}1140EXPORT_SYMBOL_GPL(mt76_connac2_tx_check_aggr);1141 1142void mt76_connac2_txwi_free(struct mt76_dev *dev, struct mt76_txwi_cache *t,1143			    struct ieee80211_sta *sta,1144			    struct list_head *free_list)1145{1146	struct mt76_wcid *wcid;1147	__le32 *txwi;1148	u16 wcid_idx;1149 1150	mt76_connac_txp_skb_unmap(dev, t);1151	if (!t->skb)1152		goto out;1153 1154	txwi = (__le32 *)mt76_get_txwi_ptr(dev, t);1155	if (sta) {1156		wcid = (struct mt76_wcid *)sta->drv_priv;1157		wcid_idx = wcid->idx;1158	} else {1159		wcid_idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX);1160		wcid = rcu_dereference(dev->wcid[wcid_idx]);1161 1162		if (wcid && wcid->sta) {1163			sta = container_of((void *)wcid, struct ieee80211_sta,1164					   drv_priv);1165			spin_lock_bh(&dev->sta_poll_lock);1166			if (list_empty(&wcid->poll_list))1167				list_add_tail(&wcid->poll_list,1168					      &dev->sta_poll_list);1169			spin_unlock_bh(&dev->sta_poll_lock);1170		}1171	}1172 1173	if (sta && likely(t->skb->protocol != cpu_to_be16(ETH_P_PAE)))1174		mt76_connac2_tx_check_aggr(sta, txwi);1175 1176	__mt76_tx_complete_skb(dev, wcid_idx, t->skb, free_list);1177out:1178	t->skb = NULL;1179	mt76_put_txwi(dev, t);1180}1181EXPORT_SYMBOL_GPL(mt76_connac2_txwi_free);1182 1183void mt76_connac2_tx_token_put(struct mt76_dev *dev)1184{1185	struct mt76_txwi_cache *txwi;1186	int id;1187 1188	spin_lock_bh(&dev->token_lock);1189	idr_for_each_entry(&dev->token, txwi, id) {1190		mt76_connac2_txwi_free(dev, txwi, NULL, NULL);1191		dev->token_count--;1192	}1193	spin_unlock_bh(&dev->token_lock);1194	idr_destroy(&dev->token);1195}1196EXPORT_SYMBOL_GPL(mt76_connac2_tx_token_put);1197