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1/* SPDX-License-Identifier: ISC */2/* Copyright (C) 2020 MediaTek Inc. */3 4#ifndef __MT76_CONNAC_MCU_H5#define __MT76_CONNAC_MCU_H6 7#include "mt76_connac.h"8 9#define FW_FEATURE_SET_ENCRYPT BIT(0)10#define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1)11#define FW_FEATURE_ENCRY_MODE BIT(4)12#define FW_FEATURE_OVERRIDE_ADDR BIT(5)13#define FW_FEATURE_NON_DL BIT(6)14 15#define DL_MODE_ENCRYPT BIT(0)16#define DL_MODE_KEY_IDX GENMASK(2, 1)17#define DL_MODE_RESET_SEC_IV BIT(3)18#define DL_MODE_WORKING_PDA_CR4 BIT(4)19#define DL_MODE_VALID_RAM_ENTRY BIT(5)20#define DL_CONFIG_ENCRY_MODE_SEL BIT(6)21#define DL_MODE_NEED_RSP BIT(31)22 23#define FW_START_OVERRIDE BIT(0)24#define FW_START_WORKING_PDA_CR4 BIT(2)25#define FW_START_WORKING_PDA_DSP BIT(3)26 27#define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0)28#define PATCH_SEC_TYPE_MASK GENMASK(15, 0)29#define PATCH_SEC_TYPE_INFO 0x230 31#define PATCH_SEC_ENC_TYPE_MASK GENMASK(31, 24)32#define PATCH_SEC_ENC_TYPE_PLAIN 0x0033#define PATCH_SEC_ENC_TYPE_AES 0x0134#define PATCH_SEC_ENC_TYPE_SCRAMBLE 0x0235#define PATCH_SEC_ENC_SCRAMBLE_INFO_MASK GENMASK(15, 0)36#define PATCH_SEC_ENC_AES_KEY_MASK GENMASK(7, 0)37 38enum {39 FW_TYPE_DEFAULT = 0,40 FW_TYPE_CLC = 2,41 FW_TYPE_MAX_NUM = 25542};43 44#define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10))45#define MCU_PKT_ID 0xa046 47struct mt76_connac2_mcu_txd {48 __le32 txd[8];49 50 __le16 len;51 __le16 pq_id;52 53 u8 cid;54 u8 pkt_type;55 u8 set_query; /* FW don't care */56 u8 seq;57 58 u8 uc_d2b0_rev;59 u8 ext_cid;60 u8 s2d_index;61 u8 ext_cid_ack;62 63 u32 rsv[5];64} __packed __aligned(4);65 66/**67 * struct mt76_connac2_mcu_uni_txd - mcu command descriptor for connac2 and connac368 * @txd: hardware descriptor69 * @len: total length not including txd70 * @cid: command identifier71 * @pkt_type: must be 0xa0 (cmd packet by long format)72 * @frag_n: fragment number73 * @seq: sequence number74 * @checksum: 0 mean there is no checksum75 * @s2d_index: index for command source and destination76 * Definition | value | note77 * CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM78 * CMD_S2D_IDX_C2N | 0x01 | command from WA to WM79 * CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA80 * CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM81 *82 * @option: command option83 * BIT[0]: UNI_CMD_OPT_BIT_ACK84 * set to 1 to request a fw reply85 * if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY86 * is set, mcu firmware will send response event EID = 0x0187 * (UNI_EVENT_ID_CMD_RESULT) to the host.88 * BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD89 * 0: original command90 * 1: unified command91 * BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY92 * 0: QUERY command93 * 1: SET command94 */95struct mt76_connac2_mcu_uni_txd {96 __le32 txd[8];97 98 /* DW1 */99 __le16 len;100 __le16 cid;101 102 /* DW2 */103 u8 rsv;104 u8 pkt_type;105 u8 frag_n;106 u8 seq;107 108 /* DW3 */109 __le16 checksum;110 u8 s2d_index;111 u8 option;112 113 /* DW4 */114 u8 rsv1[4];115} __packed __aligned(4);116 117struct mt76_connac2_mcu_rxd {118 /* New members MUST be added within the struct_group() macro below. */119 struct_group_tagged(mt76_connac2_mcu_rxd_hdr, hdr,120 __le32 rxd[6];121 122 __le16 len;123 __le16 pkt_type_id;124 125 u8 eid;126 u8 seq;127 u8 option;128 u8 rsv;129 u8 ext_eid;130 u8 rsv1[2];131 u8 s2d_index;132 );133 134 u8 tlv[];135};136static_assert(offsetof(struct mt76_connac2_mcu_rxd, tlv) == sizeof(struct mt76_connac2_mcu_rxd_hdr),137 "struct member likely outside of struct_group_tagged()");138 139struct mt76_connac2_patch_hdr {140 char build_date[16];141 char platform[4];142 __be32 hw_sw_ver;143 __be32 patch_ver;144 __be16 checksum;145 u16 rsv;146 struct {147 __be32 patch_ver;148 __be32 subsys;149 __be32 feature;150 __be32 n_region;151 __be32 crc;152 u32 rsv[11];153 } desc;154} __packed;155 156struct mt76_connac2_patch_sec {157 __be32 type;158 __be32 offs;159 __be32 size;160 union {161 __be32 spec[13];162 struct {163 __be32 addr;164 __be32 len;165 __be32 sec_key_idx;166 __be32 align_len;167 u32 rsv[9];168 } info;169 };170} __packed;171 172struct mt76_connac2_fw_trailer {173 u8 chip_id;174 u8 eco_code;175 u8 n_region;176 u8 format_ver;177 u8 format_flag;178 u8 rsv[2];179 char fw_ver[10];180 char build_date[15];181 __le32 crc;182} __packed;183 184struct mt76_connac2_fw_region {185 __le32 decomp_crc;186 __le32 decomp_len;187 __le32 decomp_blk_sz;188 u8 rsv[4];189 __le32 addr;190 __le32 len;191 u8 feature_set;192 u8 type;193 u8 rsv1[14];194} __packed;195 196struct tlv {197 __le16 tag;198 __le16 len;199 u8 data[];200} __packed;201 202struct bss_info_omac {203 __le16 tag;204 __le16 len;205 u8 hw_bss_idx;206 u8 omac_idx;207 u8 band_idx;208 u8 rsv0;209 __le32 conn_type;210 u32 rsv1;211} __packed;212 213struct bss_info_basic {214 __le16 tag;215 __le16 len;216 __le32 network_type;217 u8 active;218 u8 rsv0;219 __le16 bcn_interval;220 u8 bssid[ETH_ALEN];221 u8 wmm_idx;222 u8 dtim_period;223 u8 bmc_wcid_lo;224 u8 cipher;225 u8 phy_mode;226 u8 max_bssid; /* max BSSID. range: 1 ~ 8, 0: MBSSID disabled */227 u8 non_tx_bssid;/* non-transmitted BSSID, 0: transmitted BSSID */228 u8 bmc_wcid_hi; /* high Byte and version */229 u8 rsv[2];230} __packed;231 232struct bss_info_rf_ch {233 __le16 tag;234 __le16 len;235 u8 pri_ch;236 u8 center_ch0;237 u8 center_ch1;238 u8 bw;239 u8 he_ru26_block; /* 1: don't send HETB in RU26, 0: allow */240 u8 he_all_disable; /* 1: disallow all HETB, 0: allow */241 u8 rsv[2];242} __packed;243 244struct bss_info_ext_bss {245 __le16 tag;246 __le16 len;247 __le32 mbss_tsf_offset; /* in unit of us */248 u8 rsv[8];249} __packed;250 251enum {252 BSS_INFO_OMAC,253 BSS_INFO_BASIC,254 BSS_INFO_RF_CH, /* optional, for BT/LTE coex */255 BSS_INFO_PM, /* sta only */256 BSS_INFO_UAPSD, /* sta only */257 BSS_INFO_ROAM_DETECT, /* obsoleted */258 BSS_INFO_LQ_RM, /* obsoleted */259 BSS_INFO_EXT_BSS,260 BSS_INFO_BMC_RATE, /* for bmc rate control in CR4 */261 BSS_INFO_SYNC_MODE, /* obsoleted */262 BSS_INFO_RA,263 BSS_INFO_HW_AMSDU,264 BSS_INFO_BSS_COLOR,265 BSS_INFO_HE_BASIC,266 BSS_INFO_PROTECT_INFO,267 BSS_INFO_OFFLOAD,268 BSS_INFO_11V_MBSSID,269 BSS_INFO_MAX_NUM270};271 272/* sta_rec */273 274struct sta_ntlv_hdr {275 u8 rsv[2];276 __le16 tlv_num;277} __packed;278 279struct sta_req_hdr {280 u8 bss_idx;281 u8 wlan_idx_lo;282 __le16 tlv_num;283 u8 is_tlv_append;284 u8 muar_idx;285 u8 wlan_idx_hi;286 u8 rsv;287} __packed;288 289struct sta_rec_basic {290 __le16 tag;291 __le16 len;292 __le32 conn_type;293 u8 conn_state;294 u8 qos;295 __le16 aid;296 u8 peer_addr[ETH_ALEN];297#define EXTRA_INFO_VER BIT(0)298#define EXTRA_INFO_NEW BIT(1)299 __le16 extra_info;300} __packed;301 302struct sta_rec_ht {303 __le16 tag;304 __le16 len;305 __le16 ht_cap;306 u16 rsv;307} __packed;308 309struct sta_rec_vht {310 __le16 tag;311 __le16 len;312 __le32 vht_cap;313 __le16 vht_rx_mcs_map;314 __le16 vht_tx_mcs_map;315 /* mt7915 - mt7921 */316 u8 rts_bw_sig;317 u8 rsv[3];318} __packed;319 320struct sta_rec_uapsd {321 __le16 tag;322 __le16 len;323 u8 dac_map;324 u8 tac_map;325 u8 max_sp;326 u8 rsv0;327 __le16 listen_interval;328 u8 rsv1[2];329} __packed;330 331struct sta_rec_ba {332 __le16 tag;333 __le16 len;334 u8 tid;335 u8 ba_type;336 u8 amsdu;337 u8 ba_en;338 __le16 ssn;339 __le16 winsize;340} __packed;341 342struct sta_rec_he {343 __le16 tag;344 __le16 len;345 346 __le32 he_cap;347 348 u8 t_frame_dur;349 u8 max_ampdu_exp;350 u8 bw_set;351 u8 device_class;352 u8 dcm_tx_mode;353 u8 dcm_tx_max_nss;354 u8 dcm_rx_mode;355 u8 dcm_rx_max_nss;356 u8 dcm_max_ru;357 u8 punc_pream_rx;358 u8 pkt_ext;359 u8 rsv1;360 361 __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM];362 363 u8 rsv2[2];364} __packed;365 366struct sta_rec_he_v2 {367 __le16 tag;368 __le16 len;369 u8 he_mac_cap[6];370 u8 he_phy_cap[11];371 u8 pkt_ext;372 /* 0: BW80, 1: BW160, 2: BW8080 */373 __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM];374} __packed;375 376struct sta_rec_amsdu {377 __le16 tag;378 __le16 len;379 u8 max_amsdu_num;380 u8 max_mpdu_size;381 u8 amsdu_en;382 u8 rsv;383} __packed;384 385struct sta_rec_state {386 __le16 tag;387 __le16 len;388 __le32 flags;389 u8 state;390 u8 vht_opmode;391 u8 action;392 u8 rsv[1];393} __packed;394 395#define RA_LEGACY_OFDM GENMASK(13, 6)396#define RA_LEGACY_CCK GENMASK(3, 0)397#define HT_MCS_MASK_NUM 10398struct sta_rec_ra_info {399 __le16 tag;400 __le16 len;401 __le16 legacy;402 u8 rx_mcs_bitmask[HT_MCS_MASK_NUM];403} __packed;404 405struct sta_rec_phy {406 __le16 tag;407 __le16 len;408 __le16 basic_rate;409 u8 phy_type;410 u8 ampdu;411 u8 rts_policy;412 u8 rcpi;413 u8 max_ampdu_len; /* connac3 */414 u8 rsv[1];415} __packed;416 417struct sta_rec_he_6g_capa {418 __le16 tag;419 __le16 len;420 __le16 capa;421 u8 rsv[2];422} __packed;423 424struct sta_rec_pn_info {425 __le16 tag;426 __le16 len;427 u8 pn[6];428 u8 tsc_type;429 u8 rsv;430} __packed;431 432struct sec_key {433 u8 cipher_id;434 u8 cipher_len;435 u8 key_id;436 u8 key_len;437 u8 key[32];438} __packed;439 440struct sta_rec_sec {441 __le16 tag;442 __le16 len;443 u8 add;444 u8 n_cipher;445 u8 rsv[2];446 447 struct sec_key key[2];448} __packed;449 450struct sta_rec_bf {451 __le16 tag;452 __le16 len;453 454 __le16 pfmu; /* 0xffff: no access right for PFMU */455 bool su_mu; /* 0: SU, 1: MU */456 u8 bf_cap; /* 0: iBF, 1: eBF */457 u8 sounding_phy; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT */458 u8 ndpa_rate;459 u8 ndp_rate;460 u8 rept_poll_rate;461 u8 tx_mode; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT ... */462 u8 ncol;463 u8 nrow;464 u8 bw; /* 0: 20M, 1: 40M, 2: 80M, 3: 160M */465 466 u8 mem_total;467 u8 mem_20m;468 struct {469 u8 row;470 u8 col: 6, row_msb: 2;471 } mem[4];472 473 __le16 smart_ant;474 u8 se_idx;475 u8 auto_sounding; /* b7: low traffic indicator476 * b6: Stop sounding for this entry477 * b5 ~ b0: postpone sounding478 */479 u8 ibf_timeout;480 u8 ibf_dbw;481 u8 ibf_ncol;482 u8 ibf_nrow;483 u8 nrow_gt_bw80;484 u8 ncol_gt_bw80;485 u8 ru_start_idx;486 u8 ru_end_idx;487 488 bool trigger_su;489 bool trigger_mu;490 bool ng16_su;491 bool ng16_mu;492 bool codebook42_su;493 bool codebook75_mu;494 495 u8 he_ltf;496 u8 rsv[3];497} __packed;498 499struct sta_rec_bfee {500 __le16 tag;501 __le16 len;502 bool fb_identity_matrix; /* 1: feedback identity matrix */503 bool ignore_feedback; /* 1: ignore */504 u8 rsv[2];505} __packed;506 507struct sta_rec_muru {508 __le16 tag;509 __le16 len;510 511 struct {512 bool ofdma_dl_en;513 bool ofdma_ul_en;514 bool mimo_dl_en;515 bool mimo_ul_en;516 u8 rsv[4];517 } cfg;518 519 struct {520 u8 punc_pream_rx;521 bool he_20m_in_40m_2g;522 bool he_20m_in_160m;523 bool he_80m_in_160m;524 bool lt16_sigb;525 bool rx_su_comp_sigb;526 bool rx_su_non_comp_sigb;527 u8 rsv;528 } ofdma_dl;529 530 struct {531 u8 t_frame_dur;532 u8 mu_cascading;533 u8 uo_ra;534 u8 he_2x996_tone;535 u8 rx_t_frame_11ac;536 u8 rx_ctrl_frame_to_mbss;537 u8 rsv[2];538 } ofdma_ul;539 540 struct {541 bool vht_mu_bfee;542 bool partial_bw_dl_mimo;543 u8 rsv[2];544 } mimo_dl;545 546 struct {547 bool full_ul_mimo;548 bool partial_ul_mimo;549 u8 rsv[2];550 } mimo_ul;551} __packed;552 553struct sta_rec_remove {554 __le16 tag;555 __le16 len;556 u8 action;557 u8 pad[3];558} __packed;559 560struct sta_phy {561 u8 type;562 u8 flag;563 u8 stbc;564 u8 sgi;565 u8 bw;566 u8 ldpc;567 u8 mcs;568 u8 nss;569 u8 he_ltf;570};571 572struct sta_rec_ra {573 __le16 tag;574 __le16 len;575 576 u8 valid;577 u8 auto_rate;578 u8 phy_mode;579 u8 channel;580 u8 bw;581 u8 disable_cck;582 u8 ht_mcs32;583 u8 ht_gf;584 u8 ht_mcs[4];585 u8 mmps_mode;586 u8 gband_256;587 u8 af;588 u8 auth_wapi_mode;589 u8 rate_len;590 591 u8 supp_mode;592 u8 supp_cck_rate;593 u8 supp_ofdm_rate;594 __le32 supp_ht_mcs;595 __le16 supp_vht_mcs[4];596 597 u8 op_mode;598 u8 op_vht_chan_width;599 u8 op_vht_rx_nss;600 u8 op_vht_rx_nss_type;601 602 __le32 sta_cap;603 604 struct sta_phy phy;605} __packed;606 607struct sta_rec_ra_fixed {608 __le16 tag;609 __le16 len;610 611 __le32 field;612 u8 op_mode;613 u8 op_vht_chan_width;614 u8 op_vht_rx_nss;615 u8 op_vht_rx_nss_type;616 617 struct sta_phy phy;618 619 u8 spe_idx;620 u8 short_preamble;621 u8 is_5g;622 u8 mmps_mode;623} __packed;624 625struct sta_rec_tx_proc {626 __le16 tag;627 __le16 len;628 __le32 flag;629} __packed;630 631/* wtbl_rec */632 633struct wtbl_req_hdr {634 u8 wlan_idx_lo;635 u8 operation;636 __le16 tlv_num;637 u8 wlan_idx_hi;638 u8 rsv[3];639} __packed;640 641struct wtbl_generic {642 __le16 tag;643 __le16 len;644 u8 peer_addr[ETH_ALEN];645 u8 muar_idx;646 u8 skip_tx;647 u8 cf_ack;648 u8 qos;649 u8 mesh;650 u8 adm;651 __le16 partial_aid;652 u8 baf_en;653 u8 aad_om;654} __packed;655 656struct wtbl_rx {657 __le16 tag;658 __le16 len;659 u8 rcid;660 u8 rca1;661 u8 rca2;662 u8 rv;663 u8 rsv[4];664} __packed;665 666struct wtbl_ht {667 __le16 tag;668 __le16 len;669 u8 ht;670 u8 ldpc;671 u8 af;672 u8 mm;673 u8 rsv[4];674} __packed;675 676struct wtbl_vht {677 __le16 tag;678 __le16 len;679 u8 ldpc;680 u8 dyn_bw;681 u8 vht;682 u8 txop_ps;683 u8 rsv[4];684} __packed;685 686struct wtbl_tx_ps {687 __le16 tag;688 __le16 len;689 u8 txps;690 u8 rsv[3];691} __packed;692 693struct wtbl_hdr_trans {694 __le16 tag;695 __le16 len;696 u8 to_ds;697 u8 from_ds;698 u8 no_rx_trans;699 u8 rsv;700} __packed;701 702struct wtbl_ba {703 __le16 tag;704 __le16 len;705 /* common */706 u8 tid;707 u8 ba_type;708 u8 rsv0[2];709 /* originator only */710 __le16 sn;711 u8 ba_en;712 u8 ba_winsize_idx;713 /* originator & recipient */714 __le16 ba_winsize;715 /* recipient only */716 u8 peer_addr[ETH_ALEN];717 u8 rst_ba_tid;718 u8 rst_ba_sel;719 u8 rst_ba_sb;720 u8 band_idx;721 u8 rsv1[4];722} __packed;723 724struct wtbl_smps {725 __le16 tag;726 __le16 len;727 u8 smps;728 u8 rsv[3];729} __packed;730 731/* mt7615 only */732 733struct wtbl_bf {734 __le16 tag;735 __le16 len;736 u8 ibf;737 u8 ebf;738 u8 ibf_vht;739 u8 ebf_vht;740 u8 gid;741 u8 pfmu_idx;742 u8 rsv[2];743} __packed;744 745struct wtbl_pn {746 __le16 tag;747 __le16 len;748 u8 pn[6];749 u8 rsv[2];750} __packed;751 752struct wtbl_spe {753 __le16 tag;754 __le16 len;755 u8 spe_idx;756 u8 rsv[3];757} __packed;758 759struct wtbl_raw {760 __le16 tag;761 __le16 len;762 u8 wtbl_idx;763 u8 dw;764 u8 rsv[2];765 __le32 msk;766 __le32 val;767} __packed;768 769#define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \770 sizeof(struct wtbl_generic) + \771 sizeof(struct wtbl_rx) + \772 sizeof(struct wtbl_ht) + \773 sizeof(struct wtbl_vht) + \774 sizeof(struct wtbl_tx_ps) + \775 sizeof(struct wtbl_hdr_trans) +\776 sizeof(struct wtbl_ba) + \777 sizeof(struct wtbl_bf) + \778 sizeof(struct wtbl_smps) + \779 sizeof(struct wtbl_pn) + \780 sizeof(struct wtbl_spe))781 782#define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \783 sizeof(struct sta_rec_basic) + \784 sizeof(struct sta_rec_bf) + \785 sizeof(struct sta_rec_ht) + \786 sizeof(struct sta_rec_he) + \787 sizeof(struct sta_rec_ba) + \788 sizeof(struct sta_rec_vht) + \789 sizeof(struct sta_rec_uapsd) + \790 sizeof(struct sta_rec_amsdu) + \791 sizeof(struct sta_rec_muru) + \792 sizeof(struct sta_rec_bfee) + \793 sizeof(struct sta_rec_ra) + \794 sizeof(struct sta_rec_sec) + \795 sizeof(struct sta_rec_ra_fixed) + \796 sizeof(struct sta_rec_he_6g_capa) + \797 sizeof(struct sta_rec_pn_info) + \798 sizeof(struct sta_rec_tx_proc) + \799 sizeof(struct tlv) + \800 MT76_CONNAC_WTBL_UPDATE_MAX_SIZE)801 802enum {803 STA_REC_BASIC,804 STA_REC_RA,805 STA_REC_RA_CMM_INFO,806 STA_REC_RA_UPDATE,807 STA_REC_BF,808 STA_REC_AMSDU,809 STA_REC_BA,810 STA_REC_STATE,811 STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */812 STA_REC_HT,813 STA_REC_VHT,814 STA_REC_APPS,815 STA_REC_KEY,816 STA_REC_WTBL,817 STA_REC_HE,818 STA_REC_HW_AMSDU,819 STA_REC_WTBL_AADOM,820 STA_REC_KEY_V2,821 STA_REC_MURU,822 STA_REC_MUEDCA,823 STA_REC_BFEE,824 STA_REC_PHY = 0x15,825 STA_REC_HE_6G = 0x17,826 STA_REC_HE_V2 = 0x19,827 STA_REC_MLD = 0x20,828 STA_REC_EHT_MLD = 0x21,829 STA_REC_EHT = 0x22,830 STA_REC_MLD_OFF = 0x23,831 STA_REC_REMOVE = 0x25,832 STA_REC_PN_INFO = 0x26,833 STA_REC_KEY_V3 = 0x27,834 STA_REC_HDRT = 0x28,835 STA_REC_HDR_TRANS = 0x2B,836 STA_REC_MAX_NUM837};838 839enum {840 WTBL_GENERIC,841 WTBL_RX,842 WTBL_HT,843 WTBL_VHT,844 WTBL_PEER_PS, /* not used */845 WTBL_TX_PS,846 WTBL_HDR_TRANS,847 WTBL_SEC_KEY,848 WTBL_BA,849 WTBL_RDG, /* obsoleted */850 WTBL_PROTECT, /* not used */851 WTBL_CLEAR, /* not used */852 WTBL_BF,853 WTBL_SMPS,854 WTBL_RAW_DATA, /* debug only */855 WTBL_PN,856 WTBL_SPE,857 WTBL_MAX_NUM858};859 860#define STA_TYPE_STA BIT(0)861#define STA_TYPE_AP BIT(1)862#define STA_TYPE_ADHOC BIT(2)863#define STA_TYPE_WDS BIT(4)864#define STA_TYPE_BC BIT(5)865 866#define NETWORK_INFRA BIT(16)867#define NETWORK_P2P BIT(17)868#define NETWORK_IBSS BIT(18)869#define NETWORK_WDS BIT(21)870 871#define SCAN_FUNC_RANDOM_MAC BIT(0)872#define SCAN_FUNC_SPLIT_SCAN BIT(5)873 874#define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA)875#define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA)876#define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P)877#define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P)878#define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS)879#define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS)880#define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA)881 882#define CONN_STATE_DISCONNECT 0883#define CONN_STATE_CONNECT 1884#define CONN_STATE_PORT_SECURE 2885 886/* HE MAC */887#define STA_REC_HE_CAP_HTC BIT(0)888#define STA_REC_HE_CAP_BQR BIT(1)889#define STA_REC_HE_CAP_BSR BIT(2)890#define STA_REC_HE_CAP_OM BIT(3)891#define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4)892/* HE PHY */893#define STA_REC_HE_CAP_DUAL_BAND BIT(5)894#define STA_REC_HE_CAP_LDPC BIT(6)895#define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7)896#define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8)897/* STBC */898#define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9)899#define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10)900#define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11)901#define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12)902/* GI */903#define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13)904#define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14)905#define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15)906#define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16)907#define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17)908/* 242 TONE */909#define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18)910#define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19)911#define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20)912 913#define PHY_MODE_A BIT(0)914#define PHY_MODE_B BIT(1)915#define PHY_MODE_G BIT(2)916#define PHY_MODE_GN BIT(3)917#define PHY_MODE_AN BIT(4)918#define PHY_MODE_AC BIT(5)919#define PHY_MODE_AX_24G BIT(6)920#define PHY_MODE_AX_5G BIT(7)921 922#define PHY_MODE_AX_6G BIT(0) /* phymode_ext */923#define PHY_MODE_BE_24G BIT(1)924#define PHY_MODE_BE_5G BIT(2)925#define PHY_MODE_BE_6G BIT(3)926 927#define MODE_CCK BIT(0)928#define MODE_OFDM BIT(1)929#define MODE_HT BIT(2)930#define MODE_VHT BIT(3)931#define MODE_HE BIT(4)932#define MODE_EHT BIT(5)933 934#define STA_CAP_WMM BIT(0)935#define STA_CAP_SGI_20 BIT(4)936#define STA_CAP_SGI_40 BIT(5)937#define STA_CAP_TX_STBC BIT(6)938#define STA_CAP_RX_STBC BIT(7)939#define STA_CAP_VHT_SGI_80 BIT(16)940#define STA_CAP_VHT_SGI_160 BIT(17)941#define STA_CAP_VHT_TX_STBC BIT(18)942#define STA_CAP_VHT_RX_STBC BIT(19)943#define STA_CAP_VHT_LDPC BIT(23)944#define STA_CAP_LDPC BIT(24)945#define STA_CAP_HT BIT(26)946#define STA_CAP_VHT BIT(27)947#define STA_CAP_HE BIT(28)948 949enum {950 PHY_TYPE_HR_DSSS_INDEX = 0,951 PHY_TYPE_ERP_INDEX,952 PHY_TYPE_ERP_P2P_INDEX,953 PHY_TYPE_OFDM_INDEX,954 PHY_TYPE_HT_INDEX,955 PHY_TYPE_VHT_INDEX,956 PHY_TYPE_HE_INDEX,957 PHY_TYPE_BE_INDEX,958 PHY_TYPE_INDEX_NUM959};960 961#define HR_DSSS_ERP_BASIC_RATE GENMASK(3, 0)962#define OFDM_BASIC_RATE (BIT(6) | BIT(8) | BIT(10))963 964#define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX)965#define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX)966#define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX)967#define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX)968#define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX)969#define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX)970#define PHY_TYPE_BIT_BE BIT(PHY_TYPE_BE_INDEX)971 972#define MT_WTBL_RATE_TX_MODE GENMASK(9, 6)973#define MT_WTBL_RATE_MCS GENMASK(5, 0)974#define MT_WTBL_RATE_NSS GENMASK(12, 10)975#define MT_WTBL_RATE_HE_GI GENMASK(7, 4)976#define MT_WTBL_RATE_GI GENMASK(3, 0)977 978#define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5)979#define MT_WTBL_W5_SHORT_GI_20 BIT(8)980#define MT_WTBL_W5_SHORT_GI_40 BIT(9)981#define MT_WTBL_W5_SHORT_GI_80 BIT(10)982#define MT_WTBL_W5_SHORT_GI_160 BIT(11)983#define MT_WTBL_W5_BW_CAP GENMASK(13, 12)984#define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23)985#define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26)986#define MT_WTBL_W5_RATE_IDX GENMASK(31, 29)987 988enum {989 WTBL_RESET_AND_SET = 1,990 WTBL_SET,991 WTBL_QUERY,992 WTBL_RESET_ALL993};994 995enum {996 MT_BA_TYPE_INVALID,997 MT_BA_TYPE_ORIGINATOR,998 MT_BA_TYPE_RECIPIENT999};1000 1001enum {1002 RST_BA_MAC_TID_MATCH,1003 RST_BA_MAC_MATCH,1004 RST_BA_NO_MATCH1005};1006 1007enum {1008 DEV_INFO_ACTIVE,1009 DEV_INFO_MAX_NUM1010};1011 1012/* event table */1013enum {1014 MCU_EVENT_TARGET_ADDRESS_LEN = 0x01,1015 MCU_EVENT_FW_START = 0x01,1016 MCU_EVENT_GENERIC = 0x01,1017 MCU_EVENT_ACCESS_REG = 0x02,1018 MCU_EVENT_MT_PATCH_SEM = 0x04,1019 MCU_EVENT_REG_ACCESS = 0x05,1020 MCU_EVENT_LP_INFO = 0x07,1021 MCU_EVENT_SCAN_DONE = 0x0d,1022 MCU_EVENT_TX_DONE = 0x0f,1023 MCU_EVENT_ROC = 0x10,1024 MCU_EVENT_BSS_ABSENCE = 0x11,1025 MCU_EVENT_BSS_BEACON_LOSS = 0x13,1026 MCU_EVENT_CH_PRIVILEGE = 0x18,1027 MCU_EVENT_SCHED_SCAN_DONE = 0x23,1028 MCU_EVENT_DBG_MSG = 0x27,1029 MCU_EVENT_RSSI_NOTIFY = 0x96,1030 MCU_EVENT_TXPWR = 0xd0,1031 MCU_EVENT_EXT = 0xed,1032 MCU_EVENT_RESTART_DL = 0xef,1033 MCU_EVENT_COREDUMP = 0xf0,1034};1035 1036/* ext event table */1037enum {1038 MCU_EXT_EVENT_PS_SYNC = 0x5,1039 MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13,1040 MCU_EXT_EVENT_THERMAL_PROTECT = 0x22,1041 MCU_EXT_EVENT_ASSERT_DUMP = 0x23,1042 MCU_EXT_EVENT_RDD_REPORT = 0x3a,1043 MCU_EXT_EVENT_CSA_NOTIFY = 0x4f,1044 MCU_EXT_EVENT_WA_TX_STAT = 0x74,1045 MCU_EXT_EVENT_BCC_NOTIFY = 0x75,1046 MCU_EXT_EVENT_MURU_CTRL = 0x9f,1047};1048 1049/* unified event table */1050enum {1051 MCU_UNI_EVENT_RESULT = 0x01,1052 MCU_UNI_EVENT_FW_LOG_2_HOST = 0x04,1053 MCU_UNI_EVENT_ACCESS_REG = 0x6,1054 MCU_UNI_EVENT_IE_COUNTDOWN = 0x09,1055 MCU_UNI_EVENT_COREDUMP = 0x0a,1056 MCU_UNI_EVENT_BSS_BEACON_LOSS = 0x0c,1057 MCU_UNI_EVENT_SCAN_DONE = 0x0e,1058 MCU_UNI_EVENT_RDD_REPORT = 0x11,1059 MCU_UNI_EVENT_ROC = 0x27,1060 MCU_UNI_EVENT_TX_DONE = 0x2d,1061 MCU_UNI_EVENT_THERMAL = 0x35,1062 MCU_UNI_EVENT_NIC_CAPAB = 0x43,1063 MCU_UNI_EVENT_WED_RRO = 0x57,1064 MCU_UNI_EVENT_PER_STA_INFO = 0x6d,1065 MCU_UNI_EVENT_ALL_STA_INFO = 0x6e,1066};1067 1068#define MCU_UNI_CMD_EVENT BIT(1)1069#define MCU_UNI_CMD_UNSOLICITED_EVENT BIT(2)1070 1071enum {1072 MCU_Q_QUERY,1073 MCU_Q_SET,1074 MCU_Q_RESERVED,1075 MCU_Q_NA1076};1077 1078enum {1079 MCU_S2D_H2N,1080 MCU_S2D_C2N,1081 MCU_S2D_H2C,1082 MCU_S2D_H2CN1083};1084 1085enum {1086 PATCH_NOT_DL_SEM_FAIL,1087 PATCH_IS_DL,1088 PATCH_NOT_DL_SEM_SUCCESS,1089 PATCH_REL_SEM_SUCCESS1090};1091 1092enum {1093 FW_STATE_INITIAL,1094 FW_STATE_FW_DOWNLOAD,1095 FW_STATE_NORMAL_OPERATION,1096 FW_STATE_NORMAL_TRX,1097 FW_STATE_RDY = 71098};1099 1100enum {1101 CH_SWITCH_NORMAL = 0,1102 CH_SWITCH_SCAN = 3,1103 CH_SWITCH_MCC = 4,1104 CH_SWITCH_DFS = 5,1105 CH_SWITCH_BACKGROUND_SCAN_START = 6,1106 CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7,1107 CH_SWITCH_BACKGROUND_SCAN_STOP = 8,1108 CH_SWITCH_SCAN_BYPASS_DPD = 91109};1110 1111enum {1112 THERMAL_SENSOR_TEMP_QUERY,1113 THERMAL_SENSOR_MANUAL_CTRL,1114 THERMAL_SENSOR_INFO_QUERY,1115 THERMAL_SENSOR_TASK_CTRL,1116};1117 1118enum mcu_cipher_type {1119 MCU_CIPHER_NONE = 0,1120 MCU_CIPHER_WEP40,1121 MCU_CIPHER_WEP104,1122 MCU_CIPHER_WEP128,1123 MCU_CIPHER_TKIP,1124 MCU_CIPHER_AES_CCMP,1125 MCU_CIPHER_CCMP_256,1126 MCU_CIPHER_GCMP,1127 MCU_CIPHER_GCMP_256,1128 MCU_CIPHER_WAPI,1129 MCU_CIPHER_BIP_CMAC_128,1130 MCU_CIPHER_BIP_CMAC_256,1131 MCU_CIPHER_BCN_PROT_CMAC_128,1132 MCU_CIPHER_BCN_PROT_CMAC_256,1133 MCU_CIPHER_BCN_PROT_GMAC_128,1134 MCU_CIPHER_BCN_PROT_GMAC_256,1135 MCU_CIPHER_BIP_GMAC_128,1136 MCU_CIPHER_BIP_GMAC_256,1137};1138 1139enum {1140 EE_MODE_EFUSE,1141 EE_MODE_BUFFER,1142};1143 1144enum {1145 EE_FORMAT_BIN,1146 EE_FORMAT_WHOLE,1147 EE_FORMAT_MULTIPLE,1148};1149 1150enum {1151 MCU_PHY_STATE_TX_RATE,1152 MCU_PHY_STATE_RX_RATE,1153 MCU_PHY_STATE_RSSI,1154 MCU_PHY_STATE_CONTENTION_RX_RATE,1155 MCU_PHY_STATE_OFDMLQ_CNINFO,1156};1157 1158#define MCU_CMD_ACK BIT(0)1159#define MCU_CMD_UNI BIT(1)1160#define MCU_CMD_SET BIT(2)1161 1162#define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \1163 MCU_CMD_SET)1164#define MCU_CMD_UNI_QUERY_ACK (MCU_CMD_ACK | MCU_CMD_UNI)1165 1166#define __MCU_CMD_FIELD_ID GENMASK(7, 0)1167#define __MCU_CMD_FIELD_EXT_ID GENMASK(15, 8)1168#define __MCU_CMD_FIELD_QUERY BIT(16)1169#define __MCU_CMD_FIELD_UNI BIT(17)1170#define __MCU_CMD_FIELD_CE BIT(18)1171#define __MCU_CMD_FIELD_WA BIT(19)1172#define __MCU_CMD_FIELD_WM BIT(20)1173 1174#define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \1175 MCU_CMD_##_t)1176#define MCU_EXT_CMD(_t) (MCU_CMD(EXT_CID) | \1177 FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \1178 MCU_EXT_CMD_##_t))1179#define MCU_EXT_QUERY(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_QUERY)1180#define MCU_UNI_CMD(_t) (__MCU_CMD_FIELD_UNI | \1181 FIELD_PREP(__MCU_CMD_FIELD_ID, \1182 MCU_UNI_CMD_##_t))1183#define MCU_CE_CMD(_t) (__MCU_CMD_FIELD_CE | \1184 FIELD_PREP(__MCU_CMD_FIELD_ID, \1185 MCU_CE_CMD_##_t))1186#define MCU_CE_QUERY(_t) (MCU_CE_CMD(_t) | __MCU_CMD_FIELD_QUERY)1187 1188#define MCU_WA_CMD(_t) (MCU_CMD(_t) | __MCU_CMD_FIELD_WA)1189#define MCU_WA_EXT_CMD(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_WA)1190#define MCU_WA_PARAM_CMD(_t) (MCU_WA_CMD(WA_PARAM) | \1191 FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \1192 MCU_WA_PARAM_CMD_##_t))1193 1194#define MCU_WM_UNI_CMD(_t) (MCU_UNI_CMD(_t) | \1195 __MCU_CMD_FIELD_WM)1196#define MCU_WM_UNI_CMD_QUERY(_t) (MCU_UNI_CMD(_t) | \1197 __MCU_CMD_FIELD_QUERY | \1198 __MCU_CMD_FIELD_WM)1199#define MCU_WA_UNI_CMD(_t) (MCU_UNI_CMD(_t) | \1200 __MCU_CMD_FIELD_WA)1201#define MCU_WMWA_UNI_CMD(_t) (MCU_WM_UNI_CMD(_t) | \1202 __MCU_CMD_FIELD_WA)1203 1204enum {1205 MCU_EXT_CMD_EFUSE_ACCESS = 0x01,1206 MCU_EXT_CMD_RF_REG_ACCESS = 0x02,1207 MCU_EXT_CMD_RF_TEST = 0x04,1208 MCU_EXT_CMD_ID_RADIO_ON_OFF_CTRL = 0x05,1209 MCU_EXT_CMD_PM_STATE_CTRL = 0x07,1210 MCU_EXT_CMD_CHANNEL_SWITCH = 0x08,1211 MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11,1212 MCU_EXT_CMD_FW_LOG_2_HOST = 0x13,1213 MCU_EXT_CMD_TXBF_ACTION = 0x1e,1214 MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21,1215 MCU_EXT_CMD_THERMAL_PROT = 0x23,1216 MCU_EXT_CMD_STA_REC_UPDATE = 0x25,1217 MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26,1218 MCU_EXT_CMD_EDCA_UPDATE = 0x27,1219 MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A,1220 MCU_EXT_CMD_THERMAL_CTRL = 0x2c,1221 MCU_EXT_CMD_WTBL_UPDATE = 0x32,1222 MCU_EXT_CMD_SET_DRR_CTRL = 0x36,1223 MCU_EXT_CMD_SET_RDD_CTRL = 0x3a,1224 MCU_EXT_CMD_ATE_CTRL = 0x3d,1225 MCU_EXT_CMD_PROTECT_CTRL = 0x3e,1226 MCU_EXT_CMD_DBDC_CTRL = 0x45,1227 MCU_EXT_CMD_MAC_INIT_CTRL = 0x46,1228 MCU_EXT_CMD_RX_HDR_TRANS = 0x47,1229 MCU_EXT_CMD_MUAR_UPDATE = 0x48,1230 MCU_EXT_CMD_BCN_OFFLOAD = 0x49,1231 MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a,1232 MCU_EXT_CMD_SET_RX_PATH = 0x4e,1233 MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f,1234 MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58,1235 MCU_EXT_CMD_RXDCOC_CAL = 0x59,1236 MCU_EXT_CMD_GET_MIB_INFO = 0x5a,1237 MCU_EXT_CMD_TXDPD_CAL = 0x60,1238 MCU_EXT_CMD_CAL_CACHE = 0x67,1239 MCU_EXT_CMD_RED_ENABLE = 0x68,1240 MCU_EXT_CMD_CP_SUPPORT = 0x75,1241 MCU_EXT_CMD_SET_RADAR_TH = 0x7c,1242 MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d,1243 MCU_EXT_CMD_MWDS_SUPPORT = 0x80,1244 MCU_EXT_CMD_SET_SER_TRIGGER = 0x81,1245 MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94,1246 MCU_EXT_CMD_FW_DBG_CTRL = 0x95,1247 MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a,1248 MCU_EXT_CMD_SET_RDD_TH = 0x9d,1249 MCU_EXT_CMD_MURU_CTRL = 0x9f,1250 MCU_EXT_CMD_SET_SPR = 0xa8,1251 MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab,1252 MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac,1253 MCU_EXT_CMD_PHY_STAT_INFO = 0xad,1254};1255 1256enum {1257 MCU_UNI_CMD_DEV_INFO_UPDATE = 0x01,1258 MCU_UNI_CMD_BSS_INFO_UPDATE = 0x02,1259 MCU_UNI_CMD_STA_REC_UPDATE = 0x03,1260 MCU_UNI_CMD_EDCA_UPDATE = 0x04,1261 MCU_UNI_CMD_SUSPEND = 0x05,1262 MCU_UNI_CMD_OFFLOAD = 0x06,1263 MCU_UNI_CMD_HIF_CTRL = 0x07,1264 MCU_UNI_CMD_BAND_CONFIG = 0x08,1265 MCU_UNI_CMD_REPT_MUAR = 0x09,1266 MCU_UNI_CMD_WSYS_CONFIG = 0x0b,1267 MCU_UNI_CMD_REG_ACCESS = 0x0d,1268 MCU_UNI_CMD_CHIP_CONFIG = 0x0e,1269 MCU_UNI_CMD_POWER_CTRL = 0x0f,1270 MCU_UNI_CMD_RX_HDR_TRANS = 0x12,1271 MCU_UNI_CMD_SER = 0x13,1272 MCU_UNI_CMD_TWT = 0x14,1273 MCU_UNI_CMD_SET_DOMAIN_INFO = 0x15,1274 MCU_UNI_CMD_SCAN_REQ = 0x16,1275 MCU_UNI_CMD_RDD_CTRL = 0x19,1276 MCU_UNI_CMD_GET_MIB_INFO = 0x22,1277 MCU_UNI_CMD_GET_STAT_INFO = 0x23,1278 MCU_UNI_CMD_SNIFFER = 0x24,1279 MCU_UNI_CMD_SR = 0x25,1280 MCU_UNI_CMD_ROC = 0x27,1281 MCU_UNI_CMD_SET_DBDC_PARMS = 0x28,1282 MCU_UNI_CMD_TXPOWER = 0x2b,1283 MCU_UNI_CMD_SET_POWER_LIMIT = 0x2c,1284 MCU_UNI_CMD_EFUSE_CTRL = 0x2d,1285 MCU_UNI_CMD_RA = 0x2f,1286 MCU_UNI_CMD_MURU = 0x31,1287 MCU_UNI_CMD_BF = 0x33,1288 MCU_UNI_CMD_CHANNEL_SWITCH = 0x34,1289 MCU_UNI_CMD_THERMAL = 0x35,1290 MCU_UNI_CMD_VOW = 0x37,1291 MCU_UNI_CMD_FIXED_RATE_TABLE = 0x40,1292 MCU_UNI_CMD_RRO = 0x57,1293 MCU_UNI_CMD_OFFCH_SCAN_CTRL = 0x58,1294 MCU_UNI_CMD_PER_STA_INFO = 0x6d,1295 MCU_UNI_CMD_ALL_STA_INFO = 0x6e,1296 MCU_UNI_CMD_ASSERT_DUMP = 0x6f,1297};1298 1299enum {1300 MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01,1301 MCU_CMD_FW_START_REQ = 0x02,1302 MCU_CMD_INIT_ACCESS_REG = 0x3,1303 MCU_CMD_NIC_POWER_CTRL = 0x4,1304 MCU_CMD_PATCH_START_REQ = 0x05,1305 MCU_CMD_PATCH_FINISH_REQ = 0x07,1306 MCU_CMD_PATCH_SEM_CONTROL = 0x10,1307 MCU_CMD_WA_PARAM = 0xc4,1308 MCU_CMD_EXT_CID = 0xed,1309 MCU_CMD_FW_SCATTER = 0xee,1310 MCU_CMD_RESTART_DL_REQ = 0xef,1311};1312 1313/* offload mcu commands */1314enum {1315 MCU_CE_CMD_TEST_CTRL = 0x01,1316 MCU_CE_CMD_START_HW_SCAN = 0x03,1317 MCU_CE_CMD_SET_PS_PROFILE = 0x05,1318 MCU_CE_CMD_SET_RX_FILTER = 0x0a,1319 MCU_CE_CMD_SET_CHAN_DOMAIN = 0x0f,1320 MCU_CE_CMD_SET_BSS_CONNECTED = 0x16,1321 MCU_CE_CMD_SET_BSS_ABORT = 0x17,1322 MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b,1323 MCU_CE_CMD_SET_ROC = 0x1c,1324 MCU_CE_CMD_SET_EDCA_PARMS = 0x1d,1325 MCU_CE_CMD_SET_P2P_OPPPS = 0x33,1326 MCU_CE_CMD_SET_CLC = 0x5c,1327 MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d,1328 MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61,1329 MCU_CE_CMD_SCHED_SCAN_REQ = 0x62,1330 MCU_CE_CMD_GET_NIC_CAPAB = 0x8a,1331 MCU_CE_CMD_RSSI_MONITOR = 0xa1,1332 MCU_CE_CMD_SET_MU_EDCA_PARMS = 0xb0,1333 MCU_CE_CMD_REG_WRITE = 0xc0,1334 MCU_CE_CMD_REG_READ = 0xc0,1335 MCU_CE_CMD_CHIP_CONFIG = 0xca,1336 MCU_CE_CMD_FWLOG_2_HOST = 0xc5,1337 MCU_CE_CMD_GET_WTBL = 0xcd,1338 MCU_CE_CMD_GET_TXPWR = 0xd0,1339};1340 1341enum {1342 PATCH_SEM_RELEASE,1343 PATCH_SEM_GET1344};1345 1346enum {1347 UNI_BSS_INFO_BASIC = 0,1348 UNI_BSS_INFO_RA = 1,1349 UNI_BSS_INFO_RLM = 2,1350 UNI_BSS_INFO_BSS_COLOR = 4,1351 UNI_BSS_INFO_HE_BASIC = 5,1352 UNI_BSS_INFO_11V_MBSSID = 6,1353 UNI_BSS_INFO_BCN_CONTENT = 7,1354 UNI_BSS_INFO_BCN_CSA = 8,1355 UNI_BSS_INFO_BCN_BCC = 9,1356 UNI_BSS_INFO_BCN_MBSSID = 10,1357 UNI_BSS_INFO_RATE = 11,1358 UNI_BSS_INFO_QBSS = 15,1359 UNI_BSS_INFO_SEC = 16,1360 UNI_BSS_INFO_BCN_PROT = 17,1361 UNI_BSS_INFO_TXCMD = 18,1362 UNI_BSS_INFO_UAPSD = 19,1363 UNI_BSS_INFO_PS = 21,1364 UNI_BSS_INFO_BCNFT = 22,1365 UNI_BSS_INFO_IFS_TIME = 23,1366 UNI_BSS_INFO_OFFLOAD = 25,1367 UNI_BSS_INFO_MLD = 26,1368 UNI_BSS_INFO_PM_DISABLE = 27,1369};1370 1371enum {1372 UNI_OFFLOAD_OFFLOAD_ARP,1373 UNI_OFFLOAD_OFFLOAD_ND,1374 UNI_OFFLOAD_OFFLOAD_GTK_REKEY,1375 UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT,1376};1377 1378enum UNI_ALL_STA_INFO_TAG {1379 UNI_ALL_STA_TXRX_RATE,1380 UNI_ALL_STA_TX_STAT,1381 UNI_ALL_STA_TXRX_ADM_STAT,1382 UNI_ALL_STA_TXRX_AIR_TIME,1383 UNI_ALL_STA_DATA_TX_RETRY_COUNT,1384 UNI_ALL_STA_GI_MODE,1385 UNI_ALL_STA_TXRX_MSDU_COUNT,1386 UNI_ALL_STA_MAX_NUM1387};1388 1389enum {1390 MT_NIC_CAP_TX_RESOURCE,1391 MT_NIC_CAP_TX_EFUSE_ADDR,1392 MT_NIC_CAP_COEX,1393 MT_NIC_CAP_SINGLE_SKU,1394 MT_NIC_CAP_CSUM_OFFLOAD,1395 MT_NIC_CAP_HW_VER,1396 MT_NIC_CAP_SW_VER,1397 MT_NIC_CAP_MAC_ADDR,1398 MT_NIC_CAP_PHY,1399 MT_NIC_CAP_MAC,1400 MT_NIC_CAP_FRAME_BUF,1401 MT_NIC_CAP_BEAM_FORM,1402 MT_NIC_CAP_LOCATION,1403 MT_NIC_CAP_MUMIMO,1404 MT_NIC_CAP_BUFFER_MODE_INFO,1405 MT_NIC_CAP_HW_ADIE_VERSION = 0x14,1406 MT_NIC_CAP_ANTSWP = 0x16,1407 MT_NIC_CAP_WFDMA_REALLOC,1408 MT_NIC_CAP_6G,1409 MT_NIC_CAP_CHIP_CAP = 0x20,1410 MT_NIC_CAP_EML_CAP = 0x22,1411};1412 1413#define UNI_WOW_DETECT_TYPE_MAGIC BIT(0)1414#define UNI_WOW_DETECT_TYPE_ANY BIT(1)1415#define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2)1416#define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3)1417#define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4)1418#define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5)1419#define UNI_WOW_DETECT_TYPE_BITMAP BIT(6)1420 1421enum {1422 UNI_SUSPEND_MODE_SETTING,1423 UNI_SUSPEND_WOW_CTRL,1424 UNI_SUSPEND_WOW_GPIO_PARAM,1425 UNI_SUSPEND_WOW_WAKEUP_PORT,1426 UNI_SUSPEND_WOW_PATTERN,1427};1428 1429enum {1430 WOW_USB = 1,1431 WOW_PCIE = 2,1432 WOW_GPIO = 3,1433};1434 1435struct mt76_connac_bss_basic_tlv {1436 __le16 tag;1437 __le16 len;1438 u8 active;1439 u8 omac_idx;1440 u8 hw_bss_idx;1441 u8 band_idx;1442 __le32 conn_type;1443 u8 conn_state;1444 u8 wmm_idx;1445 u8 bssid[ETH_ALEN];1446 __le16 bmc_tx_wlan_idx;1447 __le16 bcn_interval;1448 u8 dtim_period;1449 u8 phymode; /* bit(0): A1450 * bit(1): B1451 * bit(2): G1452 * bit(3): GN1453 * bit(4): AN1454 * bit(5): AC1455 * bit(6): AX21456 * bit(7): AX51457 * bit(8): AX61458 */1459 __le16 sta_idx;1460 __le16 nonht_basic_phy;1461 u8 phymode_ext; /* bit(0) AX_6G */1462 u8 link_idx;1463} __packed;1464 1465struct mt76_connac_bss_qos_tlv {1466 __le16 tag;1467 __le16 len;1468 u8 qos;1469 u8 pad[3];1470} __packed;1471 1472struct mt76_connac_beacon_loss_event {1473 u8 bss_idx;1474 u8 reason;1475 u8 pad[2];1476} __packed;1477 1478struct mt76_connac_rssi_notify_event {1479 __le32 rssi[4];1480} __packed;1481 1482struct mt76_connac_mcu_bss_event {1483 u8 bss_idx;1484 u8 is_absent;1485 u8 free_quota;1486 u8 pad;1487} __packed;1488 1489struct mt76_connac_mcu_scan_ssid {1490 __le32 ssid_len;1491 u8 ssid[IEEE80211_MAX_SSID_LEN];1492} __packed;1493 1494struct mt76_connac_mcu_scan_channel {1495 u8 band; /* 1: 2.4GHz1496 * 2: 5.0GHz1497 * Others: Reserved1498 */1499 u8 channel_num;1500} __packed;1501 1502struct mt76_connac_mcu_scan_match {1503 __le32 rssi_th;1504 u8 ssid[IEEE80211_MAX_SSID_LEN];1505 u8 ssid_len;1506 u8 rsv[3];1507} __packed;1508 1509struct mt76_connac_hw_scan_req {1510 u8 seq_num;1511 u8 bss_idx;1512 u8 scan_type; /* 0: PASSIVE SCAN1513 * 1: ACTIVE SCAN1514 */1515 u8 ssid_type; /* BIT(0) wildcard SSID1516 * BIT(1) P2P wildcard SSID1517 * BIT(2) specified SSID + wildcard SSID1518 * BIT(2) + ssid_type_ext BIT(0) specified SSID only1519 */1520 u8 ssids_num;1521 u8 probe_req_num; /* Number of probe request for each SSID */1522 u8 scan_func; /* BIT(0) Enable random MAC scan1523 * BIT(1) Disable DBDC scan type 1~3.1524 * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan).1525 */1526 u8 version; /* 0: Not support fields after ies.1527 * 1: Support fields after ies.1528 */1529 struct mt76_connac_mcu_scan_ssid ssids[4];1530 __le16 probe_delay_time;1531 __le16 channel_dwell_time; /* channel Dwell interval */1532 __le16 timeout_value;1533 u8 channel_type; /* 0: Full channels1534 * 1: Only 2.4GHz channels1535 * 2: Only 5GHz channels1536 * 3: P2P social channel only (channel #1, #6 and #11)1537 * 4: Specified channels1538 * Others: Reserved1539 */1540 u8 channels_num; /* valid when channel_type is 4 */1541 /* valid when channels_num is set */1542 struct mt76_connac_mcu_scan_channel channels[32];1543 __le16 ies_len;1544 u8 ies[MT76_CONNAC_SCAN_IE_LEN];1545 /* following fields are valid if version > 0 */1546 u8 ext_channels_num;1547 u8 ext_ssids_num;1548 __le16 channel_min_dwell_time;1549 struct mt76_connac_mcu_scan_channel ext_channels[32];1550 struct mt76_connac_mcu_scan_ssid ext_ssids[6];1551 u8 bssid[ETH_ALEN];1552 u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */1553 u8 pad[63];1554 u8 ssid_type_ext;1555} __packed;1556 1557#define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 641558 1559struct mt76_connac_hw_scan_done {1560 u8 seq_num;1561 u8 sparse_channel_num;1562 struct mt76_connac_mcu_scan_channel sparse_channel;1563 u8 complete_channel_num;1564 u8 current_state;1565 u8 version;1566 u8 pad;1567 __le32 beacon_scan_num;1568 u8 pno_enabled;1569 u8 pad2[3];1570 u8 sparse_channel_valid_num;1571 u8 pad3[3];1572 u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM];1573 /* idle format for channel_idle_time1574 * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms)1575 * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms)1576 * 2: dwell time (16us)1577 */1578 __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM];1579 /* beacon and probe response count */1580 u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM];1581 u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM];1582 __le32 beacon_2g_num;1583 __le32 beacon_5g_num;1584} __packed;1585 1586struct mt76_connac_sched_scan_req {1587 u8 version;1588 u8 seq_num;1589 u8 stop_on_match;1590 u8 ssids_num;1591 u8 match_num;1592 u8 pad;1593 __le16 ie_len;1594 struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID];1595 struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH];1596 u8 channel_type;1597 u8 channels_num;1598 u8 intervals_num;1599 u8 scan_func; /* MT7663: BIT(0) eable random mac address */1600 struct mt76_connac_mcu_scan_channel channels[64];1601 __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL];1602 union {1603 struct {1604 u8 random_mac[ETH_ALEN];1605 u8 pad2[58];1606 } mt7663;1607 struct {1608 u8 bss_idx;1609 u8 pad1[3];1610 __le32 delay;1611 u8 pad2[12];1612 u8 random_mac[ETH_ALEN];1613 u8 pad3[38];1614 } mt7921;1615 };1616} __packed;1617 1618struct mt76_connac_sched_scan_done {1619 u8 seq_num;1620 u8 status; /* 0: ssid found */1621 __le16 pad;1622} __packed;1623 1624struct bss_info_uni_bss_color {1625 __le16 tag;1626 __le16 len;1627 u8 enable;1628 u8 bss_color;1629 u8 rsv[2];1630} __packed;1631 1632struct bss_info_uni_he {1633 __le16 tag;1634 __le16 len;1635 __le16 he_rts_thres;1636 u8 he_pe_duration;1637 u8 su_disable;1638 __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM];1639 u8 rsv[2];1640} __packed;1641 1642struct bss_info_uni_mbssid {1643 __le16 tag;1644 __le16 len;1645 u8 max_indicator;1646 u8 mbss_idx;1647 u8 tx_bss_omac_idx;1648 u8 rsv;1649} __packed;1650 1651struct mt76_connac_gtk_rekey_tlv {1652 __le16 tag;1653 __le16 len;1654 u8 kek[NL80211_KEK_LEN];1655 u8 kck[NL80211_KCK_LEN];1656 u8 replay_ctr[NL80211_REPLAY_CTR_LEN];1657 u8 rekey_mode; /* 0: rekey offload enable1658 * 1: rekey offload disable1659 * 2: rekey update1660 */1661 u8 keyid;1662 u8 option; /* 1: rekey data update without enabling offload */1663 u8 pad[1];1664 __le32 proto; /* WPA-RSN-WAPI-OPSN */1665 __le32 pairwise_cipher;1666 __le32 group_cipher;1667 __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */1668 __le32 mgmt_group_cipher;1669 u8 reserverd[4];1670} __packed;1671 1672#define MT76_CONNAC_WOW_MASK_MAX_LEN 161673#define MT76_CONNAC_WOW_PATTEN_MAX_LEN 1281674 1675struct mt76_connac_wow_pattern_tlv {1676 __le16 tag;1677 __le16 len;1678 u8 index; /* pattern index */1679 u8 enable; /* 0: disable1680 * 1: enable1681 */1682 u8 data_len; /* pattern length */1683 u8 pad;1684 u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN];1685 u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN];1686 u8 rsv[4];1687} __packed;1688 1689struct mt76_connac_wow_ctrl_tlv {1690 __le16 tag;1691 __le16 len;1692 u8 cmd; /* 0x1: PM_WOWLAN_REQ_START1693 * 0x2: PM_WOWLAN_REQ_STOP1694 * 0x3: PM_WOWLAN_PARAM_CLEAR1695 */1696 u8 trigger; /* 0: NONE1697 * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT1698 * BIT(1): NL80211_WOWLAN_TRIG_ANY1699 * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT1700 * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE1701 * BIT(4): BEACON_LOST1702 * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT1703 */1704 u8 wakeup_hif; /* 0x0: HIF_SDIO1705 * 0x1: HIF_USB1706 * 0x2: HIF_PCIE1707 * 0x3: HIF_GPIO1708 */1709 u8 pad;1710 u8 rsv[4];1711} __packed;1712 1713struct mt76_connac_wow_gpio_param_tlv {1714 __le16 tag;1715 __le16 len;1716 u8 gpio_pin;1717 u8 trigger_lvl;1718 u8 pad[2];1719 __le32 gpio_interval;1720 u8 rsv[4];1721} __packed;1722 1723struct mt76_connac_arpns_tlv {1724 __le16 tag;1725 __le16 len;1726 u8 mode;1727 u8 ips_num;1728 u8 option;1729 u8 pad[1];1730} __packed;1731 1732struct mt76_connac_suspend_tlv {1733 __le16 tag;1734 __le16 len;1735 u8 enable; /* 0: suspend mode disabled1736 * 1: suspend mode enabled1737 */1738 u8 mdtim; /* LP parameter */1739 u8 wow_suspend; /* 0: update by origin policy1740 * 1: update by wow dtim1741 */1742 u8 pad[5];1743} __packed;1744 1745enum mt76_sta_info_state {1746 MT76_STA_INFO_STATE_NONE,1747 MT76_STA_INFO_STATE_AUTH,1748 MT76_STA_INFO_STATE_ASSOC1749};1750 1751struct mt76_sta_cmd_info {1752 union {1753 struct ieee80211_sta *sta;1754 struct ieee80211_link_sta *link_sta;1755 };1756 struct mt76_wcid *wcid;1757 1758 struct ieee80211_vif *vif;1759 1760 bool offload_fw;1761 bool enable;1762 bool newly;1763 int cmd;1764 u8 rcpi;1765 u8 state;1766};1767 1768#define MT_SKU_POWER_LIMIT 1611769 1770struct mt76_connac_sku_tlv {1771 u8 channel;1772 s8 pwr_limit[MT_SKU_POWER_LIMIT];1773} __packed;1774 1775struct mt76_connac_tx_power_limit_tlv {1776 /* DW0 - common info*/1777 u8 ver;1778 u8 pad0;1779 __le16 len;1780 /* DW1 - cmd hint */1781 u8 n_chan; /* # channel */1782 u8 band; /* 2.4GHz - 5GHz - 6GHz */1783 u8 last_msg;1784 u8 pad1;1785 /* DW3 */1786 u8 alpha2[4]; /* regulatory_request.alpha2 */1787 u8 pad2[32];1788} __packed;1789 1790struct mt76_connac_config {1791 __le16 id;1792 u8 type;1793 u8 resp_type;1794 __le16 data_size;1795 __le16 resv;1796 u8 data[320];1797} __packed;1798 1799struct mt76_connac_mcu_uni_event {1800 u8 cid;1801 u8 pad[3];1802 __le32 status; /* 0: success, others: fail */1803} __packed;1804 1805struct mt76_connac_mcu_reg_event {1806 __le32 reg;1807 __le32 val;1808} __packed;1809 1810static inline enum mcu_cipher_type1811mt76_connac_mcu_get_cipher(int cipher)1812{1813 switch (cipher) {1814 case WLAN_CIPHER_SUITE_WEP40:1815 return MCU_CIPHER_WEP40;1816 case WLAN_CIPHER_SUITE_WEP104:1817 return MCU_CIPHER_WEP104;1818 case WLAN_CIPHER_SUITE_TKIP:1819 return MCU_CIPHER_TKIP;1820 case WLAN_CIPHER_SUITE_AES_CMAC:1821 return MCU_CIPHER_BIP_CMAC_128;1822 case WLAN_CIPHER_SUITE_CCMP:1823 return MCU_CIPHER_AES_CCMP;1824 case WLAN_CIPHER_SUITE_CCMP_256:1825 return MCU_CIPHER_CCMP_256;1826 case WLAN_CIPHER_SUITE_GCMP:1827 return MCU_CIPHER_GCMP;1828 case WLAN_CIPHER_SUITE_GCMP_256:1829 return MCU_CIPHER_GCMP_256;1830 case WLAN_CIPHER_SUITE_BIP_GMAC_128:1831 return MCU_CIPHER_BIP_GMAC_128;1832 case WLAN_CIPHER_SUITE_BIP_GMAC_256:1833 return MCU_CIPHER_BIP_GMAC_256;1834 case WLAN_CIPHER_SUITE_BIP_CMAC_256:1835 return MCU_CIPHER_BIP_CMAC_256;1836 case WLAN_CIPHER_SUITE_SMS4:1837 return MCU_CIPHER_WAPI;1838 default:1839 return MCU_CIPHER_NONE;1840 }1841}1842 1843static inline u321844mt76_connac_mcu_gen_dl_mode(struct mt76_dev *dev, u8 feature_set, bool is_wa)1845{1846 u32 ret = 0;1847 1848 ret |= feature_set & FW_FEATURE_SET_ENCRYPT ?1849 DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV : 0;1850 if (is_mt7921(dev) || is_mt7925(dev))1851 ret |= feature_set & FW_FEATURE_ENCRY_MODE ?1852 DL_CONFIG_ENCRY_MODE_SEL : 0;1853 ret |= FIELD_PREP(DL_MODE_KEY_IDX,1854 FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set));1855 ret |= DL_MODE_NEED_RSP;1856 ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0;1857 1858 return ret;1859}1860 1861#define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id)1862#define to_wcid_hi(id) FIELD_GET(GENMASK(10, 8), (u16)id)1863 1864static inline void1865mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid,1866 u8 *wlan_idx_lo, u8 *wlan_idx_hi)1867{1868 *wlan_idx_hi = 0;1869 1870 if (!is_connac_v1(dev)) {1871 *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0;1872 *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0;1873 } else {1874 *wlan_idx_lo = wcid ? wcid->idx : 0;1875 }1876}1877 1878struct sk_buff *1879__mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif,1880 struct mt76_wcid *wcid, int len);1881static inline struct sk_buff *1882mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif,1883 struct mt76_wcid *wcid)1884{1885 return __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid,1886 MT76_CONNAC_STA_UPDATE_MAX_SIZE);1887}1888 1889struct wtbl_req_hdr *1890mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid,1891 int cmd, void *sta_wtbl, struct sk_buff **skb);1892struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag,1893 int len, void *sta_ntlv,1894 void *sta_wtbl);1895static inline struct tlv *1896mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len)1897{1898 return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL);1899}1900 1901int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy);1902int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif);1903void mt76_connac_mcu_sta_basic_tlv(struct mt76_dev *dev, struct sk_buff *skb,1904 struct ieee80211_vif *vif,1905 struct ieee80211_link_sta *link_sta,1906 int state, bool newly);1907void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb,1908 struct ieee80211_vif *vif,1909 struct ieee80211_sta *sta, void *sta_wtbl,1910 void *wtbl_tlv);1911void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb,1912 struct ieee80211_vif *vif,1913 struct mt76_wcid *wcid,1914 void *sta_wtbl, void *wtbl_tlv);1915int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev,1916 struct ieee80211_vif *vif,1917 struct mt76_wcid *wcid, int cmd);1918void mt76_connac_mcu_sta_he_tlv_v2(struct sk_buff *skb, struct ieee80211_sta *sta);1919u8 mt76_connac_get_phy_mode_v2(struct mt76_phy *mphy, struct ieee80211_vif *vif,1920 enum nl80211_band band,1921 struct ieee80211_link_sta *link_sta);1922int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev,1923 struct ieee80211_vif *vif,1924 struct ieee80211_sta *sta);1925void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb,1926 struct ieee80211_sta *sta,1927 struct ieee80211_vif *vif,1928 u8 rcpi, u8 state);1929void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb,1930 struct ieee80211_sta *sta, void *sta_wtbl,1931 void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc);1932void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb,1933 struct ieee80211_ampdu_params *params,1934 bool enable, bool tx, void *sta_wtbl,1935 void *wtbl_tlv);1936void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb,1937 struct ieee80211_ampdu_params *params,1938 bool enable, bool tx);1939int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy,1940 struct ieee80211_bss_conf *bss_conf,1941 struct mt76_wcid *wcid,1942 bool enable);1943int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif,1944 struct ieee80211_ampdu_params *params,1945 int cmd, bool enable, bool tx);1946int mt76_connac_mcu_uni_set_chctx(struct mt76_phy *phy,1947 struct mt76_vif *vif,1948 struct ieee80211_chanctx_conf *ctx);1949int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy,1950 struct ieee80211_vif *vif,1951 struct mt76_wcid *wcid,1952 bool enable,1953 struct ieee80211_chanctx_conf *ctx);1954int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy,1955 struct mt76_sta_cmd_info *info);1956void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac,1957 struct ieee80211_vif *vif);1958int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band);1959int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable,1960 bool hdr_trans);1961int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len,1962 u32 mode);1963int mt76_connac_mcu_start_patch(struct mt76_dev *dev);1964int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get);1965int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option);1966 1967int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif,1968 struct ieee80211_scan_request *scan_req);1969int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy,1970 struct ieee80211_vif *vif);1971int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy,1972 struct ieee80211_vif *vif,1973 struct cfg80211_sched_scan_request *sreq);1974int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy,1975 struct ieee80211_vif *vif,1976 bool enable);1977int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev,1978 struct mt76_vif *vif,1979 struct ieee80211_bss_conf *info);1980int mt76_connac_mcu_set_gtk_rekey(struct mt76_dev *dev, struct ieee80211_vif *vif,1981 bool suspend);1982int mt76_connac_mcu_set_wow_ctrl(struct mt76_phy *phy, struct ieee80211_vif *vif,1983 bool suspend, struct cfg80211_wowlan *wowlan);1984int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw,1985 struct ieee80211_vif *vif,1986 struct cfg80211_gtk_rekey_data *key);1987int mt76_connac_mcu_set_suspend_mode(struct mt76_dev *dev,1988 struct ieee80211_vif *vif,1989 bool enable, u8 mdtim,1990 bool wow_suspend);1991int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend);1992void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac,1993 struct ieee80211_vif *vif);1994int mt76_connac_sta_state_dp(struct mt76_dev *dev,1995 enum ieee80211_sta_state old_state,1996 enum ieee80211_sta_state new_state);1997int mt76_connac_mcu_chip_config(struct mt76_dev *dev);1998int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable);1999void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb,2000 struct mt76_connac_coredump *coredump);2001s8 mt76_connac_get_ch_power(struct mt76_phy *phy,2002 struct ieee80211_channel *chan,2003 s8 target_power);2004int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy);2005int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw,2006 struct ieee80211_vif *vif);2007u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset);2008void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val);2009 2010const struct ieee80211_sta_he_cap *2011mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif);2012const struct ieee80211_sta_eht_cap *2013mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif);2014u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif,2015 enum nl80211_band band,2016 struct ieee80211_link_sta *sta);2017u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif,2018 enum nl80211_band band);2019 2020int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,2021 struct mt76_connac_sta_key_conf *sta_key_conf,2022 struct ieee80211_key_conf *key, int mcu_cmd,2023 struct mt76_wcid *wcid, enum set_key_cmd cmd);2024 2025void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif);2026void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb,2027 struct ieee80211_vif *vif);2028int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb,2029 struct ieee80211_vif *vif,2030 struct ieee80211_sta *sta,2031 struct mt76_phy *phy, u16 wlan_idx,2032 bool enable);2033void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif,2034 struct ieee80211_sta *sta);2035void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb,2036 struct ieee80211_sta *sta,2037 void *sta_wtbl, void *wtbl_tlv);2038int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter);2039int mt76_connac_mcu_restart(struct mt76_dev *dev);2040int mt76_connac_mcu_del_wtbl_all(struct mt76_dev *dev);2041int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index,2042 u8 rx_sel, u8 val);2043int mt76_connac_mcu_sta_wed_update(struct mt76_dev *dev, struct sk_buff *skb);2044int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm,2045 const char *fw_wa);2046int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name);2047int mt76_connac2_mcu_fill_message(struct mt76_dev *mdev, struct sk_buff *skb,2048 int cmd, int *wait_seq);2049#endif /* __MT76_CONNAC_MCU_H */2050