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1// SPDX-License-Identifier: ISC2/* Copyright (C) 2020 MediaTek Inc. */3 4#include <linux/devcoredump.h>5#include <linux/etherdevice.h>6#include <linux/timekeeping.h>7#include "mt7921.h"8#include "../dma.h"9#include "../mt76_connac2_mac.h"10#include "mcu.h"11 12#define MT_WTBL_TXRX_CAP_RATE_OFFSET	713#define MT_WTBL_TXRX_RATE_G2_HE		2414#define MT_WTBL_TXRX_RATE_G2		1215 16#define MT_WTBL_AC0_CTT_OFFSET		2017 18bool mt7921_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask)19{20	mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX,21		 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);22 23	return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY,24			 0, 5000);25}26 27static u32 mt7921_mac_wtbl_lmac_addr(int idx, u8 offset)28{29	return MT_WTBL_LMAC_OFFS(idx, 0) + offset * 4;30}31 32static void mt7921_mac_sta_poll(struct mt792x_dev *dev)33{34	static const u8 ac_to_tid[] = {35		[IEEE80211_AC_BE] = 0,36		[IEEE80211_AC_BK] = 1,37		[IEEE80211_AC_VI] = 4,38		[IEEE80211_AC_VO] = 639	};40	struct ieee80211_sta *sta;41	struct mt792x_sta *msta;42	struct mt792x_link_sta *mlink;43	u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS];44	LIST_HEAD(sta_poll_list);45	struct rate_info *rate;46	s8 rssi[4];47	int i;48 49	spin_lock_bh(&dev->mt76.sta_poll_lock);50	list_splice_init(&dev->mt76.sta_poll_list, &sta_poll_list);51	spin_unlock_bh(&dev->mt76.sta_poll_lock);52 53	while (true) {54		bool clear = false;55		u32 addr, val;56		u16 idx;57		u8 bw;58 59		spin_lock_bh(&dev->mt76.sta_poll_lock);60		if (list_empty(&sta_poll_list)) {61			spin_unlock_bh(&dev->mt76.sta_poll_lock);62			break;63		}64		mlink = list_first_entry(&sta_poll_list,65					 struct mt792x_link_sta,66					 wcid.poll_list);67		msta = container_of(mlink, struct mt792x_sta, deflink);68		list_del_init(&mlink->wcid.poll_list);69		spin_unlock_bh(&dev->mt76.sta_poll_lock);70 71		idx = mlink->wcid.idx;72		addr = mt7921_mac_wtbl_lmac_addr(idx, MT_WTBL_AC0_CTT_OFFSET);73 74		for (i = 0; i < IEEE80211_NUM_ACS; i++) {75			u32 tx_last = mlink->airtime_ac[i];76			u32 rx_last = mlink->airtime_ac[i + 4];77 78			mlink->airtime_ac[i] = mt76_rr(dev, addr);79			mlink->airtime_ac[i + 4] = mt76_rr(dev, addr + 4);80 81			tx_time[i] = mlink->airtime_ac[i] - tx_last;82			rx_time[i] = mlink->airtime_ac[i + 4] - rx_last;83 84			if ((tx_last | rx_last) & BIT(30))85				clear = true;86 87			addr += 8;88		}89 90		if (clear) {91			mt7921_mac_wtbl_update(dev, idx,92					       MT_WTBL_UPDATE_ADM_COUNT_CLEAR);93			memset(mlink->airtime_ac, 0, sizeof(mlink->airtime_ac));94		}95 96		if (!mlink->wcid.sta)97			continue;98 99		sta = container_of((void *)msta, struct ieee80211_sta,100				   drv_priv);101		for (i = 0; i < IEEE80211_NUM_ACS; i++) {102			u8 q = mt76_connac_lmac_mapping(i);103			u32 tx_cur = tx_time[q];104			u32 rx_cur = rx_time[q];105			u8 tid = ac_to_tid[i];106 107			if (!tx_cur && !rx_cur)108				continue;109 110			ieee80211_sta_register_airtime(sta, tid, tx_cur,111						       rx_cur);112		}113 114		/* We don't support reading GI info from txs packets.115		 * For accurate tx status reporting and AQL improvement,116		 * we need to make sure that flags match so polling GI117		 * from per-sta counters directly.118		 */119		rate = &mlink->wcid.rate;120		addr = mt7921_mac_wtbl_lmac_addr(idx,121						 MT_WTBL_TXRX_CAP_RATE_OFFSET);122		val = mt76_rr(dev, addr);123 124		switch (rate->bw) {125		case RATE_INFO_BW_160:126			bw = IEEE80211_STA_RX_BW_160;127			break;128		case RATE_INFO_BW_80:129			bw = IEEE80211_STA_RX_BW_80;130			break;131		case RATE_INFO_BW_40:132			bw = IEEE80211_STA_RX_BW_40;133			break;134		default:135			bw = IEEE80211_STA_RX_BW_20;136			break;137		}138 139		if (rate->flags & RATE_INFO_FLAGS_HE_MCS) {140			u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw;141 142			rate->he_gi = (val & (0x3 << offs)) >> offs;143		} else if (rate->flags &144			   (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) {145			if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw))146				rate->flags |= RATE_INFO_FLAGS_SHORT_GI;147			else148				rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI;149		}150 151		/* get signal strength of resp frames (CTS/BA/ACK) */152		addr = mt7921_mac_wtbl_lmac_addr(idx, 30);153		val = mt76_rr(dev, addr);154 155		rssi[0] = to_rssi(GENMASK(7, 0), val);156		rssi[1] = to_rssi(GENMASK(15, 8), val);157		rssi[2] = to_rssi(GENMASK(23, 16), val);158		rssi[3] = to_rssi(GENMASK(31, 14), val);159 160		mlink->ack_signal =161			mt76_rx_signal(msta->vif->phy->mt76->antenna_mask, rssi);162 163		ewma_avg_signal_add(&mlink->avg_ack_signal, -mlink->ack_signal);164	}165}166 167static int168mt7921_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb)169{170	u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM;171	struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;172	bool hdr_trans, unicast, insert_ccmp_hdr = false;173	u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info;174	u16 hdr_gap;175	__le32 *rxv = NULL, *rxd = (__le32 *)skb->data;176	struct mt76_phy *mphy = &dev->mt76.phy;177	struct mt792x_phy *phy = &dev->phy;178	struct ieee80211_supported_band *sband;179	u32 csum_status = *(u32 *)skb->cb;180	u32 rxd0 = le32_to_cpu(rxd[0]);181	u32 rxd1 = le32_to_cpu(rxd[1]);182	u32 rxd2 = le32_to_cpu(rxd[2]);183	u32 rxd3 = le32_to_cpu(rxd[3]);184	u32 rxd4 = le32_to_cpu(rxd[4]);185	struct mt792x_sta *msta = NULL;186	struct mt792x_link_sta *mlink;187	u16 seq_ctrl = 0;188	__le16 fc = 0;189	u8 mode = 0;190	int i, idx;191 192	memset(status, 0, sizeof(*status));193 194	if (rxd1 & MT_RXD1_NORMAL_BAND_IDX)195		return -EINVAL;196 197	if (!test_bit(MT76_STATE_RUNNING, &mphy->state))198		return -EINVAL;199 200	if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR)201		return -EINVAL;202 203	hdr_trans = rxd2 & MT_RXD2_NORMAL_HDR_TRANS;204	if (hdr_trans && (rxd1 & MT_RXD1_NORMAL_CM))205		return -EINVAL;206 207	/* ICV error or CCMP/BIP/WPI MIC error */208	if (rxd1 & MT_RXD1_NORMAL_ICV_ERR)209		status->flag |= RX_FLAG_ONLY_MONITOR;210 211	chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3);212	unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M;213	idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1);214	status->wcid = mt792x_rx_get_wcid(dev, idx, unicast);215 216	if (status->wcid) {217		mlink = container_of(status->wcid, struct mt792x_link_sta, wcid);218		msta = container_of(mlink, struct mt792x_sta, deflink);219		spin_lock_bh(&dev->mt76.sta_poll_lock);220		if (list_empty(&mlink->wcid.poll_list))221			list_add_tail(&mlink->wcid.poll_list,222				      &dev->mt76.sta_poll_list);223		spin_unlock_bh(&dev->mt76.sta_poll_lock);224	}225 226	mt792x_get_status_freq_info(status, chfreq);227 228	switch (status->band) {229	case NL80211_BAND_5GHZ:230		sband = &mphy->sband_5g.sband;231		break;232	case NL80211_BAND_6GHZ:233		sband = &mphy->sband_6g.sband;234		break;235	default:236		sband = &mphy->sband_2g.sband;237		break;238	}239 240	if (!sband->channels)241		return -EINVAL;242 243	if (mt76_is_mmio(&dev->mt76) && (rxd0 & csum_mask) == csum_mask &&244	    !(csum_status & (BIT(0) | BIT(2) | BIT(3))))245		skb->ip_summed = CHECKSUM_UNNECESSARY;246 247	if (rxd1 & MT_RXD1_NORMAL_FCS_ERR)248		status->flag |= RX_FLAG_FAILED_FCS_CRC;249 250	if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR)251		status->flag |= RX_FLAG_MMIC_ERROR;252 253	if (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1) != 0 &&254	    !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) {255		status->flag |= RX_FLAG_DECRYPTED;256		status->flag |= RX_FLAG_IV_STRIPPED;257		status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED;258	}259 260	remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2);261 262	if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR)263		return -EINVAL;264 265	rxd += 6;266	if (rxd1 & MT_RXD1_NORMAL_GROUP_4) {267		u32 v0 = le32_to_cpu(rxd[0]);268		u32 v2 = le32_to_cpu(rxd[2]);269 270		fc = cpu_to_le16(FIELD_GET(MT_RXD6_FRAME_CONTROL, v0));271		seq_ctrl = FIELD_GET(MT_RXD8_SEQ_CTRL, v2);272		qos_ctl = FIELD_GET(MT_RXD8_QOS_CTL, v2);273 274		rxd += 4;275		if ((u8 *)rxd - skb->data >= skb->len)276			return -EINVAL;277	}278 279	if (rxd1 & MT_RXD1_NORMAL_GROUP_1) {280		u8 *data = (u8 *)rxd;281 282		if (status->flag & RX_FLAG_DECRYPTED) {283			switch (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1)) {284			case MT_CIPHER_AES_CCMP:285			case MT_CIPHER_CCMP_CCX:286			case MT_CIPHER_CCMP_256:287				insert_ccmp_hdr =288					FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2);289				fallthrough;290			case MT_CIPHER_TKIP:291			case MT_CIPHER_TKIP_NO_MIC:292			case MT_CIPHER_GCMP:293			case MT_CIPHER_GCMP_256:294				status->iv[0] = data[5];295				status->iv[1] = data[4];296				status->iv[2] = data[3];297				status->iv[3] = data[2];298				status->iv[4] = data[1];299				status->iv[5] = data[0];300				break;301			default:302				break;303			}304		}305		rxd += 4;306		if ((u8 *)rxd - skb->data >= skb->len)307			return -EINVAL;308	}309 310	if (rxd1 & MT_RXD1_NORMAL_GROUP_2) {311		status->timestamp = le32_to_cpu(rxd[0]);312		status->flag |= RX_FLAG_MACTIME_START;313 314		if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) {315			status->flag |= RX_FLAG_AMPDU_DETAILS;316 317			/* all subframes of an A-MPDU have the same timestamp */318			if (phy->rx_ampdu_ts != status->timestamp) {319				if (!++phy->ampdu_ref)320					phy->ampdu_ref++;321			}322			phy->rx_ampdu_ts = status->timestamp;323 324			status->ampdu_ref = phy->ampdu_ref;325		}326 327		rxd += 2;328		if ((u8 *)rxd - skb->data >= skb->len)329			return -EINVAL;330	}331 332	/* RXD Group 3 - P-RXV */333	if (rxd1 & MT_RXD1_NORMAL_GROUP_3) {334		u32 v0, v1;335		int ret;336 337		rxv = rxd;338		rxd += 2;339		if ((u8 *)rxd - skb->data >= skb->len)340			return -EINVAL;341 342		v0 = le32_to_cpu(rxv[0]);343		v1 = le32_to_cpu(rxv[1]);344 345		if (v0 & MT_PRXV_HT_AD_CODE)346			status->enc_flags |= RX_ENC_FLAG_LDPC;347 348		ret = mt76_connac2_mac_fill_rx_rate(&dev->mt76, status, sband,349						    rxv, &mode);350		if (ret < 0)351			return ret;352 353		if (rxd1 & MT_RXD1_NORMAL_GROUP_5) {354			rxd += 6;355			if ((u8 *)rxd - skb->data >= skb->len)356				return -EINVAL;357 358			rxv = rxd;359			/* Monitor mode would use RCPI described in GROUP 5360			 * instead.361			 */362			v1 = le32_to_cpu(rxv[0]);363 364			rxd += 12;365			if ((u8 *)rxd - skb->data >= skb->len)366				return -EINVAL;367		}368 369		status->chains = mphy->antenna_mask;370		status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v1);371		status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v1);372		status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v1);373		status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v1);374		status->signal = -128;375		for (i = 0; i < hweight8(mphy->antenna_mask); i++) {376			if (!(status->chains & BIT(i)) ||377			    status->chain_signal[i] >= 0)378				continue;379 380			status->signal = max(status->signal,381					     status->chain_signal[i]);382		}383	}384 385	amsdu_info = FIELD_GET(MT_RXD4_NORMAL_PAYLOAD_FORMAT, rxd4);386	status->amsdu = !!amsdu_info;387	if (status->amsdu) {388		status->first_amsdu = amsdu_info == MT_RXD4_FIRST_AMSDU_FRAME;389		status->last_amsdu = amsdu_info == MT_RXD4_LAST_AMSDU_FRAME;390	}391 392	hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad;393	if (hdr_trans && ieee80211_has_morefrags(fc)) {394		struct ieee80211_vif *vif;395		int err;396 397		if (!msta || !msta->vif)398			return -EINVAL;399 400		vif = container_of((void *)msta->vif, struct ieee80211_vif,401				   drv_priv);402		err = mt76_connac2_reverse_frag0_hdr_trans(vif, skb, hdr_gap);403		if (err)404			return err;405 406		hdr_trans = false;407	} else {408		skb_pull(skb, hdr_gap);409		if (!hdr_trans && status->amsdu) {410			memmove(skb->data + 2, skb->data,411				ieee80211_get_hdrlen_from_skb(skb));412			skb_pull(skb, 2);413		}414	}415 416	if (!hdr_trans) {417		struct ieee80211_hdr *hdr;418 419		if (insert_ccmp_hdr) {420			u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1);421 422			mt76_insert_ccmp_hdr(skb, key_id);423		}424 425		hdr = mt76_skb_get_hdr(skb);426		fc = hdr->frame_control;427		if (ieee80211_is_data_qos(fc)) {428			seq_ctrl = le16_to_cpu(hdr->seq_ctrl);429			qos_ctl = *ieee80211_get_qos_ctl(hdr);430		}431	} else {432		status->flag |= RX_FLAG_8023;433	}434 435	mt792x_mac_assoc_rssi(dev, skb);436 437	if (rxv && mode >= MT_PHY_TYPE_HE_SU && !(status->flag & RX_FLAG_8023))438		mt76_connac2_mac_decode_he_radiotap(&dev->mt76, skb, rxv, mode);439 440	if (!status->wcid || !ieee80211_is_data_qos(fc))441		return 0;442 443	status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc);444	status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl);445	status->qos_ctl = qos_ctl;446 447	return 0;448}449 450void mt7921_mac_add_txs(struct mt792x_dev *dev, void *data)451{452	struct mt792x_link_sta *mlink;453	struct mt76_wcid *wcid;454	__le32 *txs_data = data;455	u16 wcidx;456	u8 pid;457 458	if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1)459		return;460 461	wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID);462	pid = le32_get_bits(txs_data[3], MT_TXS3_PID);463 464	if (pid < MT_PACKET_ID_FIRST)465		return;466 467	if (wcidx >= MT792x_WTBL_SIZE)468		return;469 470	rcu_read_lock();471 472	wcid = rcu_dereference(dev->mt76.wcid[wcidx]);473	if (!wcid)474		goto out;475 476	mlink = container_of(wcid, struct mt792x_link_sta, wcid);477 478	mt76_connac2_mac_add_txs_skb(&dev->mt76, wcid, pid, txs_data);479	if (!wcid->sta)480		goto out;481 482	spin_lock_bh(&dev->mt76.sta_poll_lock);483	if (list_empty(&mlink->wcid.poll_list))484		list_add_tail(&mlink->wcid.poll_list, &dev->mt76.sta_poll_list);485	spin_unlock_bh(&dev->mt76.sta_poll_lock);486 487out:488	rcu_read_unlock();489}490 491static void mt7921_mac_tx_free(struct mt792x_dev *dev, void *data, int len)492{493	struct mt76_connac_tx_free *free = data;494	__le32 *tx_info = (__le32 *)(data + sizeof(*free));495	struct mt76_dev *mdev = &dev->mt76;496	struct mt76_txwi_cache *txwi;497	struct ieee80211_sta *sta = NULL;498	struct mt76_wcid *wcid = NULL;499	struct sk_buff *skb, *tmp;500	void *end = data + len;501	LIST_HEAD(free_list);502	bool wake = false;503	u8 i, count;504 505	/* clean DMA queues and unmap buffers first */506	mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false);507	mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false);508 509	count = le16_get_bits(free->ctrl, MT_TX_FREE_MSDU_CNT);510	if (WARN_ON_ONCE((void *)&tx_info[count] > end))511		return;512 513	for (i = 0; i < count; i++) {514		u32 msdu, info = le32_to_cpu(tx_info[i]);515		u8 stat;516 517		/* 1'b1: new wcid pair.518		 * 1'b0: msdu_id with the same 'wcid pair' as above.519		 */520		if (info & MT_TX_FREE_PAIR) {521			struct mt792x_link_sta *mlink;522			u16 idx;523 524			count++;525			idx = FIELD_GET(MT_TX_FREE_WLAN_ID, info);526			wcid = rcu_dereference(dev->mt76.wcid[idx]);527			sta = wcid_to_sta(wcid);528			if (!sta)529				continue;530 531			mlink = container_of(wcid, struct mt792x_link_sta, wcid);532			spin_lock_bh(&mdev->sta_poll_lock);533			if (list_empty(&mlink->wcid.poll_list))534				list_add_tail(&mlink->wcid.poll_list,535					      &mdev->sta_poll_list);536			spin_unlock_bh(&mdev->sta_poll_lock);537			continue;538		}539 540		msdu = FIELD_GET(MT_TX_FREE_MSDU_ID, info);541		stat = FIELD_GET(MT_TX_FREE_STATUS, info);542 543		if (wcid) {544			wcid->stats.tx_retries +=545				FIELD_GET(MT_TX_FREE_COUNT, info) - 1;546			wcid->stats.tx_failed += !!stat;547		}548 549		txwi = mt76_token_release(mdev, msdu, &wake);550		if (!txwi)551			continue;552 553		mt76_connac2_txwi_free(mdev, txwi, sta, &free_list);554	}555 556	if (wake)557		mt76_set_tx_blocked(&dev->mt76, false);558 559	list_for_each_entry_safe(skb, tmp, &free_list, list) {560		skb_list_del_init(skb);561		napi_consume_skb(skb, 1);562	}563 564	rcu_read_lock();565	mt7921_mac_sta_poll(dev);566	rcu_read_unlock();567 568	mt76_worker_schedule(&dev->mt76.tx_worker);569}570 571bool mt7921_rx_check(struct mt76_dev *mdev, void *data, int len)572{573	struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);574	__le32 *rxd = (__le32 *)data;575	__le32 *end = (__le32 *)&rxd[len / 4];576	enum rx_pkt_type type;577 578	type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE);579 580	switch (type) {581	case PKT_TYPE_TXRX_NOTIFY:582		/* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */583		mt7921_mac_tx_free(dev, data, len); /* mmio */584		return false;585	case PKT_TYPE_TXS:586		for (rxd += 2; rxd + 8 <= end; rxd += 8)587			mt7921_mac_add_txs(dev, rxd);588		return false;589	default:590		return true;591	}592}593EXPORT_SYMBOL_GPL(mt7921_rx_check);594 595void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,596			 struct sk_buff *skb, u32 *info)597{598	struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);599	__le32 *rxd = (__le32 *)skb->data;600	__le32 *end = (__le32 *)&skb->data[skb->len];601	enum rx_pkt_type type;602	u16 flag;603 604	type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE);605	flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG);606 607	if (type == PKT_TYPE_RX_EVENT && flag == 0x1)608		type = PKT_TYPE_NORMAL_MCU;609 610	switch (type) {611	case PKT_TYPE_TXRX_NOTIFY:612		/* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */613		mt7921_mac_tx_free(dev, skb->data, skb->len);614		napi_consume_skb(skb, 1);615		break;616	case PKT_TYPE_RX_EVENT:617		mt7921_mcu_rx_event(dev, skb);618		break;619	case PKT_TYPE_TXS:620		for (rxd += 2; rxd + 8 <= end; rxd += 8)621			mt7921_mac_add_txs(dev, rxd);622		dev_kfree_skb(skb);623		break;624	case PKT_TYPE_NORMAL_MCU:625	case PKT_TYPE_NORMAL:626		if (!mt7921_mac_fill_rx(dev, skb)) {627			mt76_rx(&dev->mt76, q, skb);628			return;629		}630		fallthrough;631	default:632		dev_kfree_skb(skb);633		break;634	}635}636EXPORT_SYMBOL_GPL(mt7921_queue_rx_skb);637 638static void639mt7921_vif_connect_iter(void *priv, u8 *mac,640			struct ieee80211_vif *vif)641{642	struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;643	struct mt792x_dev *dev = mvif->phy->dev;644	struct ieee80211_hw *hw = mt76_hw(dev);645 646	if (vif->type == NL80211_IFTYPE_STATION)647		ieee80211_disconnect(vif, true);648 649	mt76_connac_mcu_uni_add_dev(&dev->mphy, &vif->bss_conf,650				    &mvif->sta.deflink.wcid, true);651	mt7921_mcu_set_tx(dev, vif);652 653	if (vif->type == NL80211_IFTYPE_AP) {654		mt76_connac_mcu_uni_add_bss(dev->phy.mt76, vif, &mvif->sta.deflink.wcid,655					    true, NULL);656		mt7921_mcu_sta_update(dev, NULL, vif, true,657				      MT76_STA_INFO_STATE_NONE);658		mt7921_mcu_uni_add_beacon_offload(dev, hw, vif, true);659	}660}661 662/* system error recovery */663void mt7921_mac_reset_work(struct work_struct *work)664{665	struct mt792x_dev *dev = container_of(work, struct mt792x_dev,666					      reset_work);667	struct ieee80211_hw *hw = mt76_hw(dev);668	struct mt76_connac_pm *pm = &dev->pm;669	int i, ret;670 671	dev_dbg(dev->mt76.dev, "chip reset\n");672	set_bit(MT76_RESET, &dev->mphy.state);673	dev->hw_full_reset = true;674	ieee80211_stop_queues(hw);675 676	cancel_delayed_work_sync(&dev->mphy.mac_work);677	cancel_delayed_work_sync(&pm->ps_work);678	cancel_work_sync(&pm->wake_work);679 680	for (i = 0; i < 10; i++) {681		mutex_lock(&dev->mt76.mutex);682		ret = mt792x_dev_reset(dev);683		mutex_unlock(&dev->mt76.mutex);684 685		if (!ret)686			break;687	}688 689	if (i == 10)690		dev_err(dev->mt76.dev, "chip reset failed\n");691 692	if (test_and_clear_bit(MT76_HW_SCANNING, &dev->mphy.state)) {693		struct cfg80211_scan_info info = {694			.aborted = true,695		};696 697		ieee80211_scan_completed(dev->mphy.hw, &info);698	}699 700	dev->hw_full_reset = false;701	clear_bit(MT76_RESET, &dev->mphy.state);702	pm->suspended = false;703	ieee80211_wake_queues(hw);704	ieee80211_iterate_active_interfaces(hw,705					    IEEE80211_IFACE_ITER_RESUME_ALL,706					    mt7921_vif_connect_iter, NULL);707	mt76_connac_power_save_sched(&dev->mt76.phy, pm);708}709 710void mt7921_coredump_work(struct work_struct *work)711{712	struct mt792x_dev *dev;713	char *dump, *data;714 715	dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev,716						coredump.work.work);717 718	if (time_is_after_jiffies(dev->coredump.last_activity +719				  4 * MT76_CONNAC_COREDUMP_TIMEOUT)) {720		queue_delayed_work(dev->mt76.wq, &dev->coredump.work,721				   MT76_CONNAC_COREDUMP_TIMEOUT);722		return;723	}724 725	dump = vzalloc(MT76_CONNAC_COREDUMP_SZ);726	data = dump;727 728	while (true) {729		struct sk_buff *skb;730 731		spin_lock_bh(&dev->mt76.lock);732		skb = __skb_dequeue(&dev->coredump.msg_list);733		spin_unlock_bh(&dev->mt76.lock);734 735		if (!skb)736			break;737 738		skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd));739		if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) {740			dev_kfree_skb(skb);741			continue;742		}743 744		memcpy(data, skb->data, skb->len);745		data += skb->len;746 747		dev_kfree_skb(skb);748	}749 750	if (dump)751		dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ,752			      GFP_KERNEL);753 754	mt792x_reset(&dev->mt76);755}756 757/* usb_sdio */758static void759mt7921_usb_sdio_write_txwi(struct mt792x_dev *dev, struct mt76_wcid *wcid,760			   enum mt76_txq_id qid, struct ieee80211_sta *sta,761			   struct ieee80211_key_conf *key, int pid,762			   struct sk_buff *skb)763{764	__le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE);765 766	memset(txwi, 0, MT_SDIO_TXD_SIZE);767	mt76_connac2_mac_write_txwi(&dev->mt76, txwi, skb, wcid, key, pid, qid, 0);768	skb_push(skb, MT_SDIO_TXD_SIZE);769}770 771int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,772				   enum mt76_txq_id qid, struct mt76_wcid *wcid,773				   struct ieee80211_sta *sta,774				   struct mt76_tx_info *tx_info)775{776	struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);777	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);778	struct ieee80211_key_conf *key = info->control.hw_key;779	struct sk_buff *skb = tx_info->skb;780	int err, pad, pktid, type;781 782	if (unlikely(tx_info->skb->len <= ETH_HLEN))783		return -EINVAL;784 785	err = skb_cow_head(skb, MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE);786	if (err)787		return err;788 789	if (!wcid)790		wcid = &dev->mt76.global_wcid;791 792	if (sta) {793		struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;794 795		if (time_after(jiffies, msta->deflink.last_txs + HZ / 4)) {796			info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS;797			msta->deflink.last_txs = jiffies;798		}799	}800 801	pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb);802	mt7921_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb);803 804	type = mt76_is_sdio(mdev) ? MT7921_SDIO_DATA : 0;805	mt792x_skb_add_usb_sdio_hdr(dev, skb, type);806	pad = round_up(skb->len, 4) - skb->len;807	if (mt76_is_usb(mdev))808		pad += 4;809 810	err = mt76_skb_adjust_pad(skb, pad);811	if (err)812		/* Release pktid in case of error. */813		idr_remove(&wcid->pktid, pktid);814 815	return err;816}817EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_prepare_skb);818 819void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,820				     struct mt76_queue_entry *e)821{822	__le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE);823	unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE;824	struct ieee80211_sta *sta;825	struct mt76_wcid *wcid;826	u16 idx;827 828	idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX);829	wcid = rcu_dereference(mdev->wcid[idx]);830	sta = wcid_to_sta(wcid);831 832	if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE)))833		mt76_connac2_tx_check_aggr(sta, txwi);834 835	skb_pull(e->skb, headroom);836	mt76_tx_complete_skb(mdev, e->wcid, e->skb);837}838EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_complete_skb);839 840bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update)841{842	struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);843 844	mt792x_mutex_acquire(dev);845	mt7921_mac_sta_poll(dev);846	mt792x_mutex_release(dev);847 848	return false;849}850EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_status_data);851 852#if IS_ENABLED(CONFIG_IPV6)853void mt7921_set_ipv6_ns_work(struct work_struct *work)854{855	struct mt792x_dev *dev = container_of(work, struct mt792x_dev,856					      ipv6_ns_work);857	struct sk_buff *skb;858	int ret = 0;859 860	do {861		skb = skb_dequeue(&dev->ipv6_ns_list);862 863		if (!skb)864			break;865 866		mt792x_mutex_acquire(dev);867		ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,868					    MCU_UNI_CMD(OFFLOAD), true);869		mt792x_mutex_release(dev);870 871	} while (!ret);872 873	if (ret)874		skb_queue_purge(&dev->ipv6_ns_list);875}876#endif877