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1/* SPDX-License-Identifier: GPL-2.0 */2/* Copyright(c) 2009-2012 Realtek Corporation.*/3 4#ifndef __RTL92D_TRX_COMMON_H__5#define __RTL92D_TRX_COMMON_H__6 7#define RX_DRV_INFO_SIZE_UNIT 88 9enum rtl92d_rx_desc_enc {10 RX_DESC_ENC_NONE = 0,11 RX_DESC_ENC_WEP40 = 1,12 RX_DESC_ENC_TKIP_WO_MIC = 2,13 RX_DESC_ENC_TKIP_MIC = 3,14 RX_DESC_ENC_AES = 4,15 RX_DESC_ENC_WEP104 = 5,16};17 18/* macros to read/write various fields in RX or TX descriptors */19 20static inline void set_tx_desc_pkt_size(__le32 *__pdesc, u32 __val)21{22 le32p_replace_bits(__pdesc, __val, GENMASK(15, 0));23}24 25static inline void set_tx_desc_offset(__le32 *__pdesc, u32 __val)26{27 le32p_replace_bits(__pdesc, __val, GENMASK(23, 16));28}29 30static inline void set_tx_desc_htc(__le32 *__pdesc, u32 __val)31{32 le32p_replace_bits(__pdesc, __val, BIT(25));33}34 35static inline void set_tx_desc_last_seg(__le32 *__pdesc, u32 __val)36{37 le32p_replace_bits(__pdesc, __val, BIT(26));38}39 40static inline void set_tx_desc_first_seg(__le32 *__pdesc, u32 __val)41{42 le32p_replace_bits(__pdesc, __val, BIT(27));43}44 45static inline void set_tx_desc_linip(__le32 *__pdesc, u32 __val)46{47 le32p_replace_bits(__pdesc, __val, BIT(28));48}49 50static inline void set_tx_desc_own(__le32 *__pdesc, u32 __val)51{52 le32p_replace_bits(__pdesc, __val, BIT(31));53}54 55static inline u32 get_tx_desc_own(__le32 *__pdesc)56{57 return le32_get_bits(*__pdesc, BIT(31));58}59 60static inline void set_tx_desc_macid(__le32 *__pdesc, u32 __val)61{62 le32p_replace_bits((__pdesc + 1), __val, GENMASK(4, 0));63}64 65static inline void set_tx_desc_agg_enable(__le32 *__pdesc, u32 __val)66{67 le32p_replace_bits((__pdesc + 1), __val, BIT(5));68}69 70static inline void set_tx_desc_rdg_enable(__le32 *__pdesc, u32 __val)71{72 le32p_replace_bits((__pdesc + 1), __val, BIT(7));73}74 75static inline void set_tx_desc_queue_sel(__le32 *__pdesc, u32 __val)76{77 le32p_replace_bits((__pdesc + 1), __val, GENMASK(12, 8));78}79 80static inline void set_tx_desc_rate_id(__le32 *__pdesc, u32 __val)81{82 le32p_replace_bits((__pdesc + 1), __val, GENMASK(19, 16));83}84 85static inline void set_tx_desc_sec_type(__le32 *__pdesc, u32 __val)86{87 le32p_replace_bits((__pdesc + 1), __val, GENMASK(23, 22));88}89 90static inline void set_tx_desc_pkt_offset(__le32 *__pdesc, u32 __val)91{92 le32p_replace_bits((__pdesc + 1), __val, GENMASK(30, 26));93}94 95static inline void set_tx_desc_more_frag(__le32 *__pdesc, u32 __val)96{97 le32p_replace_bits((__pdesc + 2), __val, BIT(17));98}99 100static inline void set_tx_desc_ampdu_density(__le32 *__pdesc, u32 __val)101{102 le32p_replace_bits((__pdesc + 2), __val, GENMASK(22, 20));103}104 105static inline void set_tx_desc_seq(__le32 *__pdesc, u32 __val)106{107 le32p_replace_bits((__pdesc + 3), __val, GENMASK(27, 16));108}109 110static inline void set_tx_desc_pkt_id(__le32 *__pdesc, u32 __val)111{112 le32p_replace_bits((__pdesc + 3), __val, GENMASK(31, 28));113}114 115static inline void set_tx_desc_rts_rate(__le32 *__pdesc, u32 __val)116{117 le32p_replace_bits((__pdesc + 4), __val, GENMASK(4, 0));118}119 120static inline void set_tx_desc_qos(__le32 *__pdesc, u32 __val)121{122 le32p_replace_bits((__pdesc + 4), __val, BIT(6));123}124 125static inline void set_tx_desc_hwseq_en(__le32 *__pdesc, u32 __val)126{127 le32p_replace_bits((__pdesc + 4), __val, BIT(7));128}129 130static inline void set_tx_desc_use_rate(__le32 *__pdesc, u32 __val)131{132 le32p_replace_bits((__pdesc + 4), __val, BIT(8));133}134 135static inline void set_tx_desc_disable_fb(__le32 *__pdesc, u32 __val)136{137 le32p_replace_bits((__pdesc + 4), __val, BIT(10));138}139 140static inline void set_tx_desc_cts2self(__le32 *__pdesc, u32 __val)141{142 le32p_replace_bits((__pdesc + 4), __val, BIT(11));143}144 145static inline void set_tx_desc_rts_enable(__le32 *__pdesc, u32 __val)146{147 le32p_replace_bits((__pdesc + 4), __val, BIT(12));148}149 150static inline void set_tx_desc_hw_rts_enable(__le32 *__pdesc, u32 __val)151{152 le32p_replace_bits((__pdesc + 4), __val, BIT(13));153}154 155static inline void set_tx_desc_tx_sub_carrier(__le32 *__pdesc, u32 __val)156{157 le32p_replace_bits((__pdesc + 4), __val, GENMASK(21, 20));158}159 160static inline void set_tx_desc_data_bw(__le32 *__pdesc, u32 __val)161{162 le32p_replace_bits((__pdesc + 4), __val, BIT(25));163}164 165static inline void set_tx_desc_rts_short(__le32 *__pdesc, u32 __val)166{167 le32p_replace_bits((__pdesc + 4), __val, BIT(26));168}169 170static inline void set_tx_desc_rts_bw(__le32 *__pdesc, u32 __val)171{172 le32p_replace_bits((__pdesc + 4), __val, BIT(27));173}174 175static inline void set_tx_desc_rts_sc(__le32 *__pdesc, u32 __val)176{177 le32p_replace_bits((__pdesc + 4), __val, GENMASK(29, 28));178}179 180static inline void set_tx_desc_rts_stbc(__le32 *__pdesc, u32 __val)181{182 le32p_replace_bits((__pdesc + 4), __val, GENMASK(31, 30));183}184 185static inline void set_tx_desc_tx_rate(__le32 *__pdesc, u32 __val)186{187 le32p_replace_bits((__pdesc + 5), __val, GENMASK(5, 0));188}189 190static inline void set_tx_desc_data_shortgi(__le32 *__pdesc, u32 __val)191{192 le32p_replace_bits((__pdesc + 5), __val, BIT(6));193}194 195static inline void set_tx_desc_data_rate_fb_limit(__le32 *__pdesc, u32 __val)196{197 le32p_replace_bits((__pdesc + 5), __val, GENMASK(12, 8));198}199 200static inline void set_tx_desc_rts_rate_fb_limit(__le32 *__pdesc, u32 __val)201{202 le32p_replace_bits((__pdesc + 5), __val, GENMASK(16, 13));203}204 205static inline void set_tx_desc_max_agg_num(__le32 *__pdesc, u32 __val)206{207 le32p_replace_bits((__pdesc + 6), __val, GENMASK(15, 11));208}209 210static inline void set_tx_desc_tx_buffer_size(__le32 *__pdesc, u32 __val)211{212 le32p_replace_bits((__pdesc + 7), __val, GENMASK(15, 0));213}214 215static inline void set_tx_desc_tx_buffer_address(__le32 *__pdesc, u32 __val)216{217 *(__pdesc + 8) = cpu_to_le32(__val);218}219 220static inline u32 get_tx_desc_tx_buffer_address(__le32 *__pdesc)221{222 return le32_to_cpu(*(__pdesc + 8));223}224 225static inline void set_tx_desc_next_desc_address(__le32 *__pdesc, u32 __val)226{227 *(__pdesc + 10) = cpu_to_le32(__val);228}229 230static inline u32 get_rx_desc_pkt_len(__le32 *__pdesc)231{232 return le32_get_bits(*__pdesc, GENMASK(13, 0));233}234 235static inline u32 get_rx_desc_crc32(__le32 *__pdesc)236{237 return le32_get_bits(*__pdesc, BIT(14));238}239 240static inline u32 get_rx_desc_icv(__le32 *__pdesc)241{242 return le32_get_bits(*__pdesc, BIT(15));243}244 245static inline u32 get_rx_desc_drv_info_size(__le32 *__pdesc)246{247 return le32_get_bits(*__pdesc, GENMASK(19, 16));248}249 250static inline u32 get_rx_desc_enc_type(__le32 *__pdesc)251{252 return le32_get_bits(*__pdesc, GENMASK(22, 20));253}254 255static inline u32 get_rx_desc_shift(__le32 *__pdesc)256{257 return le32_get_bits(*__pdesc, GENMASK(25, 24));258}259 260static inline u32 get_rx_desc_physt(__le32 *__pdesc)261{262 return le32_get_bits(*__pdesc, BIT(26));263}264 265static inline u32 get_rx_desc_swdec(__le32 *__pdesc)266{267 return le32_get_bits(*__pdesc, BIT(27));268}269 270static inline u32 get_rx_desc_own(__le32 *__pdesc)271{272 return le32_get_bits(*__pdesc, BIT(31));273}274 275static inline void set_rx_desc_pkt_len(__le32 *__pdesc, u32 __val)276{277 le32p_replace_bits(__pdesc, __val, GENMASK(13, 0));278}279 280static inline void set_rx_desc_eor(__le32 *__pdesc, u32 __val)281{282 le32p_replace_bits(__pdesc, __val, BIT(30));283}284 285static inline void set_rx_desc_own(__le32 *__pdesc, u32 __val)286{287 le32p_replace_bits(__pdesc, __val, BIT(31));288}289 290static inline u32 get_rx_desc_paggr(__le32 *__pdesc)291{292 return le32_get_bits(*(__pdesc + 1), BIT(14));293}294 295static inline u32 get_rx_desc_faggr(__le32 *__pdesc)296{297 return le32_get_bits(*(__pdesc + 1), BIT(15));298}299 300static inline u32 get_rx_desc_rxmcs(__le32 *__pdesc)301{302 return le32_get_bits(*(__pdesc + 3), GENMASK(5, 0));303}304 305static inline u32 get_rx_desc_rxht(__le32 *__pdesc)306{307 return le32_get_bits(*(__pdesc + 3), BIT(6));308}309 310static inline u32 get_rx_desc_splcp(__le32 *__pdesc)311{312 return le32_get_bits(*(__pdesc + 3), BIT(8));313}314 315static inline u32 get_rx_desc_bw(__le32 *__pdesc)316{317 return le32_get_bits(*(__pdesc + 3), BIT(9));318}319 320static inline u32 get_rx_desc_tsfl(__le32 *__pdesc)321{322 return le32_to_cpu(*(__pdesc + 5));323}324 325static inline u32 get_rx_desc_buff_addr(__le32 *__pdesc)326{327 return le32_to_cpu(*(__pdesc + 6));328}329 330static inline void set_rx_desc_buff_addr(__le32 *__pdesc, u32 __val)331{332 *(__pdesc + 6) = cpu_to_le32(__val);333}334 335/* For 92D early mode */336static inline void set_earlymode_pktnum(__le32 *__paddr, u32 __value)337{338 le32p_replace_bits(__paddr, __value, GENMASK(2, 0));339}340 341static inline void set_earlymode_len0(__le32 *__paddr, u32 __value)342{343 le32p_replace_bits(__paddr, __value, GENMASK(15, 4));344}345 346static inline void set_earlymode_len1(__le32 *__paddr, u32 __value)347{348 le32p_replace_bits(__paddr, __value, GENMASK(27, 16));349}350 351static inline void set_earlymode_len2_1(__le32 *__paddr, u32 __value)352{353 le32p_replace_bits(__paddr, __value, GENMASK(31, 28));354}355 356static inline void set_earlymode_len2_2(__le32 *__paddr, u32 __value)357{358 le32p_replace_bits((__paddr + 1), __value, GENMASK(7, 0));359}360 361static inline void set_earlymode_len3(__le32 *__paddr, u32 __value)362{363 le32p_replace_bits((__paddr + 1), __value, GENMASK(19, 8));364}365 366static inline void set_earlymode_len4(__le32 *__paddr, u32 __value)367{368 le32p_replace_bits((__paddr + 1), __value, GENMASK(31, 20));369}370 371struct rx_fwinfo_92d {372 u8 gain_trsw[4];373 u8 pwdb_all;374 u8 cfosho[4];375 u8 cfotail[4];376 s8 rxevm[2];377 s8 rxsnr[4];378 u8 pdsnr[2];379 u8 csi_current[2];380 u8 csi_target[2];381 u8 sigevm;382 u8 max_ex_pwr;383#ifdef __LITTLE_ENDIAN384 u8 ex_intf_flag:1;385 u8 sgi_en:1;386 u8 rxsc:2;387 u8 reserve:4;388#else389 u8 reserve:4;390 u8 rxsc:2;391 u8 sgi_en:1;392 u8 ex_intf_flag:1;393#endif394} __packed;395 396bool rtl92d_rx_query_desc(struct ieee80211_hw *hw,397 struct rtl_stats *stats,398 struct ieee80211_rx_status *rx_status,399 u8 *pdesc, struct sk_buff *skb);400void rtl92d_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,401 u8 desc_name, u8 *val);402u64 rtl92d_get_desc(struct ieee80211_hw *hw,403 u8 *p_desc, bool istx, u8 desc_name);404 405#endif406