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1// SPDX-License-Identifier: GPL-2.02/* Copyright(c) 2009-2014 Realtek Corporation.*/3 4#include "../wifi.h"5#include "reg.h"6#include "def.h"7#include "phy.h"8#include "rf.h"9#include "dm.h"10 11static bool _rtl92ee_phy_rf6052_config_parafile(struct ieee80211_hw *hw);12 13void rtl92ee_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)14{15 struct rtl_priv *rtlpriv = rtl_priv(hw);16 struct rtl_phy *rtlphy = &rtlpriv->phy;17 18 switch (bandwidth) {19 case HT_CHANNEL_WIDTH_20:20 rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &21 0xfffff3ff) | BIT(10) | BIT(11));22 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,23 rtlphy->rfreg_chnlval[0]);24 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,25 rtlphy->rfreg_chnlval[0]);26 break;27 case HT_CHANNEL_WIDTH_20_40:28 rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &29 0xfffff3ff) | BIT(10));30 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,31 rtlphy->rfreg_chnlval[0]);32 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,33 rtlphy->rfreg_chnlval[0]);34 break;35 default:36 pr_err("unknown bandwidth: %#X\n", bandwidth);37 break;38 }39}40 41bool rtl92ee_phy_rf6052_config(struct ieee80211_hw *hw)42{43 struct rtl_priv *rtlpriv = rtl_priv(hw);44 struct rtl_phy *rtlphy = &rtlpriv->phy;45 46 if (rtlphy->rf_type == RF_1T1R)47 rtlphy->num_total_rfpath = 1;48 else49 rtlphy->num_total_rfpath = 2;50 51 return _rtl92ee_phy_rf6052_config_parafile(hw);52}53 54static bool _rtl92ee_phy_rf6052_config_parafile(struct ieee80211_hw *hw)55{56 struct rtl_priv *rtlpriv = rtl_priv(hw);57 struct rtl_phy *rtlphy = &rtlpriv->phy;58 u32 u4_regvalue = 0;59 u8 rfpath;60 bool rtstatus = true;61 struct bb_reg_def *pphyreg;62 63 for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) {64 pphyreg = &rtlphy->phyreg_def[rfpath];65 66 switch (rfpath) {67 case RF90_PATH_A:68 case RF90_PATH_C:69 u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,70 BRFSI_RFENV);71 break;72 case RF90_PATH_B:73 case RF90_PATH_D:74 u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,75 BRFSI_RFENV << 16);76 break;77 }78 79 rtl_set_bbreg(hw, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);80 udelay(1);81 82 rtl_set_bbreg(hw, pphyreg->rfintfo, BRFSI_RFENV, 0x1);83 udelay(1);84 85 rtl_set_bbreg(hw, pphyreg->rfhssi_para2,86 B3WIREADDREAALENGTH, 0x0);87 udelay(1);88 89 rtl_set_bbreg(hw, pphyreg->rfhssi_para2, B3WIREDATALENGTH, 0x0);90 udelay(1);91 92 switch (rfpath) {93 case RF90_PATH_A:94 rtstatus = rtl92ee_phy_config_rf_with_headerfile(hw,95 (enum radio_path)rfpath);96 break;97 case RF90_PATH_B:98 rtstatus = rtl92ee_phy_config_rf_with_headerfile(hw,99 (enum radio_path)rfpath);100 break;101 case RF90_PATH_C:102 break;103 case RF90_PATH_D:104 break;105 }106 107 switch (rfpath) {108 case RF90_PATH_A:109 case RF90_PATH_C:110 rtl_set_bbreg(hw, pphyreg->rfintfs,111 BRFSI_RFENV, u4_regvalue);112 break;113 case RF90_PATH_B:114 case RF90_PATH_D:115 rtl_set_bbreg(hw, pphyreg->rfintfs,116 BRFSI_RFENV << 16, u4_regvalue);117 break;118 }119 120 if (!rtstatus) {121 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,122 "Radio[%d] Fail!!\n", rfpath);123 return false;124 }125 }126 127 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "\n");128 return rtstatus;129}130