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1/* SPDX-License-Identifier: GPL-2.0 */2/* Copyright(c) 2009-2012 Realtek Corporation.*/3 4#ifndef __RTL_92S_DM_H__5#define __RTL_92S_DM_H__6 7enum dm_dig_alg {8 DIG_ALGO_BY_FALSE_ALARM = 0,9 DIG_ALGO_BY_RSSI = 1,10 DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM = 2,11 DIG_ALGO_BY_TOW_PORT = 3,12 DIG_ALGO_MAX13};14 15enum dm_dig_two_port_alg {16 DIG_TWO_PORT_ALGO_RSSI = 0,17 DIG_TWO_PORT_ALGO_FALSE_ALARM = 1,18};19 20enum dm_dig_dbg {21 DM_DBG_OFF = 0,22 DM_DBG_ON = 1,23 DM_DBG_MAX24};25 26enum dm_dig_sta {27 DM_STA_DIG_OFF = 0,28 DM_STA_DIG_ON,29 DM_STA_DIG_MAX30};31 32enum dm_ratr_sta {33 DM_RATR_STA_HIGH = 0,34 DM_RATR_STA_MIDDLEHIGH = 1,35 DM_RATR_STA_MIDDLE = 2,36 DM_RATR_STA_MIDDLELOW = 3,37 DM_RATR_STA_LOW = 4,38 DM_RATR_STA_ULTRALOW = 5,39 DM_RATR_STA_MAX40};41 42#define DM_TYPE_BYFW 043#define DM_TYPE_BYDRIVER 144 45#define TX_HIGH_PWR_LEVEL_NORMAL 046#define TX_HIGH_PWR_LEVEL_LEVEL1 147#define TX_HIGH_PWR_LEVEL_LEVEL2 248 49#define HAL_DM_DIG_DISABLE BIT(0) /* Disable Dig */50#define HAL_DM_HIPWR_DISABLE BIT(1) /* Disable High Power */51 52#define TX_HIGHPWR_LEVEL_NORMAL 053#define TX_HIGHPWR_LEVEL_NORMAL1 154#define TX_HIGHPWR_LEVEL_NORMAL2 255 56#define TX_POWER_NEAR_FIELD_THRESH_LVL2 7457#define TX_POWER_NEAR_FIELD_THRESH_LVL1 6758 59#define DM_DIG_HIGH_PWR_THRESH_HIGH 7560#define DM_DIG_HIGH_PWR_THRESH_LOW 7061#define DM_DIG_MIN_NETCORE 0x1262 63void rtl92s_dm_watchdog(struct ieee80211_hw *hw);64void rtl92s_dm_init(struct ieee80211_hw *hw);65void rtl92s_dm_init_edca_turbo(struct ieee80211_hw *hw);66 67#endif68