744 lines · c
1// SPDX-License-Identifier: GPL-2.02/* Copyright(c) 2009-2014 Realtek Corporation.*/3 4#include "../wifi.h"5#include "../pci.h"6#include "../base.h"7#include "../stats.h"8#include "reg.h"9#include "def.h"10#include "phy.h"11#include "trx.h"12#include "led.h"13#include "dm.h"14#include "fw.h"15 16static u8 _rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)17{18 __le16 fc = rtl_get_fc(skb);19 20 if (unlikely(ieee80211_is_beacon(fc)))21 return QSLT_BEACON;22 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))23 return QSLT_MGNT;24 25 return skb->priority;26}27 28static void _rtl8723be_query_rxphystatus(struct ieee80211_hw *hw,29 struct rtl_stats *pstatus,30 __le32 *pdesc,31 struct rx_fwinfo_8723be *p_drvinfo,32 bool bpacket_match_bssid,33 bool bpacket_toself,34 bool packet_beacon)35{36 struct rtl_priv *rtlpriv = rtl_priv(hw);37 struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;38 s8 rx_pwr_all = 0, rx_pwr[4];39 u8 rf_rx_num = 0, evm, pwdb_all, pwdb_all_bt = 0;40 u8 i, max_spatial_stream;41 u32 rssi, total_rssi = 0;42 bool is_cck = pstatus->is_cck;43 u8 lan_idx, vga_idx;44 45 /* Record it for next packet processing */46 pstatus->packet_matchbssid = bpacket_match_bssid;47 pstatus->packet_toself = bpacket_toself;48 pstatus->packet_beacon = packet_beacon;49 pstatus->rx_mimo_signalquality[0] = -1;50 pstatus->rx_mimo_signalquality[1] = -1;51 52 if (is_cck) {53 u8 cck_agc_rpt;54 55 cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;56 57 /* (1)Hardware does not provide RSSI for CCK */58 /* (2)PWDB, Average PWDB calculated by59 * hardware (for rate adaptive)60 */61 rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, BIT(9));62 63 lan_idx = ((cck_agc_rpt & 0xE0) >> 5);64 vga_idx = (cck_agc_rpt & 0x1f);65 66 switch (lan_idx) {67 /* 46 53 73 95 201301231630 */68 /* 46 53 77 99 201301241630 */69 case 6:70 rx_pwr_all = -34 - (2 * vga_idx);71 break;72 case 4:73 rx_pwr_all = -14 - (2 * vga_idx);74 break;75 case 1:76 rx_pwr_all = 6 - (2 * vga_idx);77 break;78 case 0:79 rx_pwr_all = 16 - (2 * vga_idx);80 break;81 default:82 break;83 }84 85 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);86 if (pwdb_all > 100)87 pwdb_all = 100;88 89 pstatus->rx_pwdb_all = pwdb_all;90 pstatus->bt_rx_rssi_percentage = pwdb_all;91 pstatus->recvsignalpower = rx_pwr_all;92 93 /* (3) Get Signal Quality (EVM) */94 if (bpacket_match_bssid) {95 u8 sq, sq_rpt;96 if (pstatus->rx_pwdb_all > 40) {97 sq = 100;98 } else {99 sq_rpt = p_phystrpt->cck_sig_qual_ofdm_pwdb_all;100 if (sq_rpt > 64)101 sq = 0;102 else if (sq_rpt < 20)103 sq = 100;104 else105 sq = ((64 - sq_rpt) * 100) / 44;106 }107 pstatus->signalquality = sq;108 pstatus->rx_mimo_signalquality[0] = sq;109 pstatus->rx_mimo_signalquality[1] = -1;110 }111 } else {112 /* (1)Get RSSI for HT rate */113 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {114 /* we will judge RF RX path now. */115 if (rtlpriv->dm.rfpath_rxenable[i])116 rf_rx_num++;117 118 rx_pwr[i] = ((p_phystrpt->path_agc[i].gain & 0x3f) * 2)119 - 110;120 121 pstatus->rx_pwr[i] = rx_pwr[i];122 /* Translate DBM to percentage. */123 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);124 total_rssi += rssi;125 126 pstatus->rx_mimo_signalstrength[i] = (u8)rssi;127 }128 129 /* (2)PWDB, Average PWDB calculated by130 * hardware (for rate adaptive)131 */132 rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1) &133 0x7f) - 110;134 135 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);136 pwdb_all_bt = pwdb_all;137 pstatus->rx_pwdb_all = pwdb_all;138 pstatus->bt_rx_rssi_percentage = pwdb_all_bt;139 pstatus->rxpower = rx_pwr_all;140 pstatus->recvsignalpower = rx_pwr_all;141 142 /* (3)EVM of HT rate */143 if (pstatus->rate >= DESC92C_RATEMCS8 &&144 pstatus->rate <= DESC92C_RATEMCS15)145 max_spatial_stream = 2;146 else147 max_spatial_stream = 1;148 149 for (i = 0; i < max_spatial_stream; i++) {150 evm = rtl_evm_db_to_percentage(151 p_phystrpt->stream_rxevm[i]);152 153 if (bpacket_match_bssid) {154 /* Fill value in RFD, Get the first155 * spatial stream only156 */157 if (i == 0)158 pstatus->signalquality =159 (u8)(evm & 0xff);160 pstatus->rx_mimo_signalquality[i] =161 (u8)(evm & 0xff);162 }163 }164 165 if (bpacket_match_bssid) {166 for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)167 rtl_priv(hw)->dm.cfo_tail[i] =168 (int)p_phystrpt->path_cfotail[i];169 170 if (rtl_priv(hw)->dm.packet_count == 0xffffffff)171 rtl_priv(hw)->dm.packet_count = 0;172 else173 rtl_priv(hw)->dm.packet_count++;174 }175 }176 177 /* UI BSS List signal strength(in percentage),178 * make it good looking, from 0~100.179 */180 if (is_cck)181 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,182 pwdb_all));183 else if (rf_rx_num != 0)184 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,185 total_rssi /= rf_rx_num));186}187 188static void _rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw *hw,189 struct sk_buff *skb,190 struct rtl_stats *pstatus,191 __le32 *pdesc,192 struct rx_fwinfo_8723be *p_drvinfo)193{194 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));195 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));196 struct ieee80211_hdr *hdr;197 u8 *tmp_buf;198 u8 *praddr;199 u8 *psaddr;200 u16 fc, type;201 bool packet_matchbssid, packet_toself, packet_beacon;202 203 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;204 205 hdr = (struct ieee80211_hdr *)tmp_buf;206 fc = le16_to_cpu(hdr->frame_control);207 type = WLAN_FC_GET_TYPE(hdr->frame_control);208 praddr = hdr->addr1;209 psaddr = ieee80211_get_SA(hdr);210 memcpy(pstatus->psaddr, psaddr, ETH_ALEN);211 212 packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&213 (ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?214 hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?215 hdr->addr2 : hdr->addr3)) &&216 (!pstatus->hwerror) &&217 (!pstatus->crc) && (!pstatus->icv));218 219 packet_toself = packet_matchbssid &&220 (ether_addr_equal(praddr, rtlefuse->dev_addr));221 222 /* YP: packet_beacon is not initialized,223 * this assignment is neccesary,224 * otherwise it counld be true in this case225 * the situation is much worse in Kernel 3.10226 */227 if (ieee80211_is_beacon(hdr->frame_control))228 packet_beacon = true;229 else230 packet_beacon = false;231 232 if (packet_beacon && packet_matchbssid)233 rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;234 235 _rtl8723be_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,236 packet_matchbssid,237 packet_toself,238 packet_beacon);239 240 rtl_process_phyinfo(hw, tmp_buf, pstatus);241}242 243static void _rtl8723be_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,244 __le32 *virtualaddress)245{246 u32 dwtmp = 0;247 memset(virtualaddress, 0, 8);248 249 set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);250 if (ptcb_desc->empkt_num == 1) {251 dwtmp = ptcb_desc->empkt_len[0];252 } else {253 dwtmp = ptcb_desc->empkt_len[0];254 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;255 dwtmp += ptcb_desc->empkt_len[1];256 }257 set_earlymode_len0(virtualaddress, dwtmp);258 259 if (ptcb_desc->empkt_num <= 3) {260 dwtmp = ptcb_desc->empkt_len[2];261 } else {262 dwtmp = ptcb_desc->empkt_len[2];263 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;264 dwtmp += ptcb_desc->empkt_len[3];265 }266 set_earlymode_len1(virtualaddress, dwtmp);267 if (ptcb_desc->empkt_num <= 5) {268 dwtmp = ptcb_desc->empkt_len[4];269 } else {270 dwtmp = ptcb_desc->empkt_len[4];271 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;272 dwtmp += ptcb_desc->empkt_len[5];273 }274 set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);275 set_earlymode_len2_2(virtualaddress, dwtmp >> 4);276 if (ptcb_desc->empkt_num <= 7) {277 dwtmp = ptcb_desc->empkt_len[6];278 } else {279 dwtmp = ptcb_desc->empkt_len[6];280 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;281 dwtmp += ptcb_desc->empkt_len[7];282 }283 set_earlymode_len3(virtualaddress, dwtmp);284 if (ptcb_desc->empkt_num <= 9) {285 dwtmp = ptcb_desc->empkt_len[8];286 } else {287 dwtmp = ptcb_desc->empkt_len[8];288 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;289 dwtmp += ptcb_desc->empkt_len[9];290 }291 set_earlymode_len4(virtualaddress, dwtmp);292}293 294bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw,295 struct rtl_stats *status,296 struct ieee80211_rx_status *rx_status,297 u8 *pdesc8, struct sk_buff *skb)298{299 struct rtl_priv *rtlpriv = rtl_priv(hw);300 struct rx_fwinfo_8723be *p_drvinfo;301 struct ieee80211_hdr *hdr;302 u8 wake_match;303 __le32 *pdesc = (__le32 *)pdesc8;304 u32 phystatus = get_rx_desc_physt(pdesc);305 306 status->length = (u16)get_rx_desc_pkt_len(pdesc);307 status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *308 RX_DRV_INFO_SIZE_UNIT;309 status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);310 status->icv = (u16)get_rx_desc_icv(pdesc);311 status->crc = (u16)get_rx_desc_crc32(pdesc);312 status->hwerror = (status->crc | status->icv);313 status->decrypted = !get_rx_desc_swdec(pdesc);314 status->rate = (u8)get_rx_desc_rxmcs(pdesc);315 status->shortpreamble = (u16)get_rx_desc_splcp(pdesc);316 status->isampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);317 status->isfirst_ampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);318 status->timestamp_low = get_rx_desc_tsfl(pdesc);319 status->rx_is40mhzpacket = (bool)get_rx_desc_bw(pdesc);320 status->bandwidth = (u8)get_rx_desc_bw(pdesc);321 status->macid = get_rx_desc_macid(pdesc);322 status->is_ht = (bool)get_rx_desc_rxht(pdesc);323 324 status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);325 326 if (get_rx_status_desc_rpt_sel(pdesc))327 status->packet_report_type = C2H_PACKET;328 else329 status->packet_report_type = NORMAL_RX;330 331 332 if (get_rx_status_desc_pattern_match(pdesc))333 wake_match = BIT(2);334 else if (get_rx_status_desc_magic_match(pdesc))335 wake_match = BIT(1);336 else if (get_rx_status_desc_unicast_match(pdesc))337 wake_match = BIT(0);338 else339 wake_match = 0;340 if (wake_match)341 rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD,342 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",343 wake_match);344 rx_status->freq = hw->conf.chandef.chan->center_freq;345 rx_status->band = hw->conf.chandef.chan->band;346 347 hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +348 status->rx_bufshift);349 350 if (status->crc)351 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;352 353 if (status->rx_is40mhzpacket)354 rx_status->bw = RATE_INFO_BW_40;355 356 if (status->is_ht)357 rx_status->encoding = RX_ENC_HT;358 359 rx_status->flag |= RX_FLAG_MACTIME_START;360 361 /* hw will set status->decrypted true, if it finds the362 * frame is open data frame or mgmt frame.363 * So hw will not decryption robust managment frame364 * for IEEE80211w but still set status->decrypted365 * true, so here we should set it back to undecrypted366 * for IEEE80211w frame, and mac80211 sw will help367 * to decrypt it368 */369 if (status->decrypted) {370 if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&371 (ieee80211_has_protected(hdr->frame_control)))372 rx_status->flag |= RX_FLAG_DECRYPTED;373 else374 rx_status->flag &= ~RX_FLAG_DECRYPTED;375 }376 377 /* rate_idx: index of data rate into band's378 * supported rates or MCS index if HT rates379 * are use (RX_FLAG_HT)380 */381 rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,382 false, status->rate);383 384 rx_status->mactime = status->timestamp_low;385 if (phystatus) {386 p_drvinfo = (struct rx_fwinfo_8723be *)(skb->data +387 status->rx_bufshift);388 389 _rtl8723be_translate_rx_signal_stuff(hw, skb, status,390 pdesc, p_drvinfo);391 }392 rx_status->signal = status->recvsignalpower + 10;393 if (status->packet_report_type == TX_REPORT2) {394 status->macid_valid_entry[0] =395 get_rx_rpt2_desc_macid_valid_1(pdesc);396 status->macid_valid_entry[1] =397 get_rx_rpt2_desc_macid_valid_2(pdesc);398 }399 return true;400}401 402void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw,403 struct ieee80211_hdr *hdr, u8 *pdesc8,404 u8 *txbd, struct ieee80211_tx_info *info,405 struct ieee80211_sta *sta, struct sk_buff *skb,406 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)407{408 struct rtl_priv *rtlpriv = rtl_priv(hw);409 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));410 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));411 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);412 struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);413 __le32 *pdesc = (__le32 *)pdesc8;414 u16 seq_number;415 __le16 fc = hdr->frame_control;416 unsigned int buf_len = 0;417 unsigned int skb_len = skb->len;418 u8 fw_qsel = _rtl8723be_map_hwqueue_to_fwqueue(skb, hw_queue);419 bool firstseg = ((hdr->seq_ctrl &420 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);421 bool lastseg = ((hdr->frame_control &422 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);423 dma_addr_t mapping;424 u8 bw_40 = 0;425 u8 short_gi = 0;426 427 if (mac->opmode == NL80211_IFTYPE_STATION) {428 bw_40 = mac->bw_40;429 } else if (mac->opmode == NL80211_IFTYPE_AP ||430 mac->opmode == NL80211_IFTYPE_ADHOC) {431 if (sta)432 bw_40 = sta->deflink.ht_cap.cap &433 IEEE80211_HT_CAP_SUP_WIDTH_20_40;434 }435 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;436 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);437 /* reserve 8 byte for AMPDU early mode */438 if (rtlhal->earlymode_enable) {439 skb_push(skb, EM_HDR_LEN);440 memset(skb->data, 0, EM_HDR_LEN);441 }442 buf_len = skb->len;443 mapping = dma_map_single(&rtlpci->pdev->dev, skb->data, skb->len,444 DMA_TO_DEVICE);445 if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {446 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "DMA mapping error\n");447 return;448 }449 clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_8723be));450 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {451 firstseg = true;452 lastseg = true;453 }454 if (firstseg) {455 if (rtlhal->earlymode_enable) {456 set_tx_desc_pkt_offset(pdesc, 1);457 set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN +458 EM_HDR_LEN);459 if (ptcb_desc->empkt_num) {460 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,461 "Insert 8 byte.pTcb->EMPktNum:%d\n",462 ptcb_desc->empkt_num);463 _rtl8723be_insert_emcontent(ptcb_desc,464 (__le32 *)(skb->data));465 }466 } else {467 set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);468 }469 470 471 /* ptcb_desc->use_driver_rate = true; */472 set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);473 if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)474 short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;475 else476 short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;477 478 set_tx_desc_data_shortgi(pdesc, short_gi);479 480 if (info->flags & IEEE80211_TX_CTL_AMPDU) {481 set_tx_desc_agg_enable(pdesc, 1);482 set_tx_desc_max_agg_num(pdesc, 0x14);483 }484 set_tx_desc_seq(pdesc, seq_number);485 set_tx_desc_rts_enable(pdesc, ((ptcb_desc->rts_enable &&486 !ptcb_desc->cts_enable) ?487 1 : 0));488 set_tx_desc_hw_rts_enable(pdesc, 0);489 set_tx_desc_cts2self(pdesc, ((ptcb_desc->cts_enable) ?490 1 : 0));491 492 set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);493 494 set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);495 set_tx_desc_rts_short(pdesc,496 ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?497 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :498 (ptcb_desc->rts_use_shortgi ? 1 : 0)));499 500 if (ptcb_desc->tx_enable_sw_calc_duration)501 set_tx_desc_nav_use_hdr(pdesc, 1);502 503 if (bw_40) {504 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {505 set_tx_desc_data_bw(pdesc, 1);506 set_tx_desc_tx_sub_carrier(pdesc, 3);507 } else {508 set_tx_desc_data_bw(pdesc, 0);509 set_tx_desc_tx_sub_carrier(pdesc, mac->cur_40_prime_sc);510 }511 } else {512 set_tx_desc_data_bw(pdesc, 0);513 set_tx_desc_tx_sub_carrier(pdesc, 0);514 }515 516 set_tx_desc_linip(pdesc, 0);517 set_tx_desc_pkt_size(pdesc, (u16)skb_len);518 if (sta) {519 u8 ampdu_density = sta->deflink.ht_cap.ampdu_density;520 set_tx_desc_ampdu_density(pdesc, ampdu_density);521 }522 if (info->control.hw_key) {523 struct ieee80211_key_conf *keyconf =524 info->control.hw_key;525 switch (keyconf->cipher) {526 case WLAN_CIPHER_SUITE_WEP40:527 case WLAN_CIPHER_SUITE_WEP104:528 case WLAN_CIPHER_SUITE_TKIP:529 set_tx_desc_sec_type(pdesc, 0x1);530 break;531 case WLAN_CIPHER_SUITE_CCMP:532 set_tx_desc_sec_type(pdesc, 0x3);533 break;534 default:535 set_tx_desc_sec_type(pdesc, 0x0);536 break;537 }538 }539 540 set_tx_desc_queue_sel(pdesc, fw_qsel);541 set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);542 set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);543 set_tx_desc_disable_fb(pdesc, ptcb_desc->disable_ratefallback ?544 1 : 0);545 set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);546 547 /* Set TxRate and RTSRate in TxDesc */548 /* This prevent Tx initial rate of new-coming packets */549 /* from being overwritten by retried packet rate.*/550 if (ieee80211_is_data_qos(fc)) {551 if (mac->rdg_en) {552 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,553 "Enable RDG function.\n");554 set_tx_desc_rdg_enable(pdesc, 1);555 set_tx_desc_htc(pdesc, 1);556 }557 }558 /* tx report */559 rtl_set_tx_report(ptcb_desc, pdesc8, hw, tx_info);560 }561 562 set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));563 set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));564 set_tx_desc_tx_buffer_size(pdesc, (u16)buf_len);565 set_tx_desc_tx_buffer_address(pdesc, mapping);566 /* if (rtlpriv->dm.useramask) { */567 if (1) {568 set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);569 set_tx_desc_macid(pdesc, ptcb_desc->mac_id);570 } else {571 set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);572 set_tx_desc_macid(pdesc, ptcb_desc->mac_id);573 }574 if (!ieee80211_is_data_qos(fc)) {575 set_tx_desc_hwseq_en(pdesc, 1);576 set_tx_desc_hwseq_sel(pdesc, 0);577 }578 set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));579 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||580 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {581 set_tx_desc_bmc(pdesc, 1);582 }583 584 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");585}586 587void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc8,588 struct sk_buff *skb)589{590 struct rtl_priv *rtlpriv = rtl_priv(hw);591 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));592 u8 fw_queue = QSLT_BEACON;593 __le32 *pdesc = (__le32 *)pdesc8;594 595 dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,596 skb->len, DMA_TO_DEVICE);597 598 if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {599 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,600 "DMA mapping error\n");601 return;602 }603 clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE);604 605 set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);606 607 set_tx_desc_tx_rate(pdesc, DESC92C_RATE1M);608 609 set_tx_desc_seq(pdesc, 0);610 611 set_tx_desc_linip(pdesc, 0);612 613 set_tx_desc_queue_sel(pdesc, fw_queue);614 615 set_tx_desc_first_seg(pdesc, 1);616 set_tx_desc_last_seg(pdesc, 1);617 618 set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));619 620 set_tx_desc_tx_buffer_address(pdesc, mapping);621 622 set_tx_desc_rate_id(pdesc, 0);623 set_tx_desc_macid(pdesc, 0);624 625 set_tx_desc_own(pdesc, 1);626 627 set_tx_desc_pkt_size(pdesc, (u16)(skb->len));628 629 set_tx_desc_first_seg(pdesc, 1);630 set_tx_desc_last_seg(pdesc, 1);631 632 set_tx_desc_use_rate(pdesc, 1);633 634 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,635 "H2C Tx Cmd Content\n", pdesc, TX_DESC_SIZE);636}637 638void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc8,639 bool istx, u8 desc_name, u8 *val)640{641 __le32 *pdesc = (__le32 *)pdesc8;642 643 if (istx) {644 switch (desc_name) {645 case HW_DESC_OWN:646 set_tx_desc_own(pdesc, 1);647 break;648 case HW_DESC_TX_NEXTDESC_ADDR:649 set_tx_desc_next_desc_address(pdesc, *(u32 *)val);650 break;651 default:652 WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not processed\n",653 desc_name);654 break;655 }656 } else {657 switch (desc_name) {658 case HW_DESC_RXOWN:659 set_rx_desc_own(pdesc, 1);660 break;661 case HW_DESC_RXBUFF_ADDR:662 set_rx_desc_buff_addr(pdesc, *(u32 *)val);663 break;664 case HW_DESC_RXPKT_LEN:665 set_rx_desc_pkt_len(pdesc, *(u32 *)val);666 break;667 case HW_DESC_RXERO:668 set_rx_desc_eor(pdesc, 1);669 break;670 default:671 WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not process\n",672 desc_name);673 break;674 }675 }676}677 678u64 rtl8723be_get_desc(struct ieee80211_hw *hw,679 u8 *pdesc8, bool istx, u8 desc_name)680{681 u32 ret = 0;682 __le32 *pdesc = (__le32 *)pdesc8;683 684 if (istx) {685 switch (desc_name) {686 case HW_DESC_OWN:687 ret = get_tx_desc_own(pdesc);688 break;689 case HW_DESC_TXBUFF_ADDR:690 ret = get_tx_desc_tx_buffer_address(pdesc);691 break;692 default:693 WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not process\n",694 desc_name);695 break;696 }697 } else {698 switch (desc_name) {699 case HW_DESC_OWN:700 ret = get_rx_desc_own(pdesc);701 break;702 case HW_DESC_RXPKT_LEN:703 ret = get_rx_desc_pkt_len(pdesc);704 break;705 case HW_DESC_RXBUFF_ADDR:706 ret = get_rx_desc_buff_addr(pdesc);707 break;708 default:709 WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not processed\n",710 desc_name);711 break;712 }713 }714 return ret;715}716 717bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw,718 u8 hw_queue, u16 index)719{720 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));721 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];722 u8 *entry = (u8 *)(&ring->desc[ring->idx]);723 u8 own = (u8)rtl8723be_get_desc(hw, entry, true, HW_DESC_OWN);724 725 /*beacon packet will only use the first726 *descriptor defautly,and the own may not727 *be cleared by the hardware728 */729 if (own)730 return false;731 return true;732}733 734void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)735{736 struct rtl_priv *rtlpriv = rtl_priv(hw);737 if (hw_queue == BEACON_QUEUE) {738 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));739 } else {740 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,741 BIT(0) << (hw_queue));742 }743}744