647 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/* Copyright(c) 2009-2014 Realtek Corporation.*/3 4#ifndef __RTL8723BE_TRX_H__5#define __RTL8723BE_TRX_H__6 7#define TX_DESC_SIZE 408#define TX_DESC_AGGR_SUBFRAME_SIZE 329 10#define RX_DESC_SIZE 3211#define RX_DRV_INFO_SIZE_UNIT 812 13#define TX_DESC_NEXT_DESC_OFFSET 4014#define USB_HWDESC_HEADER_LEN 4015#define CRCLENGTH 416 17static inline void set_tx_desc_pkt_size(__le32 *__pdesc, u32 __val)18{19 le32p_replace_bits(__pdesc, __val, GENMASK(15, 0));20}21 22static inline void set_tx_desc_offset(__le32 *__pdesc, u32 __val)23{24 le32p_replace_bits(__pdesc, __val, GENMASK(23, 16));25}26 27static inline void set_tx_desc_bmc(__le32 *__pdesc, u32 __val)28{29 le32p_replace_bits(__pdesc, __val, BIT(24));30}31 32static inline void set_tx_desc_htc(__le32 *__pdesc, u32 __val)33{34 le32p_replace_bits(__pdesc, __val, BIT(25));35}36 37static inline void set_tx_desc_last_seg(__le32 *__pdesc, u32 __val)38{39 le32p_replace_bits(__pdesc, __val, BIT(26));40}41 42static inline void set_tx_desc_first_seg(__le32 *__pdesc, u32 __val)43{44 le32p_replace_bits(__pdesc, __val, BIT(27));45}46 47static inline void set_tx_desc_linip(__le32 *__pdesc, u32 __val)48{49 le32p_replace_bits(__pdesc, __val, BIT(28));50}51 52static inline void set_tx_desc_own(__le32 *__pdesc, u32 __val)53{54 le32p_replace_bits(__pdesc, __val, BIT(31));55}56 57static inline u32 get_tx_desc_own(__le32 *__pdesc)58{59 return le32_get_bits(*__pdesc, BIT(31));60}61 62static inline void set_tx_desc_macid(__le32 *__pdesc, u32 __val)63{64 le32p_replace_bits((__pdesc + 1), __val, GENMASK(6, 0));65}66 67static inline void set_tx_desc_queue_sel(__le32 *__pdesc, u32 __val)68{69 le32p_replace_bits((__pdesc + 1), __val, GENMASK(12, 8));70}71 72static inline void set_tx_desc_rate_id(__le32 *__pdesc, u32 __val)73{74 le32p_replace_bits((__pdesc + 1), __val, GENMASK(20, 16));75}76 77static inline void set_tx_desc_sec_type(__le32 *__pdesc, u32 __val)78{79 le32p_replace_bits((__pdesc + 1), __val, GENMASK(23, 22));80}81 82static inline void set_tx_desc_pkt_offset(__le32 *__pdesc, u32 __val)83{84 le32p_replace_bits((__pdesc + 1), __val, GENMASK(28, 24));85}86 87static inline void set_tx_desc_agg_enable(__le32 *__pdesc, u32 __val)88{89 le32p_replace_bits((__pdesc + 2), __val, BIT(12));90}91 92static inline void set_tx_desc_rdg_enable(__le32 *__pdesc, u32 __val)93{94 le32p_replace_bits((__pdesc + 2), __val, BIT(13));95}96 97static inline void set_tx_desc_more_frag(__le32 *__pdesc, u32 __val)98{99 le32p_replace_bits((__pdesc + 2), __val, BIT(17));100}101 102static inline void set_tx_desc_ampdu_density(__le32 *__pdesc, u32 __val)103{104 le32p_replace_bits((__pdesc + 2), __val, GENMASK(22, 20));105}106 107static inline void set_tx_desc_hwseq_sel(__le32 *__pdesc, u32 __val)108{109 le32p_replace_bits((__pdesc + 3), __val, GENMASK(7, 6));110}111 112static inline void set_tx_desc_use_rate(__le32 *__pdesc, u32 __val)113{114 le32p_replace_bits((__pdesc + 3), __val, BIT(8));115}116 117static inline void set_tx_desc_disable_fb(__le32 *__pdesc, u32 __val)118{119 le32p_replace_bits((__pdesc + 3), __val, BIT(10));120}121 122static inline void set_tx_desc_cts2self(__le32 *__pdesc, u32 __val)123{124 le32p_replace_bits((__pdesc + 3), __val, BIT(11));125}126 127static inline void set_tx_desc_rts_enable(__le32 *__pdesc, u32 __val)128{129 le32p_replace_bits((__pdesc + 3), __val, BIT(12));130}131 132static inline void set_tx_desc_hw_rts_enable(__le32 *__pdesc, u32 __val)133{134 le32p_replace_bits((__pdesc + 3), __val, BIT(13));135}136 137static inline void set_tx_desc_nav_use_hdr(__le32 *__pdesc, u32 __val)138{139 le32p_replace_bits((__pdesc + 3), __val, BIT(15));140}141 142static inline void set_tx_desc_max_agg_num(__le32 *__pdesc, u32 __val)143{144 le32p_replace_bits((__pdesc + 3), __val, GENMASK(21, 17));145}146 147static inline void set_tx_desc_tx_rate(__le32 *__pdesc, u32 __val)148{149 le32p_replace_bits((__pdesc + 4), __val, GENMASK(6, 0));150}151 152static inline void set_tx_desc_data_rate_fb_limit(__le32 *__pdesc, u32 __val)153{154 le32p_replace_bits((__pdesc + 4), __val, GENMASK(12, 8));155}156 157static inline void set_tx_desc_rts_rate_fb_limit(__le32 *__pdesc, u32 __val)158{159 le32p_replace_bits((__pdesc + 4), __val, GENMASK(16, 13));160}161 162static inline void set_tx_desc_rts_rate(__le32 *__pdesc, u32 __val)163{164 le32p_replace_bits((__pdesc + 4), __val, GENMASK(28, 24));165}166 167static inline void set_tx_desc_tx_sub_carrier(__le32 *__pdesc, u32 __val)168{169 le32p_replace_bits((__pdesc + 5), __val, GENMASK(3, 0));170}171 172static inline void set_tx_desc_data_shortgi(__le32 *__pdesc, u32 __val)173{174 le32p_replace_bits((__pdesc + 5), __val, BIT(4));175}176 177static inline void set_tx_desc_data_bw(__le32 *__pdesc, u32 __val)178{179 le32p_replace_bits((__pdesc + 5), __val, GENMASK(6, 5));180}181 182static inline void set_tx_desc_rts_short(__le32 *__pdesc, u32 __val)183{184 le32p_replace_bits((__pdesc + 5), __val, BIT(12));185}186 187static inline void set_tx_desc_rts_sc(__le32 *__pdesc, u32 __val)188{189 le32p_replace_bits((__pdesc + 5), __val, GENMASK(16, 13));190}191 192static inline void set_tx_desc_tx_buffer_size(__le32 *__pdesc, u32 __val)193{194 le32p_replace_bits((__pdesc + 7), __val, GENMASK(15, 0));195}196 197static inline void set_tx_desc_hwseq_en(__le32 *__pdesc, u32 __val)198{199 le32p_replace_bits((__pdesc + 8), __val, BIT(15));200}201 202static inline void set_tx_desc_seq(__le32 *__pdesc, u32 __val)203{204 le32p_replace_bits((__pdesc + 9), __val, GENMASK(23, 12));205}206 207static inline void set_tx_desc_tx_buffer_address(__le32 *__pdesc, u32 __val)208{209 *(__pdesc + 10) = cpu_to_le32(__val);210}211 212static inline u32 get_tx_desc_tx_buffer_address(__le32 *__pdesc)213{214 return le32_to_cpu(*((__pdesc + 10)));215}216 217static inline void set_tx_desc_next_desc_address(__le32 *__pdesc, u32 __val)218{219 *(__pdesc + 12) = cpu_to_le32(__val);220}221 222static inline u32 get_rx_desc_pkt_len(__le32 *__pdesc)223{224 return le32_get_bits(*__pdesc, GENMASK(13, 0));225}226 227static inline u32 get_rx_desc_crc32(__le32 *__pdesc)228{229 return le32_get_bits(*__pdesc, BIT(14));230}231 232static inline u32 get_rx_desc_icv(__le32 *__pdesc)233{234 return le32_get_bits(*__pdesc, BIT(15));235}236 237static inline u32 get_rx_desc_drv_info_size(__le32 *__pdesc)238{239 return le32_get_bits(*__pdesc, GENMASK(19, 16));240}241 242static inline u32 get_rx_desc_shift(__le32 *__pdesc)243{244 return le32_get_bits(*__pdesc, GENMASK(25, 24));245}246 247static inline u32 get_rx_desc_physt(__le32 *__pdesc)248{249 return le32_get_bits(*__pdesc, BIT(26));250}251 252static inline u32 get_rx_desc_swdec(__le32 *__pdesc)253{254 return le32_get_bits(*__pdesc, BIT(27));255}256 257static inline u32 get_rx_desc_own(__le32 *__pdesc)258{259 return le32_get_bits(*__pdesc, BIT(31));260}261 262static inline void set_rx_desc_pkt_len(__le32 *__pdesc, u32 __val)263{264 le32p_replace_bits(__pdesc, __val, GENMASK(13, 0));265}266 267static inline void set_rx_desc_eor(__le32 *__pdesc, u32 __val)268{269 le32p_replace_bits(__pdesc, __val, BIT(30));270}271 272static inline void set_rx_desc_own(__le32 *__pdesc, u32 __val)273{274 le32p_replace_bits(__pdesc, __val, BIT(31));275}276 277static inline u32 get_rx_desc_macid(__le32 *__pdesc)278{279 return le32_get_bits(*(__pdesc + 1), GENMASK(6, 0));280}281 282static inline u32 get_rx_desc_paggr(__le32 *__pdesc)283{284 return le32_get_bits(*(__pdesc + 1), BIT(15));285}286 287static inline u32 get_rx_status_desc_rpt_sel(__le32 *__pdesc)288{289 return le32_get_bits(*(__pdesc + 2), BIT(28));290}291 292static inline u32 get_rx_desc_rxmcs(__le32 *__pdesc)293{294 return le32_get_bits(*(__pdesc + 3), GENMASK(6, 0));295}296 297static inline u32 get_rx_desc_rxht(__le32 *__pdesc)298{299 return le32_get_bits(*(__pdesc + 3), BIT(6));300}301 302static inline u32 get_rx_status_desc_pattern_match(__le32 *__pdesc)303{304 return le32_get_bits(*(__pdesc + 3), BIT(29));305}306 307static inline u32 get_rx_status_desc_unicast_match(__le32 *__pdesc)308{309 return le32_get_bits(*(__pdesc + 3), BIT(30));310}311 312static inline u32 get_rx_status_desc_magic_match(__le32 *__pdesc)313{314 return le32_get_bits(*(__pdesc + 3), BIT(31));315}316 317static inline u32 get_rx_desc_splcp(__le32 *__pdesc)318{319 return le32_get_bits(*(__pdesc + 4), BIT(0));320}321 322static inline u32 get_rx_desc_bw(__le32 *__pdesc)323{324 return le32_get_bits(*(__pdesc + 4), GENMASK(5, 4));325}326 327static inline u32 get_rx_desc_tsfl(__le32 *__pdesc)328{329 return le32_to_cpu(*((__pdesc + 5)));330}331 332static inline u32 get_rx_desc_buff_addr(__le32 *__pdesc)333{334 return le32_to_cpu(*((__pdesc + 6)));335}336 337static inline void set_rx_desc_buff_addr(__le32 *__pdesc, u32 __val)338{339 *(__pdesc + 6) = cpu_to_le32(__val);340}341 342/* TX report 2 format in Rx desc*/343 344static inline u32 get_rx_rpt2_desc_macid_valid_1(__le32 *__rxstatusdesc)345{346 return le32_to_cpu(*((__rxstatusdesc + 4)));347}348 349static inline u32 get_rx_rpt2_desc_macid_valid_2(__le32 *__rxstatusdesc)350{351 return le32_to_cpu(*((__rxstatusdesc + 5)));352}353 354static inline void set_earlymode_pktnum(__le32 *__paddr, u32 __value)355{356 le32p_replace_bits(__paddr, __value, GENMASK(3, 0));357}358 359static inline void set_earlymode_len0(__le32 *__paddr, u32 __value)360{361 le32p_replace_bits(__paddr, __value, GENMASK(15, 4));362}363 364static inline void set_earlymode_len1(__le32 *__paddr, u32 __value)365{366 le32p_replace_bits(__paddr, __value, GENMASK(27, 16));367}368 369static inline void set_earlymode_len2_1(__le32 *__paddr, u32 __value)370{371 le32p_replace_bits(__paddr, __value, GENMASK(31, 28));372}373 374static inline void set_earlymode_len2_2(__le32 *__paddr, u32 __value)375{376 le32p_replace_bits((__paddr + 1), __value, GENMASK(7, 0));377}378 379static inline void set_earlymode_len3(__le32 *__paddr, u32 __value)380{381 le32p_replace_bits((__paddr + 1), __value, GENMASK(19, 8));382}383 384static inline void set_earlymode_len4(__le32 *__paddr, u32 __value)385{386 le32p_replace_bits((__paddr + 1), __value, GENMASK(31, 20));387}388 389static inline void clear_pci_tx_desc_content(__le32 *__pdesc, u32 _size)390{391 if (_size > TX_DESC_NEXT_DESC_OFFSET)392 memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);393 else394 memset(__pdesc, 0, _size);395}396 397struct phy_rx_agc_info_t {398 #ifdef __LITTLE_ENDIAN399 u8 gain:7, trsw:1;400 #else401 u8 trsw:1, gain:7;402 #endif403};404struct phy_status_rpt {405 struct phy_rx_agc_info_t path_agc[2];406 u8 ch_corr[2];407 u8 cck_sig_qual_ofdm_pwdb_all;408 u8 cck_agc_rpt_ofdm_cfosho_a;409 u8 cck_rpt_b_ofdm_cfosho_b;410 u8 rsvd_1;/* ch_corr_msb; */411 u8 noise_power_db_msb;412 s8 path_cfotail[2];413 u8 pcts_mask[2];414 s8 stream_rxevm[2];415 u8 path_rxsnr[2];416 u8 noise_power_db_lsb;417 u8 rsvd_2[3];418 u8 stream_csi[2];419 u8 stream_target_csi[2];420 u8 sig_evm;421 u8 rsvd_3;422#ifdef __LITTLE_ENDIAN423 u8 antsel_rx_keep_2:1; /*ex_intf_flg:1;*/424 u8 sgi_en:1;425 u8 rxsc:2;426 u8 idle_long:1;427 u8 r_ant_train_en:1;428 u8 ant_sel_b:1;429 u8 ant_sel:1;430#else /* _BIG_ENDIAN_ */431 u8 ant_sel:1;432 u8 ant_sel_b:1;433 u8 r_ant_train_en:1;434 u8 idle_long:1;435 u8 rxsc:2;436 u8 sgi_en:1;437 u8 antsel_rx_keep_2:1; /*ex_intf_flg:1;*/438#endif439} __packed;440 441struct rx_fwinfo_8723be {442 u8 gain_trsw[2];443 u16 chl_num:10;444 u16 sub_chnl:4;445 u16 r_rfmod:2;446 u8 pwdb_all;447 u8 cfosho[4];448 u8 cfotail[4];449 s8 rxevm[2];450 s8 rxsnr[2];451 u8 pcts_msk_rpt[2];452 u8 pdsnr[2];453 u8 csi_current[2];454 u8 rx_gain_c;455 u8 rx_gain_d;456 u8 sigevm;457 u8 resvd_0;458 u8 antidx_anta:3;459 u8 antidx_antb:3;460 u8 resvd_1:2;461} __packed;462 463struct tx_desc_8723be {464 u32 pktsize:16;465 u32 offset:8;466 u32 bmc:1;467 u32 htc:1;468 u32 lastseg:1;469 u32 firstseg:1;470 u32 linip:1;471 u32 noacm:1;472 u32 gf:1;473 u32 own:1;474 475 u32 macid:6;476 u32 rsvd0:2;477 u32 queuesel:5;478 u32 rd_nav_ext:1;479 u32 lsig_txop_en:1;480 u32 pifs:1;481 u32 rateid:4;482 u32 nav_usehdr:1;483 u32 en_descid:1;484 u32 sectype:2;485 u32 pktoffset:8;486 487 u32 rts_rc:6;488 u32 data_rc:6;489 u32 agg_en:1;490 u32 rdg_en:1;491 u32 bar_retryht:2;492 u32 agg_break:1;493 u32 morefrag:1;494 u32 raw:1;495 u32 ccx:1;496 u32 ampdudensity:3;497 u32 bt_int:1;498 u32 ant_sela:1;499 u32 ant_selb:1;500 u32 txant_cck:2;501 u32 txant_l:2;502 u32 txant_ht:2;503 504 u32 nextheadpage:8;505 u32 tailpage:8;506 u32 seq:12;507 u32 cpu_handle:1;508 u32 tag1:1;509 u32 trigger_int:1;510 u32 hwseq_en:1;511 512 u32 rtsrate:5;513 u32 apdcfe:1;514 u32 qos:1;515 u32 hwseq_ssn:1;516 u32 userrate:1;517 u32 dis_rtsfb:1;518 u32 dis_datafb:1;519 u32 cts2self:1;520 u32 rts_en:1;521 u32 hwrts_en:1;522 u32 portid:1;523 u32 pwr_status:3;524 u32 waitdcts:1;525 u32 cts2ap_en:1;526 u32 txsc:2;527 u32 stbc:2;528 u32 txshort:1;529 u32 txbw:1;530 u32 rtsshort:1;531 u32 rtsbw:1;532 u32 rtssc:2;533 u32 rtsstbc:2;534 535 u32 txrate:6;536 u32 shortgi:1;537 u32 ccxt:1;538 u32 txrate_fb_lmt:5;539 u32 rtsrate_fb_lmt:4;540 u32 retrylmt_en:1;541 u32 txretrylmt:6;542 u32 usb_txaggnum:8;543 544 u32 txagca:5;545 u32 txagcb:5;546 u32 usemaxlen:1;547 u32 maxaggnum:5;548 u32 mcsg1maxlen:4;549 u32 mcsg2maxlen:4;550 u32 mcsg3maxlen:4;551 u32 mcs7sgimaxlen:4;552 553 u32 txbuffersize:16;554 u32 sw_offset30:8;555 u32 sw_offset31:4;556 u32 rsvd1:1;557 u32 antsel_c:1;558 u32 null_0:1;559 u32 null_1:1;560 561 u32 txbuffaddr;562 u32 txbufferaddr64;563 u32 nextdescaddress;564 u32 nextdescaddress64;565 566 u32 reserve_pass_pcie_mm_limit[4];567} __packed;568 569struct rx_desc_8723be {570 u32 length:14;571 u32 crc32:1;572 u32 icverror:1;573 u32 drv_infosize:4;574 u32 security:3;575 u32 qos:1;576 u32 shift:2;577 u32 phystatus:1;578 u32 swdec:1;579 u32 lastseg:1;580 u32 firstseg:1;581 u32 eor:1;582 u32 own:1;583 584 u32 macid:6;585 u32 tid:4;586 u32 hwrsvd:5;587 u32 paggr:1;588 u32 faggr:1;589 u32 a1_fit:4;590 u32 a2_fit:4;591 u32 pam:1;592 u32 pwr:1;593 u32 moredata:1;594 u32 morefrag:1;595 u32 type:2;596 u32 mc:1;597 u32 bc:1;598 599 u32 seq:12;600 u32 frag:4;601 u32 nextpktlen:14;602 u32 nextind:1;603 u32 rsvd:1;604 605 u32 rxmcs:6;606 u32 rxht:1;607 u32 amsdu:1;608 u32 splcp:1;609 u32 bandwidth:1;610 u32 htc:1;611 u32 tcpchk_rpt:1;612 u32 ipcchk_rpt:1;613 u32 tcpchk_valid:1;614 u32 hwpcerr:1;615 u32 hwpcind:1;616 u32 iv0:16;617 618 u32 iv1;619 620 u32 tsfl;621 622 u32 bufferaddress;623 u32 bufferaddress64;624 625} __packed;626 627void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw,628 struct ieee80211_hdr *hdr,629 u8 *pdesc_tx, u8 *txbd,630 struct ieee80211_tx_info *info,631 struct ieee80211_sta *sta, struct sk_buff *skb,632 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc);633bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw,634 struct rtl_stats *status,635 struct ieee80211_rx_status *rx_status,636 u8 *pdesc, struct sk_buff *skb);637void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc,638 bool istx, u8 desc_name, u8 *val);639u64 rtl8723be_get_desc(struct ieee80211_hw *hw,640 u8 *pdesc, bool istx, u8 desc_name);641bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw,642 u8 hw_queue, u16 index);643void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue);644void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,645 struct sk_buff *skb);646#endif647