270 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/* Copyright(c) 2009-2010 Realtek Corporation.*/3 4#ifndef __RTL8821AE_DEF_H__5#define __RTL8821AE_DEF_H__6 7/*--------------------------Define -------------------------------------------*/8#define USE_SPECIFIC_FW_TO_SUPPORT_WOWLAN 19 10/* BIT 7 HT Rate*/11/*TxHT = 0*/12#define MGN_1M 0x0213#define MGN_2M 0x0414#define MGN_5_5M 0x0b15#define MGN_11M 0x1616 17#define MGN_6M 0x0c18#define MGN_9M 0x1219#define MGN_12M 0x1820#define MGN_18M 0x2421#define MGN_24M 0x3022#define MGN_36M 0x4823#define MGN_48M 0x6024#define MGN_54M 0x6c25 26/* TxHT = 1 */27#define MGN_MCS0 0x8028#define MGN_MCS1 0x8129#define MGN_MCS2 0x8230#define MGN_MCS3 0x8331#define MGN_MCS4 0x8432#define MGN_MCS5 0x8533#define MGN_MCS6 0x8634#define MGN_MCS7 0x8735#define MGN_MCS8 0x8836#define MGN_MCS9 0x8937#define MGN_MCS10 0x8a38#define MGN_MCS11 0x8b39#define MGN_MCS12 0x8c40#define MGN_MCS13 0x8d41#define MGN_MCS14 0x8e42#define MGN_MCS15 0x8f43/* VHT rate */44#define MGN_VHT1SS_MCS0 0x9045#define MGN_VHT1SS_MCS1 0x9146#define MGN_VHT1SS_MCS2 0x9247#define MGN_VHT1SS_MCS3 0x9348#define MGN_VHT1SS_MCS4 0x9449#define MGN_VHT1SS_MCS5 0x9550#define MGN_VHT1SS_MCS6 0x9651#define MGN_VHT1SS_MCS7 0x9752#define MGN_VHT1SS_MCS8 0x9853#define MGN_VHT1SS_MCS9 0x9954#define MGN_VHT2SS_MCS0 0x9a55#define MGN_VHT2SS_MCS1 0x9b56#define MGN_VHT2SS_MCS2 0x9c57#define MGN_VHT2SS_MCS3 0x9d58#define MGN_VHT2SS_MCS4 0x9e59#define MGN_VHT2SS_MCS5 0x9f60#define MGN_VHT2SS_MCS6 0xa061#define MGN_VHT2SS_MCS7 0xa162#define MGN_VHT2SS_MCS8 0xa263#define MGN_VHT2SS_MCS9 0xa364 65#define MGN_VHT3SS_MCS0 0xa466#define MGN_VHT3SS_MCS1 0xa567#define MGN_VHT3SS_MCS2 0xa668#define MGN_VHT3SS_MCS3 0xa769#define MGN_VHT3SS_MCS4 0xa870#define MGN_VHT3SS_MCS5 0xa971#define MGN_VHT3SS_MCS6 0xaa72#define MGN_VHT3SS_MCS7 0xab73#define MGN_VHT3SS_MCS8 0xac74#define MGN_VHT3SS_MCS9 0xad75 76#define MGN_MCS0_SG 0xc077#define MGN_MCS1_SG 0xc178#define MGN_MCS2_SG 0xc279#define MGN_MCS3_SG 0xc380#define MGN_MCS4_SG 0xc481#define MGN_MCS5_SG 0xc582#define MGN_MCS6_SG 0xc683#define MGN_MCS7_SG 0xc784#define MGN_MCS8_SG 0xc885#define MGN_MCS9_SG 0xc986#define MGN_MCS10_SG 0xca87#define MGN_MCS11_SG 0xcb88#define MGN_MCS12_SG 0xcc89#define MGN_MCS13_SG 0xcd90#define MGN_MCS14_SG 0xce91#define MGN_MCS15_SG 0xcf92 93#define MGN_UNKNOWN 0xff94 95/* 30 ms */96#define WIFI_NAV_UPPER_US 3000097#define HAL_92C_NAV_UPPER_UNIT 12898 99#define MAX_RX_DMA_BUFFER_SIZE 0x3E80100 101#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0102#define HAL_PRIME_CHNL_OFFSET_LOWER 1103#define HAL_PRIME_CHNL_OFFSET_UPPER 2104 105#define RX_MPDU_QUEUE 0106#define RX_CMD_QUEUE 1107 108#define MAX_RX_DMA_BUFFER_SIZE_8812 0x3E80109 110#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)111 112#define CHIP_8812 BIT(2)113#define CHIP_8821 (BIT(0)|BIT(2))114 115#define CHIP_8821A (BIT(0)|BIT(2))116#define NORMAL_CHIP BIT(3)117#define RF_TYPE_1T1R (~(BIT(4)|BIT(5)|BIT(6)))118#define RF_TYPE_1T2R BIT(4)119#define RF_TYPE_2T2R BIT(5)120#define CHIP_VENDOR_UMC BIT(7)121#define B_CUT_VERSION BIT(12)122#define C_CUT_VERSION BIT(13)123#define D_CUT_VERSION ((BIT(12)|BIT(13)))124#define E_CUT_VERSION BIT(14)125#define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28))126 127enum version_8821ae {128 VERSION_TEST_CHIP_1T1R_8812 = 0x0004,129 VERSION_TEST_CHIP_2T2R_8812 = 0x0024,130 VERSION_NORMAL_TSMC_CHIP_1T1R_8812 = 0x100c,131 VERSION_NORMAL_TSMC_CHIP_2T2R_8812 = 0x102c,132 VERSION_NORMAL_TSMC_CHIP_1T1R_8812_C_CUT = 0x200c,133 VERSION_NORMAL_TSMC_CHIP_2T2R_8812_C_CUT = 0x202c,134 VERSION_TEST_CHIP_8821 = 0x0005,135 VERSION_NORMAL_TSMC_CHIP_8821 = 0x000d,136 VERSION_NORMAL_TSMC_CHIP_8821_B_CUT = 0x100d,137 VERSION_UNKNOWN = 0xFF,138};139 140enum vht_data_sc {141 VHT_DATA_SC_DONOT_CARE = 0,142 VHT_DATA_SC_20_UPPER_OF_80MHZ = 1,143 VHT_DATA_SC_20_LOWER_OF_80MHZ = 2,144 VHT_DATA_SC_20_UPPERST_OF_80MHZ = 3,145 VHT_DATA_SC_20_LOWEST_OF_80MHZ = 4,146 VHT_DATA_SC_20_RECV1 = 5,147 VHT_DATA_SC_20_RECV2 = 6,148 VHT_DATA_SC_20_RECV3 = 7,149 VHT_DATA_SC_20_RECV4 = 8,150 VHT_DATA_SC_40_UPPER_OF_80MHZ = 9,151 VHT_DATA_SC_40_LOWER_OF_80MHZ = 10,152};153 154/* MASK */155#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2))156#define CHIP_TYPE_MASK BIT(3)157#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6))158#define MANUFACTUER_MASK BIT(7)159#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8))160#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12))161 162/* Get element */163#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK)164#define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK)165#define GET_CVID_RF_TYPE(version) ((version) & RF_TYPE_MASK)166#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK)167#define GET_CVID_ROM_VERSION(version) ((version) & ROM_VERSION_MASK)168#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK)169 170#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version)) ? false : true)171#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)\172 ? true : false)173#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)\174 ? true : false)175 176#define IS_8812_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8812) ? \177 true : false)178#define IS_8821_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8821) ? \179 true : false)180 181#define IS_VENDOR_8812A_TEST_CHIP(version) ((IS_8812_SERIES(version)) ? \182 ((IS_NORMAL_CHIP(version)) ? \183 false : true) : false)184#define IS_VENDOR_8812A_MP_CHIP(version) ((IS_8812_SERIES(version)) ? \185 ((IS_NORMAL_CHIP(version)) ? \186 true : false) : false)187#define IS_VENDOR_8812A_C_CUT(version) ((IS_8812_SERIES(version)) ? \188 ((GET_CVID_CUT_VERSION(version) == \189 C_CUT_VERSION) ? \190 true : false) : false)191 192#define IS_VENDOR_8821A_TEST_CHIP(version) ((IS_8821_SERIES(version)) ? \193 ((IS_NORMAL_CHIP(version)) ? \194 false : true) : false)195#define IS_VENDOR_8821A_MP_CHIP(version) ((IS_8821_SERIES(version)) ? \196 ((IS_NORMAL_CHIP(version)) ? \197 true : false) : false)198#define IS_VENDOR_8821A_B_CUT(version) ((IS_8821_SERIES(version)) ? \199 ((GET_CVID_CUT_VERSION(version) == \200 B_CUT_VERSION) ? \201 true : false) : false)202enum board_type {203 ODM_BOARD_DEFAULT = 0, /* The DEFAULT case. */204 ODM_BOARD_MINICARD = BIT(0), /* 0 = non-mini card, 1 = mini card. */205 ODM_BOARD_SLIM = BIT(1), /* 0 = non-slim card, 1 = slim card */206 ODM_BOARD_BT = BIT(2), /* 0 = without BT card, 1 = with BT */207 ODM_BOARD_EXT_PA = BIT(3), /* 1 = existing 2G ext-PA */208 ODM_BOARD_EXT_LNA = BIT(4), /* 1 = existing 2G ext-LNA */209 ODM_BOARD_EXT_TRSW = BIT(5), /* 1 = existing ext-TRSW */210 ODM_BOARD_EXT_PA_5G = BIT(6), /* 1 = existing 5G ext-PA */211 ODM_BOARD_EXT_LNA_5G = BIT(7), /* 1 = existing 5G ext-LNA */212};213 214enum rf_optype {215 RF_OP_BY_SW_3WIRE = 0,216 RF_OP_BY_FW,217 RF_OP_MAX218};219 220enum rf_power_state {221 RF_ON,222 RF_OFF,223 RF_SLEEP,224 RF_SHUT_DOWN,225};226 227enum power_save_mode {228 POWER_SAVE_MODE_ACTIVE,229 POWER_SAVE_MODE_SAVE,230};231 232enum power_polocy_config {233 POWERCFG_MAX_POWER_SAVINGS,234 POWERCFG_GLOBAL_POWER_SAVINGS,235 POWERCFG_LOCAL_POWER_SAVINGS,236 POWERCFG_LENOVO,237};238 239enum interface_select_pci {240 INTF_SEL1_MINICARD = 0,241 INTF_SEL0_PCIE = 1,242 INTF_SEL2_RSV = 2,243 INTF_SEL3_RSV = 3,244};245 246enum rtl_desc_qsel {247 QSLT_BK = 0x2,248 QSLT_BE = 0x0,249 QSLT_VI = 0x5,250 QSLT_VO = 0x7,251 QSLT_BEACON = 0x10,252 QSLT_HIGH = 0x11,253 QSLT_MGNT = 0x12,254 QSLT_CMD = 0x13,255};256 257struct phy_sts_cck_8821ae_t {258 u8 adc_pwdb_X[4];259 u8 sq_rpt;260 u8 cck_agc_rpt;261};262 263struct h2c_cmd_8821ae {264 u8 element_id;265 u32 cmd_len;266 u8 *p_cmdbuffer;267};268 269#endif270