653 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/* Copyright(c) 2009-2010 Realtek Corporation.*/3 4#ifndef __RTL8821AE_TRX_H__5#define __RTL8821AE_TRX_H__6 7#define TX_DESC_SIZE 408#define TX_DESC_AGGR_SUBFRAME_SIZE 329 10#define RX_DESC_SIZE 3211#define RX_DRV_INFO_SIZE_UNIT 812 13#define TX_DESC_NEXT_DESC_OFFSET 4014#define USB_HWDESC_HEADER_LEN 4015#define CRCLENGTH 416 17static inline void set_tx_desc_pkt_size(__le32 *__pdesc, u32 __val)18{19 le32p_replace_bits(__pdesc, __val, GENMASK(15, 0));20}21 22static inline void set_tx_desc_offset(__le32 *__pdesc, u32 __val)23{24 le32p_replace_bits(__pdesc, __val, GENMASK(23, 16));25}26 27static inline void set_tx_desc_bmc(__le32 *__pdesc, u32 __val)28{29 le32p_replace_bits(__pdesc, __val, BIT(24));30}31 32static inline void set_tx_desc_htc(__le32 *__pdesc, u32 __val)33{34 le32p_replace_bits(__pdesc, __val, BIT(25));35}36 37static inline void set_tx_desc_last_seg(__le32 *__pdesc, u32 __val)38{39 le32p_replace_bits(__pdesc, __val, BIT(26));40}41 42static inline void set_tx_desc_first_seg(__le32 *__pdesc, u32 __val)43{44 le32p_replace_bits(__pdesc, __val, BIT(27));45}46 47static inline void set_tx_desc_linip(__le32 *__pdesc, u32 __val)48{49 le32p_replace_bits(__pdesc, __val, BIT(28));50}51 52static inline void set_tx_desc_own(__le32 *__pdesc, u32 __val)53{54 le32p_replace_bits(__pdesc, __val, BIT(31));55}56 57static inline int get_tx_desc_own(__le32 *__pdesc)58{59 return le32_get_bits(*(__pdesc), BIT(31));60}61 62static inline void set_tx_desc_macid(__le32 *__pdesc, u32 __val)63{64 le32p_replace_bits(__pdesc + 1, __val, GENMASK(6, 0));65}66 67static inline void set_tx_desc_queue_sel(__le32 *__pdesc, u32 __val)68{69 le32p_replace_bits(__pdesc + 1, __val, GENMASK(12, 8));70}71 72static inline void set_tx_desc_rate_id(__le32 *__pdesc, u32 __val)73{74 le32p_replace_bits(__pdesc + 1, __val, GENMASK(20, 16));75}76 77static inline void set_tx_desc_sec_type(__le32 *__pdesc, u32 __val)78{79 le32p_replace_bits(__pdesc + 1, __val, GENMASK(23, 22));80}81 82static inline void set_tx_desc_pkt_offset(__le32 *__pdesc, u32 __val)83{84 le32p_replace_bits(__pdesc + 1, __val, GENMASK(28, 24));85}86 87static inline void set_tx_desc_agg_enable(__le32 *__pdesc, u32 __val)88{89 le32p_replace_bits(__pdesc + 2, __val, BIT(12));90}91 92static inline void set_tx_desc_rdg_enable(__le32 *__pdesc, u32 __val)93{94 le32p_replace_bits(__pdesc + 2, __val, BIT(13));95}96 97static inline void set_tx_desc_more_frag(__le32 *__pdesc, u32 __val)98{99 le32p_replace_bits(__pdesc + 2, __val, BIT(17));100}101 102static inline void set_tx_desc_ampdu_density(__le32 *__pdesc, u32 __val)103{104 le32p_replace_bits(__pdesc + 2, __val, GENMASK(22, 20));105}106 107static inline void set_tx_desc_hwseq_sel(__le32 *__pdesc, u32 __val)108{109 le32p_replace_bits(__pdesc + 3, __val, GENMASK(7, 6));110}111 112static inline void set_tx_desc_use_rate(__le32 *__pdesc, u32 __val)113{114 le32p_replace_bits(__pdesc + 3, __val, BIT(8));115}116 117static inline void set_tx_desc_disable_fb(__le32 *__pdesc, u32 __val)118{119 le32p_replace_bits(__pdesc + 3, __val, BIT(10));120}121 122static inline void set_tx_desc_cts2self(__le32 *__pdesc, u32 __val)123{124 le32p_replace_bits(__pdesc + 3, __val, BIT(11));125}126 127static inline void set_tx_desc_rts_enable(__le32 *__pdesc, u32 __val)128{129 le32p_replace_bits(__pdesc + 3, __val, BIT(12));130}131 132static inline void set_tx_desc_hw_rts_enable(__le32 *__pdesc, u32 __val)133{134 le32p_replace_bits(__pdesc + 3, __val, BIT(13));135}136 137static inline void set_tx_desc_nav_use_hdr(__le32 *__pdesc, u32 __val)138{139 le32p_replace_bits(__pdesc + 3, __val, BIT(15));140}141 142static inline void set_tx_desc_max_agg_num(__le32 *__pdesc, u32 __val)143{144 le32p_replace_bits(__pdesc + 3, __val, GENMASK(21, 17));145}146 147static inline void set_tx_desc_tx_ant(__le32 *__pdesc, u32 __val)148{149 le32p_replace_bits(__pdesc + 5, __val, GENMASK(27, 24));150}151 152static inline void set_tx_desc_tx_rate(__le32 *__pdesc, u32 __val)153{154 le32p_replace_bits(__pdesc + 4, __val, GENMASK(6, 0));155}156 157static inline void set_tx_desc_data_rate_fb_limit(__le32 *__pdesc, u32 __val)158{159 le32p_replace_bits(__pdesc + 4, __val, GENMASK(12, 8));160}161 162static inline void set_tx_desc_rts_rate_fb_limit(__le32 *__pdesc, u32 __val)163{164 le32p_replace_bits(__pdesc + 4, __val, GENMASK(16, 13));165}166 167static inline void set_tx_desc_rts_rate(__le32 *__pdesc, u32 __val)168{169 le32p_replace_bits(__pdesc + 4, __val, GENMASK(28, 24));170}171 172static inline void set_tx_desc_tx_sub_carrier(__le32 *__pdesc, u32 __val)173{174 le32p_replace_bits(__pdesc + 5, __val, GENMASK(3, 0));175}176 177static inline void set_tx_desc_data_shortgi(__le32 *__pdesc, u32 __val)178{179 le32p_replace_bits(__pdesc + 5, __val, BIT(4));180}181 182static inline void set_tx_desc_data_bw(__le32 *__pdesc, u32 __val)183{184 le32p_replace_bits(__pdesc + 5, __val, GENMASK(6, 5));185}186 187static inline void set_tx_desc_rts_short(__le32 *__pdesc, u32 __val)188{189 le32p_replace_bits(__pdesc + 5, __val, BIT(12));190}191 192static inline void set_tx_desc_rts_sc(__le32 *__pdesc, u32 __val)193{194 le32p_replace_bits(__pdesc + 5, __val, GENMASK(16, 13));195}196 197static inline void set_tx_desc_tx_buffer_size(__le32 *__pdesc, u32 __val)198{199 le32p_replace_bits(__pdesc + 7, __val, GENMASK(15, 0));200}201 202static inline void set_tx_desc_hwseq_en(__le32 *__pdesc, u32 __val)203{204 le32p_replace_bits(__pdesc + 8, __val, BIT(15));205}206 207static inline void set_tx_desc_seq(__le32 *__pdesc, u32 __val)208{209 le32p_replace_bits(__pdesc + 9, __val, GENMASK(23, 12));210}211 212static inline void set_tx_desc_tx_buffer_address(__le32 *__pdesc, u32 __val)213{214 *(__pdesc + 10) = cpu_to_le32(__val);215}216 217static inline u32 get_tx_desc_tx_buffer_address(__le32 *__pdesc)218{219 return le32_to_cpu(*(__pdesc + 10));220}221 222static inline void set_tx_desc_next_desc_address(__le32 *__pdesc, u32 __val)223{224 *(__pdesc + 12) = cpu_to_le32(__val);225}226 227static inline int get_rx_desc_pkt_len(__le32 *__pdesc)228{229 return le32_get_bits(*(__pdesc), GENMASK(13, 0));230}231 232static inline int get_rx_desc_crc32(__le32 *__pdesc)233{234 return le32_get_bits(*(__pdesc), BIT(14));235}236 237static inline int get_rx_desc_icv(__le32 *__pdesc)238{239 return le32_get_bits(*(__pdesc), BIT(15));240}241 242static inline int get_rx_desc_drv_info_size(__le32 *__pdesc)243{244 return le32_get_bits(*(__pdesc), GENMASK(19, 16));245}246 247static inline int get_rx_desc_shift(__le32 *__pdesc)248{249 return le32_get_bits(*(__pdesc), GENMASK(25, 24));250}251 252static inline int get_rx_desc_physt(__le32 *__pdesc)253{254 return le32_get_bits(*(__pdesc), BIT(26));255}256 257static inline int get_rx_desc_swdec(__le32 *__pdesc)258{259 return le32_get_bits(*(__pdesc), BIT(27));260}261 262static inline int get_rx_desc_own(__le32 *__pdesc)263{264 return le32_get_bits(*(__pdesc), BIT(31));265}266 267static inline void set_rx_desc_pkt_len(__le32 *__pdesc, u32 __val)268{269 le32p_replace_bits(__pdesc, __val, GENMASK(13, 0));270}271 272static inline void set_rx_desc_eor(__le32 *__pdesc, u32 __val)273{274 le32p_replace_bits(__pdesc, __val, BIT(30));275}276 277static inline void set_rx_desc_own(__le32 *__pdesc, u32 __val)278{279 le32p_replace_bits(__pdesc, __val, BIT(31));280}281 282static inline int get_rx_desc_macid(__le32 *__pdesc)283{284 return le32_get_bits(*(__pdesc + 1), GENMASK(6, 0));285}286 287static inline int get_rx_desc_paggr(__le32 *__pdesc)288{289 return le32_get_bits(*(__pdesc + 1), BIT(15));290}291 292static inline int get_rx_status_desc_rpt_sel(__le32 *__pdesc)293{294 return le32_get_bits(*(__pdesc + 1), BIT(28));295}296 297static inline int get_rx_desc_rxmcs(__le32 *__pdesc)298{299 return le32_get_bits(*(__pdesc + 3), GENMASK(6, 0));300}301 302static inline int get_rx_status_desc_pattern_match(__le32 *__pdesc)303{304 return le32_get_bits(*(__pdesc + 3), BIT(29));305}306 307static inline int get_rx_status_desc_unicast_match(__le32 *__pdesc)308{309 return le32_get_bits(*(__pdesc + 3), BIT(30));310}311 312static inline int get_rx_status_desc_magic_match(__le32 *__pdesc)313{314 return le32_get_bits(*(__pdesc + 3), BIT(31));315}316 317static inline int get_rx_desc_splcp(__le32 *__pdesc)318{319 return le32_get_bits(*(__pdesc + 4), BIT(0));320}321 322static inline int get_rx_desc_bw(__le32 *__pdesc)323{324 return le32_get_bits(*(__pdesc + 4), GENMASK(5, 4));325}326 327static inline u32 get_rx_desc_tsfl(__le32 *__pdesc)328{329 return le32_to_cpu(*(__pdesc + 5));330}331 332static inline u32 get_rx_desc_buff_addr(__le32 *__pdesc)333{334 return le32_to_cpu(*(__pdesc + 6));335}336 337static inline void set_rx_desc_buff_addr(__le32 *__pdesc, u32 __val)338{339 *(__pdesc + 6) = cpu_to_le32(__val);340}341 342/* TX report 2 format in Rx desc*/343 344static inline u32 get_rx_rpt2_desc_macid_valid_1(__le32 *__status)345{346 return le32_to_cpu(*(__status + 4));347}348 349static inline u32 get_rx_rpt2_desc_macid_valid_2(__le32 *__status)350{351 return le32_to_cpu(*(__status + 5));352}353 354static inline void set_earlymode_pktnum(__le32 *__paddr, u32 __value)355{356 le32p_replace_bits(__paddr, __value, GENMASK(3, 0));357}358 359static inline void set_earlymode_len0(__le32 *__paddr, u32 __value)360{361 le32p_replace_bits(__paddr, __value, GENMASK(15, 4));362}363 364static inline void set_earlymode_len1(__le32 *__paddr, u32 __value)365{366 le32p_replace_bits(__paddr, __value, GENMASK(27, 16));367}368 369static inline void set_earlymode_len2_1(__le32 *__paddr, u32 __value)370{371 le32p_replace_bits(__paddr, __value, GENMASK(31, 28));372}373 374static inline void set_earlymode_len2_2(__le32 *__paddr, u32 __value)375{376 le32p_replace_bits(__paddr, __value, GENMASK(7, 0));377}378 379static inline void set_earlymode_len3(__le32 *__paddr, u32 __value)380{381 le32p_replace_bits((__paddr + 1), __value, GENMASK(19, 8));382}383 384static inline void set_earlymode_len4(__le32 *__paddr, u32 __value)385{386 le32p_replace_bits((__paddr + 1), __value, GENMASK(31, 20));387}388 389static inline void clear_pci_tx_desc_content(__le32 *__pdesc, int _size)390{391 if (_size > TX_DESC_NEXT_DESC_OFFSET)392 memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);393 else394 memset(__pdesc, 0, _size);395}396 397#define RTL8821AE_RX_HAL_IS_CCK_RATE(rxmcs)\398 (rxmcs == DESC_RATE1M ||\399 rxmcs == DESC_RATE2M ||\400 rxmcs == DESC_RATE5_5M ||\401 rxmcs == DESC_RATE11M)402 403struct phy_rx_agc_info_t {404 #ifdef __LITTLE_ENDIAN405 u8 gain:7, trsw:1;406 #else407 u8 trsw:1, gain:7;408 #endif409};410 411struct phy_status_rpt {412 /* DWORD 0 */413 u8 gain_trsw[2];414#ifdef __LITTLE_ENDIAN415 u16 chl_num:10;416 u16 sub_chnl:4;417 u16 r_rfmod:2;418#else /* _BIG_ENDIAN_ */419 u16 r_rfmod:2;420 u16 sub_chnl:4;421 u16 chl_num:10;422#endif423 /* DWORD 1 */424 u8 pwdb_all;425 u8 cfosho[4]; /* DW 1 byte 1 DW 2 byte 0 */426 427 /* DWORD 2 */428 s8 cfotail[4]; /* DW 2 byte 1 DW 3 byte 0 */429 430 /* DWORD 3 */431 s8 rxevm[2]; /* DW 3 byte 1 DW 3 byte 2 */432 s8 rxsnr[2]; /* DW 3 byte 3 DW 4 byte 0 */433 434 /* DWORD 4 */435 u8 pcts_msk_rpt[2];436 u8 pdsnr[2]; /* DW 4 byte 3 DW 5 Byte 0 */437 438 /* DWORD 5 */439 u8 csi_current[2];440 u8 rx_gain_c;441 442 /* DWORD 6 */443 u8 rx_gain_d;444 u8 sigevm;445 u8 resvd_0;446 u8 antidx_anta:3;447 u8 antidx_antb:3;448 u8 resvd_1:2;449} __packed;450 451struct rx_fwinfo_8821ae {452 u8 gain_trsw[4];453 u8 pwdb_all;454 u8 cfosho[4];455 u8 cfotail[4];456 s8 rxevm[2];457 s8 rxsnr[4];458 u8 pdsnr[2];459 u8 csi_current[2];460 u8 csi_target[2];461 u8 sigevm;462 u8 max_ex_pwr;463 u8 ex_intf_flag:1;464 u8 sgi_en:1;465 u8 rxsc:2;466 u8 reserve:4;467} __packed;468 469struct tx_desc_8821ae {470 u32 pktsize:16;471 u32 offset:8;472 u32 bmc:1;473 u32 htc:1;474 u32 lastseg:1;475 u32 firstseg:1;476 u32 linip:1;477 u32 noacm:1;478 u32 gf:1;479 u32 own:1;480 481 u32 macid:6;482 u32 rsvd0:2;483 u32 queuesel:5;484 u32 rd_nav_ext:1;485 u32 lsig_txop_en:1;486 u32 pifs:1;487 u32 rateid:4;488 u32 nav_usehdr:1;489 u32 en_descid:1;490 u32 sectype:2;491 u32 pktoffset:8;492 493 u32 rts_rc:6;494 u32 data_rc:6;495 u32 agg_en:1;496 u32 rdg_en:1;497 u32 bar_retryht:2;498 u32 agg_break:1;499 u32 morefrag:1;500 u32 raw:1;501 u32 ccx:1;502 u32 ampdudensity:3;503 u32 bt_int:1;504 u32 ant_sela:1;505 u32 ant_selb:1;506 u32 txant_cck:2;507 u32 txant_l:2;508 u32 txant_ht:2;509 510 u32 nextheadpage:8;511 u32 tailpage:8;512 u32 seq:12;513 u32 cpu_handle:1;514 u32 tag1:1;515 u32 trigger_int:1;516 u32 hwseq_en:1;517 518 u32 rtsrate:5;519 u32 apdcfe:1;520 u32 qos:1;521 u32 hwseq_ssn:1;522 u32 userrate:1;523 u32 dis_rtsfb:1;524 u32 dis_datafb:1;525 u32 cts2self:1;526 u32 rts_en:1;527 u32 hwrts_en:1;528 u32 portid:1;529 u32 pwr_status:3;530 u32 waitdcts:1;531 u32 cts2ap_en:1;532 u32 txsc:2;533 u32 stbc:2;534 u32 txshort:1;535 u32 txbw:1;536 u32 rtsshort:1;537 u32 rtsbw:1;538 u32 rtssc:2;539 u32 rtsstbc:2;540 541 u32 txrate:6;542 u32 shortgi:1;543 u32 ccxt:1;544 u32 txrate_fb_lmt:5;545 u32 rtsrate_fb_lmt:4;546 u32 retrylmt_en:1;547 u32 txretrylmt:6;548 u32 usb_txaggnum:8;549 550 u32 txagca:5;551 u32 txagcb:5;552 u32 usemaxlen:1;553 u32 maxaggnum:5;554 u32 mcsg1maxlen:4;555 u32 mcsg2maxlen:4;556 u32 mcsg3maxlen:4;557 u32 mcs7sgimaxlen:4;558 559 u32 txbuffersize:16;560 u32 sw_offset30:8;561 u32 sw_offset31:4;562 u32 rsvd1:1;563 u32 antsel_c:1;564 u32 null_0:1;565 u32 null_1:1;566 567 u32 txbuffaddr;568 u32 txbufferaddr64;569 u32 nextdescaddress;570 u32 nextdescaddress64;571 572 u32 reserve_pass_pcie_mm_limit[4];573} __packed;574 575struct rx_desc_8821ae {576 u32 length:14;577 u32 crc32:1;578 u32 icverror:1;579 u32 drv_infosize:4;580 u32 security:3;581 u32 qos:1;582 u32 shift:2;583 u32 phystatus:1;584 u32 swdec:1;585 u32 lastseg:1;586 u32 firstseg:1;587 u32 eor:1;588 u32 own:1;589 590 u32 macid:6;591 u32 tid:4;592 u32 hwrsvd:5;593 u32 paggr:1;594 u32 faggr:1;595 u32 a1_fit:4;596 u32 a2_fit:4;597 u32 pam:1;598 u32 pwr:1;599 u32 moredata:1;600 u32 morefrag:1;601 u32 type:2;602 u32 mc:1;603 u32 bc:1;604 605 u32 seq:12;606 u32 frag:4;607 u32 nextpktlen:14;608 u32 nextind:1;609 u32 rsvd:1;610 611 u32 rxmcs:6;612 u32 rxht:1;613 u32 amsdu:1;614 u32 splcp:1;615 u32 bandwidth:1;616 u32 htc:1;617 u32 tcpchk_rpt:1;618 u32 ipcchk_rpt:1;619 u32 tcpchk_valid:1;620 u32 hwpcerr:1;621 u32 hwpcind:1;622 u32 iv0:16;623 624 u32 iv1;625 626 u32 tsfl;627 628 u32 bufferaddress;629 u32 bufferaddress64;630 631} __packed;632 633void rtl8821ae_tx_fill_desc(struct ieee80211_hw *hw,634 struct ieee80211_hdr *hdr, u8 *pdesc_tx, u8 *txbd,635 struct ieee80211_tx_info *info,636 struct ieee80211_sta *sta,637 struct sk_buff *skb,638 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc);639bool rtl8821ae_rx_query_desc(struct ieee80211_hw *hw,640 struct rtl_stats *status,641 struct ieee80211_rx_status *rx_status,642 u8 *pdesc, struct sk_buff *skb);643void rtl8821ae_set_desc(struct ieee80211_hw *hw, u8 *pdesc,644 bool istx, u8 desc_name, u8 *val);645u64 rtl8821ae_get_desc(struct ieee80211_hw *hw,646 u8 *pdesc, bool istx, u8 desc_name);647bool rtl8821ae_is_tx_desc_closed(struct ieee80211_hw *hw,648 u8 hw_queue, u16 index);649void rtl8821ae_tx_polling(struct ieee80211_hw *hw, u8 hw_queue);650void rtl8821ae_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,651 struct sk_buff *skb);652#endif653