118 lines · c
1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */2/* Copyright(c) 2018-2019 Realtek Corporation.3 */4 5#ifndef __RTW_BF_H_6#define __RTW_BF_H_7 8#define REG_TXBF_CTRL 0x042C9#define REG_RRSR 0x044010#define REG_NDPA_OPT_CTRL 0x045F11 12#define REG_ASSOCIATED_BFMER0_INFO 0x06E413#define REG_ASSOCIATED_BFMER1_INFO 0x06EC14#define REG_TX_CSI_RPT_PARAM_BW20 0x06F415#define REG_SND_PTCL_CTRL 0x071816#define BIT_DIS_CHK_VHTSIGB_CRC BIT(6)17#define BIT_DIS_CHK_VHTSIGA_CRC BIT(5)18#define BIT_MASK_BEAMFORM (GENMASK(4, 0) | BIT(7))19#define REG_MU_TX_CTL 0x14C020#define REG_MU_STA_GID_VLD 0x14C421#define REG_MU_STA_USER_POS_INFO 0x14C822#define REG_CSI_RRSR 0x167823#define REG_WMAC_MU_BF_OPTION 0x167C24#define REG_WMAC_MU_BF_CTL 0x168025 26#define BIT_WMAC_USE_NDPARATE BIT(30)27#define BIT_WMAC_TXMU_ACKPOLICY_EN BIT(6)28#define BIT_USE_NDPA_PARAMETER BIT(30)29#define BIT_MU_P1_WAIT_STATE_EN BIT(16)30#define BIT_EN_MU_MIMO BIT(7)31 32#define R_MU_RL 0xf33#define BIT_SHIFT_R_MU_RL 1234#define BIT_SHIFT_WMAC_TXMU_ACKPOLICY 435#define BIT_SHIFT_CSI_RATE 2436 37#define BIT_MASK_R_MU_RL (R_MU_RL << BIT_SHIFT_R_MU_RL)38#define BIT_MASK_R_MU_TABLE_VALID 0x3f39#define BIT_MASK_CSI_RATE_VAL 0x3F40#define BIT_MASK_CSI_RATE (BIT_MASK_CSI_RATE_VAL << BIT_SHIFT_CSI_RATE)41 42#define BIT_RXFLTMAP0_ACTIONNOACK BIT(14)43#define BIT_RXFLTMAP1_BF (BIT(4) | BIT(5))44#define BIT_RXFLTMAP1_BF_REPORT_POLL BIT(4)45#define BIT_RXFLTMAP4_BF_REPORT_POLL BIT(4)46 47#define RTW_NDP_RX_STANDBY_TIME 0x7048#define RTW_SND_CTRL_REMOVE 0x9849#define RTW_SND_CTRL_SOUNDING 0x9B50 51enum csi_seg_len {52 HAL_CSI_SEG_4K = 0,53 HAL_CSI_SEG_8K = 1,54 HAL_CSI_SEG_11K = 2,55};56 57struct cfg_mumimo_para {58 u8 sounding_sts[6];59 u16 grouping_bitmap;60 u8 mu_tx_en;61 u32 given_gid_tab[2];62 u32 given_user_pos[4];63};64 65struct mu_bfer_init_para {66 u16 paid;67 u16 csi_para;68 u16 my_aid;69 enum csi_seg_len csi_length_sel;70 u8 bfer_address[ETH_ALEN];71};72 73void rtw_bf_disassoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,74 struct ieee80211_bss_conf *bss_conf);75void rtw_bf_assoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,76 struct ieee80211_bss_conf *bss_conf);77void rtw_bf_init_bfer_entry_mu(struct rtw_dev *rtwdev,78 struct mu_bfer_init_para *param);79void rtw_bf_cfg_sounding(struct rtw_dev *rtwdev, struct rtw_vif *vif,80 enum rtw_trx_desc_rate rate);81void rtw_bf_cfg_mu_bfee(struct rtw_dev *rtwdev, struct cfg_mumimo_para *param);82void rtw_bf_del_bfer_entry_mu(struct rtw_dev *rtwdev);83void rtw_bf_del_sounding(struct rtw_dev *rtwdev);84void rtw_bf_enable_bfee_su(struct rtw_dev *rtwdev, struct rtw_vif *vif,85 struct rtw_bfee *bfee);86void rtw_bf_enable_bfee_mu(struct rtw_dev *rtwdev, struct rtw_vif *vif,87 struct rtw_bfee *bfee);88void rtw_bf_remove_bfee_su(struct rtw_dev *rtwdev, struct rtw_bfee *bfee);89void rtw_bf_remove_bfee_mu(struct rtw_dev *rtwdev, struct rtw_bfee *bfee);90void rtw_bf_set_gid_table(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,91 struct ieee80211_bss_conf *conf);92void rtw_bf_phy_init(struct rtw_dev *rtwdev);93void rtw_bf_cfg_csi_rate(struct rtw_dev *rtwdev, u8 rssi, u8 cur_rate,94 u8 fixrate_en, u8 *new_rate);95static inline void rtw_chip_config_bfee(struct rtw_dev *rtwdev, struct rtw_vif *vif,96 struct rtw_bfee *bfee, bool enable)97{98 if (rtwdev->chip->ops->config_bfee)99 rtwdev->chip->ops->config_bfee(rtwdev, vif, bfee, enable);100}101 102static inline void rtw_chip_set_gid_table(struct rtw_dev *rtwdev,103 struct ieee80211_vif *vif,104 struct ieee80211_bss_conf *conf)105{106 if (rtwdev->chip->ops->set_gid_table)107 rtwdev->chip->ops->set_gid_table(rtwdev, vif, conf);108}109 110static inline void rtw_chip_cfg_csi_rate(struct rtw_dev *rtwdev, u8 rssi, u8 cur_rate,111 u8 fixrate_en, u8 *new_rate)112{113 if (rtwdev->chip->ops->cfg_csi_rate)114 rtwdev->chip->ops->cfg_csi_rate(rtwdev, rssi, cur_rate,115 fixrate_en, new_rate);116}117#endif118