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1// SPDX-License-Identifier: GPL-2.0+2/*3 * FDT Address translation based on u-boot fdt_support.c which in turn was4 * based on the kernel unflattened DT address translation code.5 *6 * (C) Copyright 20077 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com8 *9 * Copyright 2010-2011 Freescale Semiconductor, Inc.10 */11 12#define pr_fmt(fmt) "OF: fdt: " fmt13 14#include <linux/kernel.h>15#include <linux/libfdt.h>16#include <linux/of.h>17#include <linux/of_fdt.h>18#include <linux/sizes.h>19 20/* Max address size we deal with */21#define OF_MAX_ADDR_CELLS 422#define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \23 (ns) > 0)24 25/* Debug utility */26#ifdef DEBUG27static void __init of_dump_addr(const char *s, const __be32 *addr, int na)28{29 pr_debug("%s", s);30 while(na--)31 pr_cont(" %08x", *(addr++));32 pr_cont("\n");33}34#else35static void __init of_dump_addr(const char *s, const __be32 *addr, int na) { }36#endif37 38/* Callbacks for bus specific translators */39struct of_bus {40 void (*count_cells)(const void *blob, int parentoffset,41 int *addrc, int *sizec);42 u64 (*map)(__be32 *addr, const __be32 *range,43 int na, int ns, int pna);44 int (*translate)(__be32 *addr, u64 offset, int na);45};46 47/* Default translator (generic bus) */48static void __init fdt_bus_default_count_cells(const void *blob, int parentoffset,49 int *addrc, int *sizec)50{51 const __be32 *prop;52 53 if (addrc) {54 prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL);55 if (prop)56 *addrc = be32_to_cpup(prop);57 else58 *addrc = dt_root_addr_cells;59 }60 61 if (sizec) {62 prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL);63 if (prop)64 *sizec = be32_to_cpup(prop);65 else66 *sizec = dt_root_size_cells;67 }68}69 70static u64 __init fdt_bus_default_map(__be32 *addr, const __be32 *range,71 int na, int ns, int pna)72{73 u64 cp, s, da;74 75 cp = of_read_number(range, na);76 s = of_read_number(range + na + pna, ns);77 da = of_read_number(addr, na);78 79 pr_debug("default map, cp=%llx, s=%llx, da=%llx\n",80 cp, s, da);81 82 if (da < cp || da >= (cp + s))83 return OF_BAD_ADDR;84 return da - cp;85}86 87static int __init fdt_bus_default_translate(__be32 *addr, u64 offset, int na)88{89 u64 a = of_read_number(addr, na);90 memset(addr, 0, na * 4);91 a += offset;92 if (na > 1)93 addr[na - 2] = cpu_to_fdt32(a >> 32);94 addr[na - 1] = cpu_to_fdt32(a & 0xffffffffu);95 96 return 0;97}98 99/* Array of bus specific translators */100static const struct of_bus of_busses[] __initconst = {101 /* Default */102 {103 .count_cells = fdt_bus_default_count_cells,104 .map = fdt_bus_default_map,105 .translate = fdt_bus_default_translate,106 },107};108 109static int __init fdt_translate_one(const void *blob, int parent,110 const struct of_bus *bus,111 const struct of_bus *pbus, __be32 *addr,112 int na, int ns, int pna, const char *rprop)113{114 const __be32 *ranges;115 int rlen;116 int rone;117 u64 offset = OF_BAD_ADDR;118 119 ranges = fdt_getprop(blob, parent, rprop, &rlen);120 if (!ranges)121 return 1;122 if (rlen == 0) {123 offset = of_read_number(addr, na);124 memset(addr, 0, pna * 4);125 pr_debug("empty ranges, 1:1 translation\n");126 goto finish;127 }128 129 pr_debug("walking ranges...\n");130 131 /* Now walk through the ranges */132 rlen /= 4;133 rone = na + pna + ns;134 for (; rlen >= rone; rlen -= rone, ranges += rone) {135 offset = bus->map(addr, ranges, na, ns, pna);136 if (offset != OF_BAD_ADDR)137 break;138 }139 if (offset == OF_BAD_ADDR) {140 pr_debug("not found !\n");141 return 1;142 }143 memcpy(addr, ranges + na, 4 * pna);144 145 finish:146 of_dump_addr("parent translation for:", addr, pna);147 pr_debug("with offset: %llx\n", offset);148 149 /* Translate it into parent bus space */150 return pbus->translate(addr, offset, pna);151}152 153/*154 * Translate an address from the device-tree into a CPU physical address,155 * this walks up the tree and applies the various bus mappings on the156 * way.157 *158 * Note: We consider that crossing any level with #size-cells == 0 to mean159 * that translation is impossible (that is we are not dealing with a value160 * that can be mapped to a cpu physical address). This is not really specified161 * that way, but this is traditionally the way IBM at least do things162 */163static u64 __init fdt_translate_address(const void *blob, int node_offset)164{165 int parent, len;166 const struct of_bus *bus, *pbus;167 const __be32 *reg;168 __be32 addr[OF_MAX_ADDR_CELLS];169 int na, ns, pna, pns;170 u64 result = OF_BAD_ADDR;171 172 pr_debug("** translation for device %s **\n",173 fdt_get_name(blob, node_offset, NULL));174 175 reg = fdt_getprop(blob, node_offset, "reg", &len);176 if (!reg) {177 pr_err("warning: device tree node '%s' has no address.\n",178 fdt_get_name(blob, node_offset, NULL));179 goto bail;180 }181 182 /* Get parent & match bus type */183 parent = fdt_parent_offset(blob, node_offset);184 if (parent < 0)185 goto bail;186 bus = &of_busses[0];187 188 /* Cound address cells & copy address locally */189 bus->count_cells(blob, parent, &na, &ns);190 if (!OF_CHECK_COUNTS(na, ns)) {191 pr_err("Bad cell count for %s\n",192 fdt_get_name(blob, node_offset, NULL));193 goto bail;194 }195 memcpy(addr, reg, na * 4);196 197 pr_debug("bus (na=%d, ns=%d) on %s\n",198 na, ns, fdt_get_name(blob, parent, NULL));199 of_dump_addr("translating address:", addr, na);200 201 /* Translate */202 for (;;) {203 /* Switch to parent bus */204 node_offset = parent;205 parent = fdt_parent_offset(blob, node_offset);206 207 /* If root, we have finished */208 if (parent < 0) {209 pr_debug("reached root node\n");210 result = of_read_number(addr, na);211 break;212 }213 214 /* Get new parent bus and counts */215 pbus = &of_busses[0];216 pbus->count_cells(blob, parent, &pna, &pns);217 if (!OF_CHECK_COUNTS(pna, pns)) {218 pr_err("Bad cell count for %s\n",219 fdt_get_name(blob, node_offset, NULL));220 break;221 }222 223 pr_debug("parent bus (na=%d, ns=%d) on %s\n",224 pna, pns, fdt_get_name(blob, parent, NULL));225 226 /* Apply bus translation */227 if (fdt_translate_one(blob, node_offset, bus, pbus,228 addr, na, ns, pna, "ranges"))229 break;230 231 /* Complete the move up one level */232 na = pna;233 ns = pns;234 bus = pbus;235 236 of_dump_addr("one level translation:", addr, na);237 }238 bail:239 return result;240}241 242/**243 * of_flat_dt_translate_address - translate DT addr into CPU phys addr244 * @node: node in the flat blob245 */246u64 __init of_flat_dt_translate_address(unsigned long node)247{248 return fdt_translate_address(initial_boot_params, node);249}250