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1/* SPDX-License-Identifier: GPL-2.0+ */2/*3 * cpcihp_zt5550.h4 *5 * Intel/Ziatech ZT5550 CompactPCI Host Controller driver definitions6 *7 * Copyright 2002 SOMA Networks, Inc.8 * Copyright 2001 Intel San Luis Obispo9 * Copyright 2000,2001 MontaVista Software Inc.10 *11 * Send feedback to <scottm@somanetworks.com>12 */13 14#ifndef _CPCIHP_ZT5550_H15#define _CPCIHP_ZT5550_H16 17/* Direct registers */18#define CSR_HCINDEX 0x0019#define CSR_HCDATA 0x0420#define CSR_INTSTAT 0x0821#define CSR_INTMASK 0x0922#define CSR_CNT0CMD 0x0C23#define CSR_CNT1CMD 0x0E24#define CSR_CNT0 0x1025#define CSR_CNT1 0x1426 27/* Masks for interrupt bits in CSR_INTMASK direct register */28#define CNT0_INT_MASK 0x0129#define CNT1_INT_MASK 0x0230#define ENUM_INT_MASK 0x0431#define ALL_DIRECT_INTS_MASK 0x0732 33/* Indexed registers (through CSR_INDEX, CSR_DATA) */34#define HC_INT_MASK_REG 0x0435#define HC_STATUS_REG 0x0836#define HC_CMD_REG 0x0C37#define ARB_CONFIG_GNT_REG 0x1038#define ARB_CONFIG_CFG_REG 0x1239#define ARB_CONFIG_REG 0x1040#define ISOL_CONFIG_REG 0x1841#define FAULT_STATUS_REG 0x2042#define FAULT_CONFIG_REG 0x2443#define WD_CONFIG_REG 0x2C44#define HC_DIAG_REG 0x3045#define SERIAL_COMM_REG 0x3446#define SERIAL_OUT_REG 0x3847#define SERIAL_IN_REG 0x3C48 49/* Masks for interrupt bits in HC_INT_MASK_REG indexed register */50#define SERIAL_INT_MASK 0x0151#define FAULT_INT_MASK 0x0252#define HCF_INT_MASK 0x0453#define ALL_INDEXED_INTS_MASK 0x0754 55/* Digital I/O port storing ENUM# */56#define ENUM_PORT 0xE157/* Mask to get to the ENUM# bit on the bus */58#define ENUM_MASK 0x4059 60#endif /* _CPCIHP_ZT5550_H */61