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1// SPDX-License-Identifier: GPL-2.02/*3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>4 * (C) Copyright 2002-2004 IBM Corp.5 * (C) Copyright 2003 Matthew Wilcox6 * (C) Copyright 2003 Hewlett-Packard7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>9 *10 * File attributes for PCI devices11 *12 * Modeled after usb's driverfs.c13 */14 15#include <linux/bitfield.h>16#include <linux/kernel.h>17#include <linux/sched.h>18#include <linux/pci.h>19#include <linux/stat.h>20#include <linux/export.h>21#include <linux/topology.h>22#include <linux/mm.h>23#include <linux/fs.h>24#include <linux/capability.h>25#include <linux/security.h>26#include <linux/slab.h>27#include <linux/vgaarb.h>28#include <linux/pm_runtime.h>29#include <linux/msi.h>30#include <linux/of.h>31#include <linux/aperture.h>32#include "pci.h"33 34#ifndef ARCH_PCI_DEV_GROUPS35#define ARCH_PCI_DEV_GROUPS36#endif37 38static int sysfs_initialized; /* = 0 */39 40/* show configuration fields */41#define pci_config_attr(field, format_string) \42static ssize_t \43field##_show(struct device *dev, struct device_attribute *attr, char *buf) \44{ \45 struct pci_dev *pdev; \46 \47 pdev = to_pci_dev(dev); \48 return sysfs_emit(buf, format_string, pdev->field); \49} \50static DEVICE_ATTR_RO(field)51 52pci_config_attr(vendor, "0x%04x\n");53pci_config_attr(device, "0x%04x\n");54pci_config_attr(subsystem_vendor, "0x%04x\n");55pci_config_attr(subsystem_device, "0x%04x\n");56pci_config_attr(revision, "0x%02x\n");57pci_config_attr(class, "0x%06x\n");58 59static ssize_t irq_show(struct device *dev,60 struct device_attribute *attr,61 char *buf)62{63 struct pci_dev *pdev = to_pci_dev(dev);64 65#ifdef CONFIG_PCI_MSI66 /*67 * For MSI, show the first MSI IRQ; for all other cases including68 * MSI-X, show the legacy INTx IRQ.69 */70 if (pdev->msi_enabled)71 return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0));72#endif73 74 return sysfs_emit(buf, "%u\n", pdev->irq);75}76static DEVICE_ATTR_RO(irq);77 78static ssize_t broken_parity_status_show(struct device *dev,79 struct device_attribute *attr,80 char *buf)81{82 struct pci_dev *pdev = to_pci_dev(dev);83 return sysfs_emit(buf, "%u\n", pdev->broken_parity_status);84}85 86static ssize_t broken_parity_status_store(struct device *dev,87 struct device_attribute *attr,88 const char *buf, size_t count)89{90 struct pci_dev *pdev = to_pci_dev(dev);91 unsigned long val;92 93 if (kstrtoul(buf, 0, &val) < 0)94 return -EINVAL;95 96 pdev->broken_parity_status = !!val;97 98 return count;99}100static DEVICE_ATTR_RW(broken_parity_status);101 102static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,103 struct device_attribute *attr, char *buf)104{105 const struct cpumask *mask;106 107#ifdef CONFIG_NUMA108 if (dev_to_node(dev) == NUMA_NO_NODE)109 mask = cpu_online_mask;110 else111 mask = cpumask_of_node(dev_to_node(dev));112#else113 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);114#endif115 return cpumap_print_to_pagebuf(list, buf, mask);116}117 118static ssize_t local_cpus_show(struct device *dev,119 struct device_attribute *attr, char *buf)120{121 return pci_dev_show_local_cpu(dev, false, attr, buf);122}123static DEVICE_ATTR_RO(local_cpus);124 125static ssize_t local_cpulist_show(struct device *dev,126 struct device_attribute *attr, char *buf)127{128 return pci_dev_show_local_cpu(dev, true, attr, buf);129}130static DEVICE_ATTR_RO(local_cpulist);131 132/*133 * PCI Bus Class Devices134 */135static ssize_t cpuaffinity_show(struct device *dev,136 struct device_attribute *attr, char *buf)137{138 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));139 140 return cpumap_print_to_pagebuf(false, buf, cpumask);141}142static DEVICE_ATTR_RO(cpuaffinity);143 144static ssize_t cpulistaffinity_show(struct device *dev,145 struct device_attribute *attr, char *buf)146{147 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));148 149 return cpumap_print_to_pagebuf(true, buf, cpumask);150}151static DEVICE_ATTR_RO(cpulistaffinity);152 153static ssize_t power_state_show(struct device *dev,154 struct device_attribute *attr, char *buf)155{156 struct pci_dev *pdev = to_pci_dev(dev);157 158 return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state));159}160static DEVICE_ATTR_RO(power_state);161 162/* show resources */163static ssize_t resource_show(struct device *dev, struct device_attribute *attr,164 char *buf)165{166 struct pci_dev *pci_dev = to_pci_dev(dev);167 int i;168 int max;169 resource_size_t start, end;170 size_t len = 0;171 172 if (pci_dev->subordinate)173 max = DEVICE_COUNT_RESOURCE;174 else175 max = PCI_BRIDGE_RESOURCES;176 177 for (i = 0; i < max; i++) {178 struct resource *res = &pci_dev->resource[i];179 pci_resource_to_user(pci_dev, i, res, &start, &end);180 len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n",181 (unsigned long long)start,182 (unsigned long long)end,183 (unsigned long long)res->flags);184 }185 return len;186}187static DEVICE_ATTR_RO(resource);188 189static ssize_t max_link_speed_show(struct device *dev,190 struct device_attribute *attr, char *buf)191{192 struct pci_dev *pdev = to_pci_dev(dev);193 194 return sysfs_emit(buf, "%s\n",195 pci_speed_string(pcie_get_speed_cap(pdev)));196}197static DEVICE_ATTR_RO(max_link_speed);198 199static ssize_t max_link_width_show(struct device *dev,200 struct device_attribute *attr, char *buf)201{202 struct pci_dev *pdev = to_pci_dev(dev);203 204 return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev));205}206static DEVICE_ATTR_RO(max_link_width);207 208static ssize_t current_link_speed_show(struct device *dev,209 struct device_attribute *attr, char *buf)210{211 struct pci_dev *pci_dev = to_pci_dev(dev);212 u16 linkstat;213 int err;214 enum pci_bus_speed speed;215 216 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);217 if (err)218 return -EINVAL;219 220 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS];221 222 return sysfs_emit(buf, "%s\n", pci_speed_string(speed));223}224static DEVICE_ATTR_RO(current_link_speed);225 226static ssize_t current_link_width_show(struct device *dev,227 struct device_attribute *attr, char *buf)228{229 struct pci_dev *pci_dev = to_pci_dev(dev);230 u16 linkstat;231 int err;232 233 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);234 if (err)235 return -EINVAL;236 237 return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat));238}239static DEVICE_ATTR_RO(current_link_width);240 241static ssize_t secondary_bus_number_show(struct device *dev,242 struct device_attribute *attr,243 char *buf)244{245 struct pci_dev *pci_dev = to_pci_dev(dev);246 u8 sec_bus;247 int err;248 249 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);250 if (err)251 return -EINVAL;252 253 return sysfs_emit(buf, "%u\n", sec_bus);254}255static DEVICE_ATTR_RO(secondary_bus_number);256 257static ssize_t subordinate_bus_number_show(struct device *dev,258 struct device_attribute *attr,259 char *buf)260{261 struct pci_dev *pci_dev = to_pci_dev(dev);262 u8 sub_bus;263 int err;264 265 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);266 if (err)267 return -EINVAL;268 269 return sysfs_emit(buf, "%u\n", sub_bus);270}271static DEVICE_ATTR_RO(subordinate_bus_number);272 273static ssize_t ari_enabled_show(struct device *dev,274 struct device_attribute *attr,275 char *buf)276{277 struct pci_dev *pci_dev = to_pci_dev(dev);278 279 return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus));280}281static DEVICE_ATTR_RO(ari_enabled);282 283static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,284 char *buf)285{286 struct pci_dev *pci_dev = to_pci_dev(dev);287 288 return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",289 pci_dev->vendor, pci_dev->device,290 pci_dev->subsystem_vendor, pci_dev->subsystem_device,291 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),292 (u8)(pci_dev->class));293}294static DEVICE_ATTR_RO(modalias);295 296static ssize_t enable_store(struct device *dev, struct device_attribute *attr,297 const char *buf, size_t count)298{299 struct pci_dev *pdev = to_pci_dev(dev);300 unsigned long val;301 ssize_t result = 0;302 303 /* this can crash the machine when done on the "wrong" device */304 if (!capable(CAP_SYS_ADMIN))305 return -EPERM;306 307 if (kstrtoul(buf, 0, &val) < 0)308 return -EINVAL;309 310 device_lock(dev);311 if (dev->driver)312 result = -EBUSY;313 else if (val)314 result = pci_enable_device(pdev);315 else if (pci_is_enabled(pdev))316 pci_disable_device(pdev);317 else318 result = -EIO;319 device_unlock(dev);320 321 return result < 0 ? result : count;322}323 324static ssize_t enable_show(struct device *dev, struct device_attribute *attr,325 char *buf)326{327 struct pci_dev *pdev;328 329 pdev = to_pci_dev(dev);330 return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt));331}332static DEVICE_ATTR_RW(enable);333 334#ifdef CONFIG_NUMA335static ssize_t numa_node_store(struct device *dev,336 struct device_attribute *attr, const char *buf,337 size_t count)338{339 struct pci_dev *pdev = to_pci_dev(dev);340 int node;341 342 if (!capable(CAP_SYS_ADMIN))343 return -EPERM;344 345 if (kstrtoint(buf, 0, &node) < 0)346 return -EINVAL;347 348 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)349 return -EINVAL;350 351 if (node != NUMA_NO_NODE && !node_online(node))352 return -EINVAL;353 354 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);355 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",356 node);357 358 dev->numa_node = node;359 return count;360}361 362static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,363 char *buf)364{365 return sysfs_emit(buf, "%d\n", dev->numa_node);366}367static DEVICE_ATTR_RW(numa_node);368#endif369 370static ssize_t dma_mask_bits_show(struct device *dev,371 struct device_attribute *attr, char *buf)372{373 struct pci_dev *pdev = to_pci_dev(dev);374 375 return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask));376}377static DEVICE_ATTR_RO(dma_mask_bits);378 379static ssize_t consistent_dma_mask_bits_show(struct device *dev,380 struct device_attribute *attr,381 char *buf)382{383 return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask));384}385static DEVICE_ATTR_RO(consistent_dma_mask_bits);386 387static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,388 char *buf)389{390 struct pci_dev *pdev = to_pci_dev(dev);391 struct pci_bus *subordinate = pdev->subordinate;392 393 return sysfs_emit(buf, "%u\n", subordinate ?394 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)395 : !pdev->no_msi);396}397 398static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,399 const char *buf, size_t count)400{401 struct pci_dev *pdev = to_pci_dev(dev);402 struct pci_bus *subordinate = pdev->subordinate;403 unsigned long val;404 405 if (!capable(CAP_SYS_ADMIN))406 return -EPERM;407 408 if (kstrtoul(buf, 0, &val) < 0)409 return -EINVAL;410 411 /*412 * "no_msi" and "bus_flags" only affect what happens when a driver413 * requests MSI or MSI-X. They don't affect any drivers that have414 * already requested MSI or MSI-X.415 */416 if (!subordinate) {417 pdev->no_msi = !val;418 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",419 val ? "allowed" : "disallowed");420 return count;421 }422 423 if (val)424 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;425 else426 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;427 428 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",429 val ? "allowed" : "disallowed");430 return count;431}432static DEVICE_ATTR_RW(msi_bus);433 434static ssize_t rescan_store(const struct bus_type *bus, const char *buf, size_t count)435{436 unsigned long val;437 struct pci_bus *b = NULL;438 439 if (kstrtoul(buf, 0, &val) < 0)440 return -EINVAL;441 442 if (val) {443 pci_lock_rescan_remove();444 while ((b = pci_find_next_bus(b)) != NULL)445 pci_rescan_bus(b);446 pci_unlock_rescan_remove();447 }448 return count;449}450static BUS_ATTR_WO(rescan);451 452static struct attribute *pci_bus_attrs[] = {453 &bus_attr_rescan.attr,454 NULL,455};456 457static const struct attribute_group pci_bus_group = {458 .attrs = pci_bus_attrs,459};460 461const struct attribute_group *pci_bus_groups[] = {462 &pci_bus_group,463 NULL,464};465 466static ssize_t dev_rescan_store(struct device *dev,467 struct device_attribute *attr, const char *buf,468 size_t count)469{470 unsigned long val;471 struct pci_dev *pdev = to_pci_dev(dev);472 473 if (kstrtoul(buf, 0, &val) < 0)474 return -EINVAL;475 476 if (val) {477 pci_lock_rescan_remove();478 pci_rescan_bus(pdev->bus);479 pci_unlock_rescan_remove();480 }481 return count;482}483static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL,484 dev_rescan_store);485 486static ssize_t remove_store(struct device *dev, struct device_attribute *attr,487 const char *buf, size_t count)488{489 unsigned long val;490 491 if (kstrtoul(buf, 0, &val) < 0)492 return -EINVAL;493 494 if (val && device_remove_file_self(dev, attr))495 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));496 return count;497}498static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,499 remove_store);500 501static ssize_t bus_rescan_store(struct device *dev,502 struct device_attribute *attr,503 const char *buf, size_t count)504{505 unsigned long val;506 struct pci_bus *bus = to_pci_bus(dev);507 508 if (kstrtoul(buf, 0, &val) < 0)509 return -EINVAL;510 511 if (val) {512 pci_lock_rescan_remove();513 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))514 pci_rescan_bus_bridge_resize(bus->self);515 else516 pci_rescan_bus(bus);517 pci_unlock_rescan_remove();518 }519 return count;520}521static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL,522 bus_rescan_store);523 524#if defined(CONFIG_PM) && defined(CONFIG_ACPI)525static ssize_t d3cold_allowed_store(struct device *dev,526 struct device_attribute *attr,527 const char *buf, size_t count)528{529 struct pci_dev *pdev = to_pci_dev(dev);530 unsigned long val;531 532 if (kstrtoul(buf, 0, &val) < 0)533 return -EINVAL;534 535 pdev->d3cold_allowed = !!val;536 pci_bridge_d3_update(pdev);537 538 pm_runtime_resume(dev);539 540 return count;541}542 543static ssize_t d3cold_allowed_show(struct device *dev,544 struct device_attribute *attr, char *buf)545{546 struct pci_dev *pdev = to_pci_dev(dev);547 return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed);548}549static DEVICE_ATTR_RW(d3cold_allowed);550#endif551 552#ifdef CONFIG_OF553static ssize_t devspec_show(struct device *dev,554 struct device_attribute *attr, char *buf)555{556 struct pci_dev *pdev = to_pci_dev(dev);557 struct device_node *np = pci_device_to_OF_node(pdev);558 559 if (np == NULL)560 return 0;561 return sysfs_emit(buf, "%pOF\n", np);562}563static DEVICE_ATTR_RO(devspec);564#endif565 566static ssize_t driver_override_store(struct device *dev,567 struct device_attribute *attr,568 const char *buf, size_t count)569{570 struct pci_dev *pdev = to_pci_dev(dev);571 int ret;572 573 ret = driver_set_override(dev, &pdev->driver_override, buf, count);574 if (ret)575 return ret;576 577 return count;578}579 580static ssize_t driver_override_show(struct device *dev,581 struct device_attribute *attr, char *buf)582{583 struct pci_dev *pdev = to_pci_dev(dev);584 ssize_t len;585 586 device_lock(dev);587 len = sysfs_emit(buf, "%s\n", pdev->driver_override);588 device_unlock(dev);589 return len;590}591static DEVICE_ATTR_RW(driver_override);592 593static struct attribute *pci_dev_attrs[] = {594 &dev_attr_power_state.attr,595 &dev_attr_resource.attr,596 &dev_attr_vendor.attr,597 &dev_attr_device.attr,598 &dev_attr_subsystem_vendor.attr,599 &dev_attr_subsystem_device.attr,600 &dev_attr_revision.attr,601 &dev_attr_class.attr,602 &dev_attr_irq.attr,603 &dev_attr_local_cpus.attr,604 &dev_attr_local_cpulist.attr,605 &dev_attr_modalias.attr,606#ifdef CONFIG_NUMA607 &dev_attr_numa_node.attr,608#endif609 &dev_attr_dma_mask_bits.attr,610 &dev_attr_consistent_dma_mask_bits.attr,611 &dev_attr_enable.attr,612 &dev_attr_broken_parity_status.attr,613 &dev_attr_msi_bus.attr,614#if defined(CONFIG_PM) && defined(CONFIG_ACPI)615 &dev_attr_d3cold_allowed.attr,616#endif617#ifdef CONFIG_OF618 &dev_attr_devspec.attr,619#endif620 &dev_attr_driver_override.attr,621 &dev_attr_ari_enabled.attr,622 NULL,623};624 625static struct attribute *pci_bridge_attrs[] = {626 &dev_attr_subordinate_bus_number.attr,627 &dev_attr_secondary_bus_number.attr,628 NULL,629};630 631static struct attribute *pcie_dev_attrs[] = {632 &dev_attr_current_link_speed.attr,633 &dev_attr_current_link_width.attr,634 &dev_attr_max_link_width.attr,635 &dev_attr_max_link_speed.attr,636 NULL,637};638 639static struct attribute *pcibus_attrs[] = {640 &dev_attr_bus_rescan.attr,641 &dev_attr_cpuaffinity.attr,642 &dev_attr_cpulistaffinity.attr,643 NULL,644};645 646static const struct attribute_group pcibus_group = {647 .attrs = pcibus_attrs,648};649 650const struct attribute_group *pcibus_groups[] = {651 &pcibus_group,652 NULL,653};654 655static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,656 char *buf)657{658 struct pci_dev *pdev = to_pci_dev(dev);659 struct pci_dev *vga_dev = vga_default_device();660 661 if (vga_dev)662 return sysfs_emit(buf, "%u\n", (pdev == vga_dev));663 664 return sysfs_emit(buf, "%u\n",665 !!(pdev->resource[PCI_ROM_RESOURCE].flags &666 IORESOURCE_ROM_SHADOW));667}668static DEVICE_ATTR_RO(boot_vga);669 670static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,671 struct bin_attribute *bin_attr, char *buf,672 loff_t off, size_t count)673{674 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));675 unsigned int size = 64;676 loff_t init_off = off;677 u8 *data = (u8 *) buf;678 679 /* Several chips lock up trying to read undefined config space */680 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))681 size = dev->cfg_size;682 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)683 size = 128;684 685 if (off > size)686 return 0;687 if (off + count > size) {688 size -= off;689 count = size;690 } else {691 size = count;692 }693 694 pci_config_pm_runtime_get(dev);695 696 if ((off & 1) && size) {697 u8 val;698 pci_user_read_config_byte(dev, off, &val);699 data[off - init_off] = val;700 off++;701 size--;702 }703 704 if ((off & 3) && size > 2) {705 u16 val;706 pci_user_read_config_word(dev, off, &val);707 data[off - init_off] = val & 0xff;708 data[off - init_off + 1] = (val >> 8) & 0xff;709 off += 2;710 size -= 2;711 }712 713 while (size > 3) {714 u32 val;715 pci_user_read_config_dword(dev, off, &val);716 data[off - init_off] = val & 0xff;717 data[off - init_off + 1] = (val >> 8) & 0xff;718 data[off - init_off + 2] = (val >> 16) & 0xff;719 data[off - init_off + 3] = (val >> 24) & 0xff;720 off += 4;721 size -= 4;722 cond_resched();723 }724 725 if (size >= 2) {726 u16 val;727 pci_user_read_config_word(dev, off, &val);728 data[off - init_off] = val & 0xff;729 data[off - init_off + 1] = (val >> 8) & 0xff;730 off += 2;731 size -= 2;732 }733 734 if (size > 0) {735 u8 val;736 pci_user_read_config_byte(dev, off, &val);737 data[off - init_off] = val;738 }739 740 pci_config_pm_runtime_put(dev);741 742 return count;743}744 745static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,746 struct bin_attribute *bin_attr, char *buf,747 loff_t off, size_t count)748{749 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));750 unsigned int size = count;751 loff_t init_off = off;752 u8 *data = (u8 *) buf;753 int ret;754 755 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);756 if (ret)757 return ret;758 759 if (resource_is_exclusive(&dev->driver_exclusive_resource, off,760 count)) {761 pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %llx",762 current->comm, off);763 add_taint(TAINT_USER, LOCKDEP_STILL_OK);764 }765 766 if (off > dev->cfg_size)767 return 0;768 if (off + count > dev->cfg_size) {769 size = dev->cfg_size - off;770 count = size;771 }772 773 pci_config_pm_runtime_get(dev);774 775 if ((off & 1) && size) {776 pci_user_write_config_byte(dev, off, data[off - init_off]);777 off++;778 size--;779 }780 781 if ((off & 3) && size > 2) {782 u16 val = data[off - init_off];783 val |= (u16) data[off - init_off + 1] << 8;784 pci_user_write_config_word(dev, off, val);785 off += 2;786 size -= 2;787 }788 789 while (size > 3) {790 u32 val = data[off - init_off];791 val |= (u32) data[off - init_off + 1] << 8;792 val |= (u32) data[off - init_off + 2] << 16;793 val |= (u32) data[off - init_off + 3] << 24;794 pci_user_write_config_dword(dev, off, val);795 off += 4;796 size -= 4;797 }798 799 if (size >= 2) {800 u16 val = data[off - init_off];801 val |= (u16) data[off - init_off + 1] << 8;802 pci_user_write_config_word(dev, off, val);803 off += 2;804 size -= 2;805 }806 807 if (size)808 pci_user_write_config_byte(dev, off, data[off - init_off]);809 810 pci_config_pm_runtime_put(dev);811 812 return count;813}814static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0);815 816static struct bin_attribute *pci_dev_config_attrs[] = {817 &bin_attr_config,818 NULL,819};820 821static umode_t pci_dev_config_attr_is_visible(struct kobject *kobj,822 struct bin_attribute *a, int n)823{824 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));825 826 a->size = PCI_CFG_SPACE_SIZE;827 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)828 a->size = PCI_CFG_SPACE_EXP_SIZE;829 830 return a->attr.mode;831}832 833static const struct attribute_group pci_dev_config_attr_group = {834 .bin_attrs = pci_dev_config_attrs,835 .is_bin_visible = pci_dev_config_attr_is_visible,836};837 838/*839 * llseek operation for mmappable PCI resources.840 * May be left unused if the arch doesn't provide them.841 */842static __maybe_unused loff_t843pci_llseek_resource(struct file *filep,844 struct kobject *kobj __always_unused,845 struct bin_attribute *attr,846 loff_t offset, int whence)847{848 return fixed_size_llseek(filep, offset, whence, attr->size);849}850 851#ifdef HAVE_PCI_LEGACY852/**853 * pci_read_legacy_io - read byte(s) from legacy I/O port space854 * @filp: open sysfs file855 * @kobj: kobject corresponding to file to read from856 * @bin_attr: struct bin_attribute for this file857 * @buf: buffer to store results858 * @off: offset into legacy I/O port space859 * @count: number of bytes to read860 *861 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific862 * callback routine (pci_legacy_read).863 */864static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,865 struct bin_attribute *bin_attr, char *buf,866 loff_t off, size_t count)867{868 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));869 870 /* Only support 1, 2 or 4 byte accesses */871 if (count != 1 && count != 2 && count != 4)872 return -EINVAL;873 874 return pci_legacy_read(bus, off, (u32 *)buf, count);875}876 877/**878 * pci_write_legacy_io - write byte(s) to legacy I/O port space879 * @filp: open sysfs file880 * @kobj: kobject corresponding to file to read from881 * @bin_attr: struct bin_attribute for this file882 * @buf: buffer containing value to be written883 * @off: offset into legacy I/O port space884 * @count: number of bytes to write885 *886 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific887 * callback routine (pci_legacy_write).888 */889static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,890 struct bin_attribute *bin_attr, char *buf,891 loff_t off, size_t count)892{893 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));894 895 /* Only support 1, 2 or 4 byte accesses */896 if (count != 1 && count != 2 && count != 4)897 return -EINVAL;898 899 return pci_legacy_write(bus, off, *(u32 *)buf, count);900}901 902/**903 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space904 * @filp: open sysfs file905 * @kobj: kobject corresponding to device to be mapped906 * @attr: struct bin_attribute for this file907 * @vma: struct vm_area_struct passed to mmap908 *909 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap910 * legacy memory space (first meg of bus space) into application virtual911 * memory space.912 */913static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,914 struct bin_attribute *attr,915 struct vm_area_struct *vma)916{917 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));918 919 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);920}921 922/**923 * pci_mmap_legacy_io - map legacy PCI IO into user memory space924 * @filp: open sysfs file925 * @kobj: kobject corresponding to device to be mapped926 * @attr: struct bin_attribute for this file927 * @vma: struct vm_area_struct passed to mmap928 *929 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap930 * legacy IO space (first meg of bus space) into application virtual931 * memory space. Returns -ENOSYS if the operation isn't supported932 */933static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,934 struct bin_attribute *attr,935 struct vm_area_struct *vma)936{937 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));938 939 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);940}941 942/**943 * pci_adjust_legacy_attr - adjustment of legacy file attributes944 * @b: bus to create files under945 * @mmap_type: I/O port or memory946 *947 * Stub implementation. Can be overridden by arch if necessary.948 */949void __weak pci_adjust_legacy_attr(struct pci_bus *b,950 enum pci_mmap_state mmap_type)951{952}953 954/**955 * pci_create_legacy_files - create legacy I/O port and memory files956 * @b: bus to create files under957 *958 * Some platforms allow access to legacy I/O port and ISA memory space on959 * a per-bus basis. This routine creates the files and ties them into960 * their associated read, write and mmap files from pci-sysfs.c961 *962 * On error unwind, but don't propagate the error to the caller963 * as it is ok to set up the PCI bus without these files.964 */965void pci_create_legacy_files(struct pci_bus *b)966{967 int error;968 969 if (!sysfs_initialized)970 return;971 972 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),973 GFP_ATOMIC);974 if (!b->legacy_io)975 goto kzalloc_err;976 977 sysfs_bin_attr_init(b->legacy_io);978 b->legacy_io->attr.name = "legacy_io";979 b->legacy_io->size = 0xffff;980 b->legacy_io->attr.mode = 0600;981 b->legacy_io->read = pci_read_legacy_io;982 b->legacy_io->write = pci_write_legacy_io;983 /* See pci_create_attr() for motivation */984 b->legacy_io->llseek = pci_llseek_resource;985 b->legacy_io->mmap = pci_mmap_legacy_io;986 b->legacy_io->f_mapping = iomem_get_mapping;987 pci_adjust_legacy_attr(b, pci_mmap_io);988 error = device_create_bin_file(&b->dev, b->legacy_io);989 if (error)990 goto legacy_io_err;991 992 /* Allocated above after the legacy_io struct */993 b->legacy_mem = b->legacy_io + 1;994 sysfs_bin_attr_init(b->legacy_mem);995 b->legacy_mem->attr.name = "legacy_mem";996 b->legacy_mem->size = 1024*1024;997 b->legacy_mem->attr.mode = 0600;998 b->legacy_mem->mmap = pci_mmap_legacy_mem;999 /* See pci_create_attr() for motivation */1000 b->legacy_mem->llseek = pci_llseek_resource;1001 b->legacy_mem->f_mapping = iomem_get_mapping;1002 pci_adjust_legacy_attr(b, pci_mmap_mem);1003 error = device_create_bin_file(&b->dev, b->legacy_mem);1004 if (error)1005 goto legacy_mem_err;1006 1007 return;1008 1009legacy_mem_err:1010 device_remove_bin_file(&b->dev, b->legacy_io);1011legacy_io_err:1012 kfree(b->legacy_io);1013 b->legacy_io = NULL;1014kzalloc_err:1015 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");1016}1017 1018void pci_remove_legacy_files(struct pci_bus *b)1019{1020 if (b->legacy_io) {1021 device_remove_bin_file(&b->dev, b->legacy_io);1022 device_remove_bin_file(&b->dev, b->legacy_mem);1023 kfree(b->legacy_io); /* both are allocated here */1024 }1025}1026#endif /* HAVE_PCI_LEGACY */1027 1028#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)1029/**1030 * pci_mmap_resource - map a PCI resource into user memory space1031 * @kobj: kobject for mapping1032 * @attr: struct bin_attribute for the file being mapped1033 * @vma: struct vm_area_struct passed into the mmap1034 * @write_combine: 1 for write_combine mapping1035 *1036 * Use the regular PCI mapping routines to map a PCI resource into userspace.1037 */1038static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,1039 struct vm_area_struct *vma, int write_combine)1040{1041 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));1042 int bar = (unsigned long)attr->private;1043 enum pci_mmap_state mmap_type;1044 struct resource *res = &pdev->resource[bar];1045 int ret;1046 1047 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);1048 if (ret)1049 return ret;1050 1051 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))1052 return -EINVAL;1053 1054 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))1055 return -EINVAL;1056 1057 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;1058 1059 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);1060}1061 1062static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,1063 struct bin_attribute *attr,1064 struct vm_area_struct *vma)1065{1066 return pci_mmap_resource(kobj, attr, vma, 0);1067}1068 1069static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,1070 struct bin_attribute *attr,1071 struct vm_area_struct *vma)1072{1073 return pci_mmap_resource(kobj, attr, vma, 1);1074}1075 1076static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,1077 struct bin_attribute *attr, char *buf,1078 loff_t off, size_t count, bool write)1079{1080#ifdef CONFIG_HAS_IOPORT1081 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));1082 int bar = (unsigned long)attr->private;1083 unsigned long port = off;1084 1085 port += pci_resource_start(pdev, bar);1086 1087 if (port > pci_resource_end(pdev, bar))1088 return 0;1089 1090 if (port + count - 1 > pci_resource_end(pdev, bar))1091 return -EINVAL;1092 1093 switch (count) {1094 case 1:1095 if (write)1096 outb(*(u8 *)buf, port);1097 else1098 *(u8 *)buf = inb(port);1099 return 1;1100 case 2:1101 if (write)1102 outw(*(u16 *)buf, port);1103 else1104 *(u16 *)buf = inw(port);1105 return 2;1106 case 4:1107 if (write)1108 outl(*(u32 *)buf, port);1109 else1110 *(u32 *)buf = inl(port);1111 return 4;1112 }1113 return -EINVAL;1114#else1115 return -ENXIO;1116#endif1117}1118 1119static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,1120 struct bin_attribute *attr, char *buf,1121 loff_t off, size_t count)1122{1123 return pci_resource_io(filp, kobj, attr, buf, off, count, false);1124}1125 1126static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,1127 struct bin_attribute *attr, char *buf,1128 loff_t off, size_t count)1129{1130 int ret;1131 1132 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);1133 if (ret)1134 return ret;1135 1136 return pci_resource_io(filp, kobj, attr, buf, off, count, true);1137}1138 1139/**1140 * pci_remove_resource_files - cleanup resource files1141 * @pdev: dev to cleanup1142 *1143 * If we created resource files for @pdev, remove them from sysfs and1144 * free their resources.1145 */1146static void pci_remove_resource_files(struct pci_dev *pdev)1147{1148 int i;1149 1150 for (i = 0; i < PCI_STD_NUM_BARS; i++) {1151 struct bin_attribute *res_attr;1152 1153 res_attr = pdev->res_attr[i];1154 if (res_attr) {1155 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);1156 kfree(res_attr);1157 }1158 1159 res_attr = pdev->res_attr_wc[i];1160 if (res_attr) {1161 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);1162 kfree(res_attr);1163 }1164 }1165}1166 1167static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)1168{1169 /* allocate attribute structure, piggyback attribute name */1170 int name_len = write_combine ? 13 : 10;1171 struct bin_attribute *res_attr;1172 char *res_attr_name;1173 int retval;1174 1175 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);1176 if (!res_attr)1177 return -ENOMEM;1178 1179 res_attr_name = (char *)(res_attr + 1);1180 1181 sysfs_bin_attr_init(res_attr);1182 if (write_combine) {1183 sprintf(res_attr_name, "resource%d_wc", num);1184 res_attr->mmap = pci_mmap_resource_wc;1185 } else {1186 sprintf(res_attr_name, "resource%d", num);1187 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {1188 res_attr->read = pci_read_resource_io;1189 res_attr->write = pci_write_resource_io;1190 if (arch_can_pci_mmap_io())1191 res_attr->mmap = pci_mmap_resource_uc;1192 } else {1193 res_attr->mmap = pci_mmap_resource_uc;1194 }1195 }1196 if (res_attr->mmap) {1197 res_attr->f_mapping = iomem_get_mapping;1198 /*1199 * generic_file_llseek() consults f_mapping->host to determine1200 * the file size. As iomem_inode knows nothing about the1201 * attribute, it's not going to work, so override it as well.1202 */1203 res_attr->llseek = pci_llseek_resource;1204 }1205 res_attr->attr.name = res_attr_name;1206 res_attr->attr.mode = 0600;1207 res_attr->size = pci_resource_len(pdev, num);1208 res_attr->private = (void *)(unsigned long)num;1209 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);1210 if (retval) {1211 kfree(res_attr);1212 return retval;1213 }1214 1215 if (write_combine)1216 pdev->res_attr_wc[num] = res_attr;1217 else1218 pdev->res_attr[num] = res_attr;1219 1220 return 0;1221}1222 1223/**1224 * pci_create_resource_files - create resource files in sysfs for @dev1225 * @pdev: dev in question1226 *1227 * Walk the resources in @pdev creating files for each resource available.1228 */1229static int pci_create_resource_files(struct pci_dev *pdev)1230{1231 int i;1232 int retval;1233 1234 /* Expose the PCI resources from this device as files */1235 for (i = 0; i < PCI_STD_NUM_BARS; i++) {1236 1237 /* skip empty resources */1238 if (!pci_resource_len(pdev, i))1239 continue;1240 1241 retval = pci_create_attr(pdev, i, 0);1242 /* for prefetchable resources, create a WC mappable file */1243 if (!retval && arch_can_pci_mmap_wc() &&1244 pdev->resource[i].flags & IORESOURCE_PREFETCH)1245 retval = pci_create_attr(pdev, i, 1);1246 if (retval) {1247 pci_remove_resource_files(pdev);1248 return retval;1249 }1250 }1251 return 0;1252}1253#else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */1254int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }1255void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }1256#endif1257 1258/**1259 * pci_write_rom - used to enable access to the PCI ROM display1260 * @filp: sysfs file1261 * @kobj: kernel object handle1262 * @bin_attr: struct bin_attribute for this file1263 * @buf: user input1264 * @off: file offset1265 * @count: number of byte in input1266 *1267 * writing anything except 0 enables it1268 */1269static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,1270 struct bin_attribute *bin_attr, char *buf,1271 loff_t off, size_t count)1272{1273 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));1274 1275 if ((off == 0) && (*buf == '0') && (count == 2))1276 pdev->rom_attr_enabled = 0;1277 else1278 pdev->rom_attr_enabled = 1;1279 1280 return count;1281}1282 1283/**1284 * pci_read_rom - read a PCI ROM1285 * @filp: sysfs file1286 * @kobj: kernel object handle1287 * @bin_attr: struct bin_attribute for this file1288 * @buf: where to put the data we read from the ROM1289 * @off: file offset1290 * @count: number of bytes to read1291 *1292 * Put @count bytes starting at @off into @buf from the ROM in the PCI1293 * device corresponding to @kobj.1294 */1295static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,1296 struct bin_attribute *bin_attr, char *buf,1297 loff_t off, size_t count)1298{1299 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));1300 void __iomem *rom;1301 size_t size;1302 1303 if (!pdev->rom_attr_enabled)1304 return -EINVAL;1305 1306 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */1307 if (!rom || !size)1308 return -EIO;1309 1310 if (off >= size)1311 count = 0;1312 else {1313 if (off + count > size)1314 count = size - off;1315 1316 memcpy_fromio(buf, rom + off, count);1317 }1318 pci_unmap_rom(pdev, rom);1319 1320 return count;1321}1322static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0);1323 1324static struct bin_attribute *pci_dev_rom_attrs[] = {1325 &bin_attr_rom,1326 NULL,1327};1328 1329static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj,1330 struct bin_attribute *a, int n)1331{1332 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));1333 size_t rom_size;1334 1335 /* If the device has a ROM, try to expose it in sysfs. */1336 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);1337 if (!rom_size)1338 return 0;1339 1340 a->size = rom_size;1341 1342 return a->attr.mode;1343}1344 1345static const struct attribute_group pci_dev_rom_attr_group = {1346 .bin_attrs = pci_dev_rom_attrs,1347 .is_bin_visible = pci_dev_rom_attr_is_visible,1348};1349 1350static ssize_t reset_store(struct device *dev, struct device_attribute *attr,1351 const char *buf, size_t count)1352{1353 struct pci_dev *pdev = to_pci_dev(dev);1354 unsigned long val;1355 ssize_t result;1356 1357 if (kstrtoul(buf, 0, &val) < 0)1358 return -EINVAL;1359 1360 if (val != 1)1361 return -EINVAL;1362 1363 pm_runtime_get_sync(dev);1364 result = pci_reset_function(pdev);1365 pm_runtime_put(dev);1366 if (result < 0)1367 return result;1368 1369 return count;1370}1371static DEVICE_ATTR_WO(reset);1372 1373static struct attribute *pci_dev_reset_attrs[] = {1374 &dev_attr_reset.attr,1375 NULL,1376};1377 1378static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj,1379 struct attribute *a, int n)1380{1381 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));1382 1383 if (!pci_reset_supported(pdev))1384 return 0;1385 1386 return a->mode;1387}1388 1389static const struct attribute_group pci_dev_reset_attr_group = {1390 .attrs = pci_dev_reset_attrs,1391 .is_visible = pci_dev_reset_attr_is_visible,1392};1393 1394static ssize_t __resource_resize_show(struct device *dev, int n, char *buf)1395{1396 struct pci_dev *pdev = to_pci_dev(dev);1397 ssize_t ret;1398 1399 pci_config_pm_runtime_get(pdev);1400 1401 ret = sysfs_emit(buf, "%016llx\n",1402 (u64)pci_rebar_get_possible_sizes(pdev, n));1403 1404 pci_config_pm_runtime_put(pdev);1405 1406 return ret;1407}1408 1409static ssize_t __resource_resize_store(struct device *dev, int n,1410 const char *buf, size_t count)1411{1412 struct pci_dev *pdev = to_pci_dev(dev);1413 unsigned long size, flags;1414 int ret, i;1415 u16 cmd;1416 1417 if (kstrtoul(buf, 0, &size) < 0)1418 return -EINVAL;1419 1420 device_lock(dev);1421 if (dev->driver) {1422 ret = -EBUSY;1423 goto unlock;1424 }1425 1426 pci_config_pm_runtime_get(pdev);1427 1428 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {1429 ret = aperture_remove_conflicting_pci_devices(pdev,1430 "resourceN_resize");1431 if (ret)1432 goto pm_put;1433 }1434 1435 pci_read_config_word(pdev, PCI_COMMAND, &cmd);1436 pci_write_config_word(pdev, PCI_COMMAND,1437 cmd & ~PCI_COMMAND_MEMORY);1438 1439 flags = pci_resource_flags(pdev, n);1440 1441 pci_remove_resource_files(pdev);1442 1443 for (i = 0; i < PCI_STD_NUM_BARS; i++) {1444 if (pci_resource_len(pdev, i) &&1445 pci_resource_flags(pdev, i) == flags)1446 pci_release_resource(pdev, i);1447 }1448 1449 ret = pci_resize_resource(pdev, n, size);1450 1451 pci_assign_unassigned_bus_resources(pdev->bus);1452 1453 if (pci_create_resource_files(pdev))1454 pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n");1455 1456 pci_write_config_word(pdev, PCI_COMMAND, cmd);1457pm_put:1458 pci_config_pm_runtime_put(pdev);1459unlock:1460 device_unlock(dev);1461 1462 return ret ? ret : count;1463}1464 1465#define pci_dev_resource_resize_attr(n) \1466static ssize_t resource##n##_resize_show(struct device *dev, \1467 struct device_attribute *attr, \1468 char *buf) \1469{ \1470 return __resource_resize_show(dev, n, buf); \1471} \1472static ssize_t resource##n##_resize_store(struct device *dev, \1473 struct device_attribute *attr,\1474 const char *buf, size_t count)\1475{ \1476 return __resource_resize_store(dev, n, buf, count); \1477} \1478static DEVICE_ATTR_RW(resource##n##_resize)1479 1480pci_dev_resource_resize_attr(0);1481pci_dev_resource_resize_attr(1);1482pci_dev_resource_resize_attr(2);1483pci_dev_resource_resize_attr(3);1484pci_dev_resource_resize_attr(4);1485pci_dev_resource_resize_attr(5);1486 1487static struct attribute *resource_resize_attrs[] = {1488 &dev_attr_resource0_resize.attr,1489 &dev_attr_resource1_resize.attr,1490 &dev_attr_resource2_resize.attr,1491 &dev_attr_resource3_resize.attr,1492 &dev_attr_resource4_resize.attr,1493 &dev_attr_resource5_resize.attr,1494 NULL,1495};1496 1497static umode_t resource_resize_is_visible(struct kobject *kobj,1498 struct attribute *a, int n)1499{1500 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));1501 1502 return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode;1503}1504 1505static const struct attribute_group pci_dev_resource_resize_group = {1506 .attrs = resource_resize_attrs,1507 .is_visible = resource_resize_is_visible,1508};1509 1510int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)1511{1512 if (!sysfs_initialized)1513 return -EACCES;1514 1515 return pci_create_resource_files(pdev);1516}1517 1518/**1519 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files1520 * @pdev: device whose entries we should free1521 *1522 * Cleanup when @pdev is removed from sysfs.1523 */1524void pci_remove_sysfs_dev_files(struct pci_dev *pdev)1525{1526 if (!sysfs_initialized)1527 return;1528 1529 pci_remove_resource_files(pdev);1530}1531 1532static int __init pci_sysfs_init(void)1533{1534 struct pci_dev *pdev = NULL;1535 struct pci_bus *pbus = NULL;1536 int retval;1537 1538 sysfs_initialized = 1;1539 for_each_pci_dev(pdev) {1540 retval = pci_create_sysfs_dev_files(pdev);1541 if (retval) {1542 pci_dev_put(pdev);1543 return retval;1544 }1545 }1546 1547 while ((pbus = pci_find_next_bus(pbus)))1548 pci_create_legacy_files(pbus);1549 1550 return 0;1551}1552late_initcall(pci_sysfs_init);1553 1554static struct attribute *pci_dev_dev_attrs[] = {1555 &dev_attr_boot_vga.attr,1556 NULL,1557};1558 1559static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,1560 struct attribute *a, int n)1561{1562 struct device *dev = kobj_to_dev(kobj);1563 struct pci_dev *pdev = to_pci_dev(dev);1564 1565 if (a == &dev_attr_boot_vga.attr && pci_is_vga(pdev))1566 return a->mode;1567 1568 return 0;1569}1570 1571static struct attribute *pci_dev_hp_attrs[] = {1572 &dev_attr_remove.attr,1573 &dev_attr_dev_rescan.attr,1574 NULL,1575};1576 1577static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,1578 struct attribute *a, int n)1579{1580 struct device *dev = kobj_to_dev(kobj);1581 struct pci_dev *pdev = to_pci_dev(dev);1582 1583 if (pdev->is_virtfn)1584 return 0;1585 1586 return a->mode;1587}1588 1589static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,1590 struct attribute *a, int n)1591{1592 struct device *dev = kobj_to_dev(kobj);1593 struct pci_dev *pdev = to_pci_dev(dev);1594 1595 if (pci_is_bridge(pdev))1596 return a->mode;1597 1598 return 0;1599}1600 1601static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,1602 struct attribute *a, int n)1603{1604 struct device *dev = kobj_to_dev(kobj);1605 struct pci_dev *pdev = to_pci_dev(dev);1606 1607 if (pci_is_pcie(pdev))1608 return a->mode;1609 1610 return 0;1611}1612 1613static const struct attribute_group pci_dev_group = {1614 .attrs = pci_dev_attrs,1615};1616 1617const struct attribute_group *pci_dev_groups[] = {1618 &pci_dev_group,1619 &pci_dev_config_attr_group,1620 &pci_dev_rom_attr_group,1621 &pci_dev_reset_attr_group,1622 &pci_dev_reset_method_attr_group,1623 &pci_dev_vpd_attr_group,1624#ifdef CONFIG_DMI1625 &pci_dev_smbios_attr_group,1626#endif1627#ifdef CONFIG_ACPI1628 &pci_dev_acpi_attr_group,1629#endif1630 &pci_dev_resource_resize_group,1631 ARCH_PCI_DEV_GROUPS1632 NULL,1633};1634 1635static const struct attribute_group pci_dev_hp_attr_group = {1636 .attrs = pci_dev_hp_attrs,1637 .is_visible = pci_dev_hp_attrs_are_visible,1638};1639 1640static const struct attribute_group pci_dev_attr_group = {1641 .attrs = pci_dev_dev_attrs,1642 .is_visible = pci_dev_attrs_are_visible,1643};1644 1645static const struct attribute_group pci_bridge_attr_group = {1646 .attrs = pci_bridge_attrs,1647 .is_visible = pci_bridge_attrs_are_visible,1648};1649 1650static const struct attribute_group pcie_dev_attr_group = {1651 .attrs = pcie_dev_attrs,1652 .is_visible = pcie_dev_attrs_are_visible,1653};1654 1655const struct attribute_group *pci_dev_attr_groups[] = {1656 &pci_dev_attr_group,1657 &pci_dev_hp_attr_group,1658#ifdef CONFIG_PCI_IOV1659 &sriov_pf_dev_attr_group,1660 &sriov_vf_dev_attr_group,1661#endif1662 &pci_bridge_attr_group,1663 &pcie_dev_attr_group,1664#ifdef CONFIG_PCIEAER1665 &aer_stats_attr_group,1666#endif1667#ifdef CONFIG_PCIEASPM1668 &aspm_ctrl_attr_group,1669#endif1670 NULL,1671};1672