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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Purpose:	PCI Express Port Bus Driver's Internal Data Structures4 *5 * Copyright (C) 2004 Intel6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)7 */8 9#ifndef _PORTDRV_H_10#define _PORTDRV_H_11 12#include <linux/compiler.h>13 14/* Service Type */15#define PCIE_PORT_SERVICE_PME_SHIFT	0	/* Power Management Event */16#define PCIE_PORT_SERVICE_PME		(1 << PCIE_PORT_SERVICE_PME_SHIFT)17#define PCIE_PORT_SERVICE_AER_SHIFT	1	/* Advanced Error Reporting */18#define PCIE_PORT_SERVICE_AER		(1 << PCIE_PORT_SERVICE_AER_SHIFT)19#define PCIE_PORT_SERVICE_HP_SHIFT	2	/* Native Hotplug */20#define PCIE_PORT_SERVICE_HP		(1 << PCIE_PORT_SERVICE_HP_SHIFT)21#define PCIE_PORT_SERVICE_DPC_SHIFT	3	/* Downstream Port Containment */22#define PCIE_PORT_SERVICE_DPC		(1 << PCIE_PORT_SERVICE_DPC_SHIFT)23#define PCIE_PORT_SERVICE_BWNOTIF_SHIFT	4	/* Bandwidth notification */24#define PCIE_PORT_SERVICE_BWNOTIF	(1 << PCIE_PORT_SERVICE_BWNOTIF_SHIFT)25 26#define PCIE_PORT_DEVICE_MAXSERVICES   527 28extern bool pcie_ports_dpc_native;29 30#ifdef CONFIG_PCIEAER31int pcie_aer_init(void);32#else33static inline int pcie_aer_init(void) { return 0; }34#endif35 36#ifdef CONFIG_HOTPLUG_PCI_PCIE37int pcie_hp_init(void);38#else39static inline int pcie_hp_init(void) { return 0; }40#endif41 42#ifdef CONFIG_PCIE_PME43int pcie_pme_init(void);44#else45static inline int pcie_pme_init(void) { return 0; }46#endif47 48#ifdef CONFIG_PCIE_DPC49int pcie_dpc_init(void);50#else51static inline int pcie_dpc_init(void) { return 0; }52#endif53 54/* Port Type */55#define PCIE_ANY_PORT			(~0)56 57struct pcie_device {58	int		irq;	    /* Service IRQ/MSI/MSI-X Vector */59	struct pci_dev *port;	    /* Root/Upstream/Downstream Port */60	u32		service;    /* Port service this device represents */61	void		*priv_data; /* Service Private Data */62	struct device	device;     /* Generic Device Interface */63};64#define to_pcie_device(d) container_of(d, struct pcie_device, device)65 66static inline void set_service_data(struct pcie_device *dev, void *data)67{68	dev->priv_data = data;69}70 71static inline void *get_service_data(struct pcie_device *dev)72{73	return dev->priv_data;74}75 76struct pcie_port_service_driver {77	const char *name;78	int (*probe)(struct pcie_device *dev);79	void (*remove)(struct pcie_device *dev);80	int (*suspend)(struct pcie_device *dev);81	int (*resume_noirq)(struct pcie_device *dev);82	int (*resume)(struct pcie_device *dev);83	int (*runtime_suspend)(struct pcie_device *dev);84	int (*runtime_resume)(struct pcie_device *dev);85 86	int (*slot_reset)(struct pcie_device *dev);87 88	int port_type;  /* Type of the port this driver can handle */89	u32 service;    /* Port service this device represents */90 91	struct device_driver driver;92};93#define to_service_driver(d) \94	container_of(d, struct pcie_port_service_driver, driver)95 96int pcie_port_service_register(struct pcie_port_service_driver *new);97void pcie_port_service_unregister(struct pcie_port_service_driver *new);98 99extern const struct bus_type pcie_port_bus_type;100 101struct pci_dev;102 103#ifdef CONFIG_PCIE_PME104extern bool pcie_pme_msi_disabled;105 106static inline void pcie_pme_disable_msi(void)107{108	pcie_pme_msi_disabled = true;109}110 111static inline bool pcie_pme_no_msi(void)112{113	return pcie_pme_msi_disabled;114}115 116void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);117#else /* !CONFIG_PCIE_PME */118static inline void pcie_pme_disable_msi(void) {}119static inline bool pcie_pme_no_msi(void) { return false; }120static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}121#endif /* !CONFIG_PCIE_PME */122 123struct device *pcie_port_find_device(struct pci_dev *dev, u32 service);124#endif /* _PORTDRV_H_ */125