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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Driver for Intel I82092AA PCI-PCMCIA bridge.4 *5 * (C) 2001 Red Hat, Inc.6 *7 * Author: Arjan Van De Ven <arjanv@redhat.com>8 * Loosly based on i82365.c from the pcmcia-cs package9 */10 11#include <linux/kernel.h>12#include <linux/module.h>13#include <linux/pci.h>14#include <linux/init.h>15#include <linux/workqueue.h>16#include <linux/interrupt.h>17#include <linux/device.h>18 19#include <pcmcia/ss.h>20 21#include <linux/io.h>22 23#include "i82092aa.h"24#include "i82365.h"25 26MODULE_DESCRIPTION("Driver for Intel I82092AA PCI-PCMCIA bridge");27MODULE_LICENSE("GPL");28 29/* PCI core routines */30static const struct pci_device_id i82092aa_pci_ids[] = {31	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82092AA_0) },32	{ }33};34MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids);35 36static struct pci_driver i82092aa_pci_driver = {37	.name		= "i82092aa",38	.id_table	= i82092aa_pci_ids,39	.probe		= i82092aa_pci_probe,40	.remove	= i82092aa_pci_remove,41};42 43 44/* the pccard structure and its functions */45static struct pccard_operations i82092aa_operations = {46	.init			= i82092aa_init,47	.get_status		= i82092aa_get_status,48	.set_socket		= i82092aa_set_socket,49	.set_io_map		= i82092aa_set_io_map,50	.set_mem_map		= i82092aa_set_mem_map,51};52 53/* The card can do up to 4 sockets, allocate a structure for each of them */54 55struct socket_info {56	int	number;57	int	card_state;58		/* 0 = no socket,59		 * 1 = empty socket,60		 * 2 = card but not initialized,61		 * 3 = operational card62		 */63	unsigned int io_base;	/* base io address of the socket */64 65	struct pcmcia_socket socket;66	struct pci_dev *dev;	/* The PCI device for the socket */67};68 69#define MAX_SOCKETS 470static struct socket_info sockets[MAX_SOCKETS];71static int socket_count;	/* shortcut */72 73 74static int i82092aa_pci_probe(struct pci_dev *dev,75			      const struct pci_device_id *id)76{77	unsigned char configbyte;78	int i, ret;79 80	ret = pci_enable_device(dev);81	if (ret)82		return ret;83 84	/* PCI Configuration Control */85	pci_read_config_byte(dev, 0x40, &configbyte);86 87	switch (configbyte&6) {88	case 0:89		socket_count = 2;90		break;91	case 2:92		socket_count = 1;93		break;94	case 4:95	case 6:96		socket_count = 4;97		break;98 99	default:100		dev_err(&dev->dev,101			"Oops, you did something we didn't think of.\n");102		ret = -EIO;103		goto err_out_disable;104	}105	dev_info(&dev->dev, "configured as a %d socket device.\n",106		 socket_count);107 108	if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) {109		ret = -EBUSY;110		goto err_out_disable;111	}112 113	for (i = 0; i < socket_count; i++) {114		sockets[i].card_state = 1; /* 1 = present but empty */115		sockets[i].io_base = pci_resource_start(dev, 0);116		sockets[i].dev = dev;117		sockets[i].socket.features |= SS_CAP_PCCARD;118		sockets[i].socket.map_size = 0x1000;119		sockets[i].socket.irq_mask = 0;120		sockets[i].socket.pci_irq  = dev->irq;121		sockets[i].socket.cb_dev  = dev;122		sockets[i].socket.owner = THIS_MODULE;123 124		sockets[i].number = i;125 126		if (card_present(i)) {127			sockets[i].card_state = 3;128			dev_dbg(&dev->dev, "slot %i is occupied\n", i);129		} else {130			dev_dbg(&dev->dev, "slot %i is vacant\n", i);131		}132	}133 134	/* Now, specifiy that all interrupts are to be done as PCI interrupts135	 * bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt136	 */137	configbyte = 0xFF;138 139	/* PCI Interrupt Routing Register */140	pci_write_config_byte(dev, 0x50, configbyte);141 142	/* Register the interrupt handler */143	dev_dbg(&dev->dev, "Requesting interrupt %i\n", dev->irq);144	ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED,145			  "i82092aa", i82092aa_interrupt);146	if (ret) {147		dev_err(&dev->dev, "Failed to register IRQ %d, aborting\n",148			dev->irq);149		goto err_out_free_res;150	}151 152	for (i = 0; i < socket_count; i++) {153		sockets[i].socket.dev.parent = &dev->dev;154		sockets[i].socket.ops = &i82092aa_operations;155		sockets[i].socket.resource_ops = &pccard_nonstatic_ops;156		ret = pcmcia_register_socket(&sockets[i].socket);157		if (ret)158			goto err_out_free_sockets;159	}160 161	return 0;162 163err_out_free_sockets:164	if (i) {165		for (i--; i >= 0; i--)166			pcmcia_unregister_socket(&sockets[i].socket);167	}168	free_irq(dev->irq, i82092aa_interrupt);169err_out_free_res:170	release_region(pci_resource_start(dev, 0), 2);171err_out_disable:172	pci_disable_device(dev);173	return ret;174}175 176static void i82092aa_pci_remove(struct pci_dev *dev)177{178	int i;179 180	free_irq(dev->irq, i82092aa_interrupt);181 182	for (i = 0; i < socket_count; i++)183		pcmcia_unregister_socket(&sockets[i].socket);184}185 186static DEFINE_SPINLOCK(port_lock);187 188/* basic value read/write functions */189 190static unsigned char indirect_read(int socket, unsigned short reg)191{192	unsigned short int port;193	unsigned char val;194	unsigned long flags;195 196	spin_lock_irqsave(&port_lock, flags);197	reg += socket * 0x40;198	port = sockets[socket].io_base;199	outb(reg, port);200	val = inb(port+1);201	spin_unlock_irqrestore(&port_lock, flags);202	return val;203}204 205static void indirect_write(int socket, unsigned short reg, unsigned char value)206{207	unsigned short int port;208	unsigned long flags;209 210	spin_lock_irqsave(&port_lock, flags);211	reg = reg + socket * 0x40;212	port = sockets[socket].io_base;213	outb(reg, port);214	outb(value, port+1);215	spin_unlock_irqrestore(&port_lock, flags);216}217 218static void indirect_setbit(int socket, unsigned short reg, unsigned char mask)219{220	unsigned short int port;221	unsigned char val;222	unsigned long flags;223 224	spin_lock_irqsave(&port_lock, flags);225	reg = reg + socket * 0x40;226	port = sockets[socket].io_base;227	outb(reg, port);228	val = inb(port+1);229	val |= mask;230	outb(reg, port);231	outb(val, port+1);232	spin_unlock_irqrestore(&port_lock, flags);233}234 235 236static void indirect_resetbit(int socket,237			      unsigned short reg, unsigned char mask)238{239	unsigned short int port;240	unsigned char val;241	unsigned long flags;242 243	spin_lock_irqsave(&port_lock, flags);244	reg = reg + socket * 0x40;245	port = sockets[socket].io_base;246	outb(reg, port);247	val = inb(port+1);248	val &= ~mask;249	outb(reg, port);250	outb(val, port+1);251	spin_unlock_irqrestore(&port_lock, flags);252}253 254static void indirect_write16(int socket,255			     unsigned short reg, unsigned short value)256{257	unsigned short int port;258	unsigned char val;259	unsigned long flags;260 261	spin_lock_irqsave(&port_lock, flags);262	reg = reg + socket * 0x40;263	port = sockets[socket].io_base;264 265	outb(reg, port);266	val = value & 255;267	outb(val, port+1);268 269	reg++;270 271	outb(reg, port);272	val = value>>8;273	outb(val, port+1);274	spin_unlock_irqrestore(&port_lock, flags);275}276 277/* simple helper functions */278/* External clock time, in nanoseconds.  120 ns = 8.33 MHz */279static int cycle_time = 120;280 281static int to_cycles(int ns)282{283	if (cycle_time != 0)284		return ns/cycle_time;285	else286		return 0;287}288 289 290/* Interrupt handler functionality */291 292static irqreturn_t i82092aa_interrupt(int irq, void *dev)293{294	int i;295	int loopcount = 0;296	int handled = 0;297 298	unsigned int events, active = 0;299 300	while (1) {301		loopcount++;302		if (loopcount > 20) {303			pr_err("i82092aa: infinite eventloop in interrupt\n");304			break;305		}306 307		active = 0;308 309		for (i = 0; i < socket_count; i++) {310			int csc;311 312			/* Inactive socket, should not happen */313			if (sockets[i].card_state == 0)314				continue;315 316			/* card status change register */317			csc = indirect_read(i, I365_CSC);318 319			if (csc == 0)  /* no events on this socket */320				continue;321			handled = 1;322			events = 0;323 324			if (csc & I365_CSC_DETECT) {325				events |= SS_DETECT;326				dev_info(&sockets[i].dev->dev,327					 "Card detected in socket %i!\n", i);328			}329 330			if (indirect_read(i, I365_INTCTL) & I365_PC_IOCARD) {331				/* For IO/CARDS, bit 0 means "read the card" */332				if (csc & I365_CSC_STSCHG)333					events |= SS_STSCHG;334			} else {335				/* Check for battery/ready events */336				if (csc & I365_CSC_BVD1)337					events |= SS_BATDEAD;338				if (csc & I365_CSC_BVD2)339					events |= SS_BATWARN;340				if (csc & I365_CSC_READY)341					events |= SS_READY;342			}343 344			if (events)345				pcmcia_parse_events(&sockets[i].socket, events);346			active |= events;347		}348 349		if (active == 0) /* no more events to handle */350			break;351	}352	return IRQ_RETVAL(handled);353}354 355 356 357/* socket functions */358 359static int card_present(int socketno)360{361	unsigned int val;362 363	if ((socketno < 0) || (socketno >= MAX_SOCKETS))364		return 0;365	if (sockets[socketno].io_base == 0)366		return 0;367 368 369	val = indirect_read(socketno, 1); /* Interface status register */370	if ((val&12) == 12)371		return 1;372 373	return 0;374}375 376static void set_bridge_state(int sock)377{378	indirect_write(sock, I365_GBLCTL, 0x00);379	indirect_write(sock, I365_GENCTL, 0x00);380 381	indirect_setbit(sock, I365_INTCTL, 0x08);382}383 384 385static int i82092aa_init(struct pcmcia_socket *sock)386{387	int i;388	struct resource res = { .start = 0, .end = 0x0fff };389	pccard_io_map io = { 0, 0, 0, 0, 1 };390	pccard_mem_map mem = { .res = &res, };391 392	for (i = 0; i < 2; i++) {393		io.map = i;394		i82092aa_set_io_map(sock, &io);395	}396	for (i = 0; i < 5; i++) {397		mem.map = i;398		i82092aa_set_mem_map(sock, &mem);399	}400 401	return 0;402}403 404static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value)405{406	unsigned int sock = container_of(socket,407				struct socket_info, socket)->number;408	unsigned int status;409 410	/* Interface Status Register */411	status = indirect_read(sock, I365_STATUS);412 413	*value = 0;414 415	if ((status & I365_CS_DETECT) == I365_CS_DETECT)416		*value |= SS_DETECT;417 418	/* IO cards have a different meaning of bits 0,1 */419	/* Also notice the inverse-logic on the bits */420	if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) {421		/* IO card */422		if (!(status & I365_CS_STSCHG))423			*value |= SS_STSCHG;424	} else { /* non I/O card */425		if (!(status & I365_CS_BVD1))426			*value |= SS_BATDEAD;427		if (!(status & I365_CS_BVD2))428			*value |= SS_BATWARN;429	}430 431	if (status & I365_CS_WRPROT)432		(*value) |= SS_WRPROT;	/* card is write protected */433 434	if (status & I365_CS_READY)435		(*value) |= SS_READY;    /* card is not busy */436 437	if (status & I365_CS_POWERON)438		(*value) |= SS_POWERON;  /* power is applied to the card */439 440	return 0;441}442 443 444static int i82092aa_set_socket(struct pcmcia_socket *socket,445			       socket_state_t *state)446{447	struct socket_info *sock_info = container_of(socket, struct socket_info,448						     socket);449	unsigned int sock = sock_info->number;450	unsigned char reg;451 452	/* First, set the global controller options */453 454	set_bridge_state(sock);455 456	/* Values for the IGENC register */457 458	reg = 0;459 460	/* The reset bit has "inverse" logic */461	if (!(state->flags & SS_RESET))462		reg = reg | I365_PC_RESET;463	if (state->flags & SS_IOCARD)464		reg = reg | I365_PC_IOCARD;465 466	/* IGENC, Interrupt and General Control Register */467	indirect_write(sock, I365_INTCTL, reg);468 469	/* Power registers */470 471	reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */472 473	if (state->flags & SS_PWR_AUTO) {474		dev_info(&sock_info->dev->dev, "Auto power\n");475		reg |= I365_PWR_AUTO;	/* automatic power mngmnt */476	}477	if (state->flags & SS_OUTPUT_ENA) {478		dev_info(&sock_info->dev->dev, "Power Enabled\n");479		reg |= I365_PWR_OUT;	/* enable power */480	}481 482	switch (state->Vcc) {483	case 0:484		break;485	case 50:486		dev_info(&sock_info->dev->dev,487			 "setting voltage to Vcc to 5V on socket %i\n",488			 sock);489		reg |= I365_VCC_5V;490		break;491	default:492		dev_err(&sock_info->dev->dev,493			"%s called with invalid VCC power value: %i",494			__func__, state->Vcc);495		return -EINVAL;496	}497 498	switch (state->Vpp) {499	case 0:500		dev_info(&sock_info->dev->dev,501			 "not setting Vpp on socket %i\n", sock);502		break;503	case 50:504		dev_info(&sock_info->dev->dev,505			 "setting Vpp to 5.0 for socket %i\n", sock);506		reg |= I365_VPP1_5V | I365_VPP2_5V;507		break;508	case 120:509		dev_info(&sock_info->dev->dev, "setting Vpp to 12.0\n");510		reg |= I365_VPP1_12V | I365_VPP2_12V;511		break;512	default:513		dev_err(&sock_info->dev->dev,514			"%s called with invalid VPP power value: %i",515			__func__, state->Vcc);516		return -EINVAL;517	}518 519	if (reg != indirect_read(sock, I365_POWER)) /* only write if changed */520		indirect_write(sock, I365_POWER, reg);521 522	/* Enable specific interrupt events */523 524	reg = 0x00;525	if (state->csc_mask & SS_DETECT)526		reg |= I365_CSC_DETECT;527	if (state->flags & SS_IOCARD) {528		if (state->csc_mask & SS_STSCHG)529			reg |= I365_CSC_STSCHG;530	} else {531		if (state->csc_mask & SS_BATDEAD)532			reg |= I365_CSC_BVD1;533		if (state->csc_mask & SS_BATWARN)534			reg |= I365_CSC_BVD2;535		if (state->csc_mask & SS_READY)536			reg |= I365_CSC_READY;537 538	}539 540	/* now write the value and clear the (probably bogus) pending stuff541	 * by doing a dummy read542	 */543 544	indirect_write(sock, I365_CSCINT, reg);545	(void)indirect_read(sock, I365_CSC);546 547	return 0;548}549 550static int i82092aa_set_io_map(struct pcmcia_socket *socket,551			       struct pccard_io_map *io)552{553	struct socket_info *sock_info = container_of(socket, struct socket_info,554						     socket);555	unsigned int sock = sock_info->number;556	unsigned char map, ioctl;557 558	map = io->map;559 560	/* Check error conditions */561	if (map > 1)562		return -EINVAL;563 564	if ((io->start > 0xffff) || (io->stop > 0xffff)565				 || (io->stop < io->start))566		return -EINVAL;567 568	/* Turn off the window before changing anything */569	if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map))570		indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map));571 572	/* write the new values */573	indirect_write16(sock, I365_IO(map)+I365_W_START, io->start);574	indirect_write16(sock, I365_IO(map)+I365_W_STOP, io->stop);575 576	ioctl = indirect_read(sock, I365_IOCTL) & ~I365_IOCTL_MASK(map);577 578	if (io->flags & (MAP_16BIT|MAP_AUTOSZ))579		ioctl |= I365_IOCTL_16BIT(map);580 581	indirect_write(sock, I365_IOCTL, ioctl);582 583	/* Turn the window back on if needed */584	if (io->flags & MAP_ACTIVE)585		indirect_setbit(sock, I365_ADDRWIN, I365_ENA_IO(map));586 587	return 0;588}589 590static int i82092aa_set_mem_map(struct pcmcia_socket *socket,591				struct pccard_mem_map *mem)592{593	struct socket_info *sock_info = container_of(socket, struct socket_info,594						     socket);595	unsigned int sock = sock_info->number;596	struct pci_bus_region region;597	unsigned short base, i;598	unsigned char map;599 600	pcibios_resource_to_bus(sock_info->dev->bus, &region, mem->res);601 602	map = mem->map;603	if (map > 4)604		return -EINVAL;605 606	if ((mem->card_start > 0x3ffffff) || (region.start > region.end) ||607	     (mem->speed > 1000)) {608		dev_err(&sock_info->dev->dev,609			"invalid mem map for socket %i: %llx to %llx with a start of %x\n",610			sock,611			(unsigned long long)region.start,612			(unsigned long long)region.end,613			mem->card_start);614		return -EINVAL;615	}616 617	/* Turn off the window before changing anything */618	if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map))619		indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));620 621	/* write the start address */622	base = I365_MEM(map);623	i = (region.start >> 12) & 0x0fff;624	if (mem->flags & MAP_16BIT)625		i |= I365_MEM_16BIT;626	if (mem->flags & MAP_0WS)627		i |= I365_MEM_0WS;628	indirect_write16(sock, base+I365_W_START, i);629 630	/* write the stop address */631 632	i = (region.end >> 12) & 0x0fff;633	switch (to_cycles(mem->speed)) {634	case 0:635		break;636	case 1:637		i |= I365_MEM_WS0;638		break;639	case 2:640		i |= I365_MEM_WS1;641		break;642	default:643		i |= I365_MEM_WS1 | I365_MEM_WS0;644		break;645	}646 647	indirect_write16(sock, base+I365_W_STOP, i);648 649	/* card start */650 651	i = ((mem->card_start - region.start) >> 12) & 0x3fff;652	if (mem->flags & MAP_WRPROT)653		i |= I365_MEM_WRPROT;654	if (mem->flags & MAP_ATTRIB)655		i |= I365_MEM_REG;656	indirect_write16(sock, base+I365_W_OFF, i);657 658	/* Enable the window if necessary */659	if (mem->flags & MAP_ACTIVE)660		indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));661 662	return 0;663}664 665static int __init i82092aa_module_init(void)666{667	return pci_register_driver(&i82092aa_pci_driver);668}669 670static void __exit i82092aa_module_exit(void)671{672	pci_unregister_driver(&i82092aa_pci_driver);673	if (sockets[0].io_base > 0)674		release_region(sockets[0].io_base, 2);675}676 677module_init(i82092aa_module_init);678module_exit(i82092aa_module_exit);679 680